Derived From Analysis (e.g., Of A Specification Or By Stimulation) Patents (Class 714/33)
  • Patent number: 12271280
    Abstract: A method for testing a computer system. The method includes executing by a testing tool a performance test case associated with a service of the computer system, and applying by the testing tool a load to the computer system in response to executing a sequence of actions of the performance test case. The method additionally includes monitoring by a monitoring tool experience parameters of the computer system that define a user experience of the service as the performance test case is executed, and aggregating by the monitoring tool the experience parameters. The method further includes communicating by the monitoring tool and actual result to the testing tool, and comparing by the testing tool the expected result of the performance test case with the actual result of the performance test case to evaluate the impact of the applied load to the experience of the service.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: April 8, 2025
    Assignee: T-Mobile Innovations LLC
    Inventors: Raju Chavan, Aaron R. Haehn
  • Patent number: 12259798
    Abstract: A current configuration of one or more data management services is monitored. It is determined that the current configuration is insufficient to achieve a data protection intent indicated by a specification of the data protection intent. In response to determining that the current configuration is insufficient to achieve the data protection intent indicated by the specification of the data protection intent, the current configuration of the one or more data management services is modified in a manner to achieve the data protection intent indicated by the specification of the data protection intent.
    Type: Grant
    Filed: August 1, 2023
    Date of Patent: March 25, 2025
    Assignee: Cohesity, Inc.
    Inventors: Chinmaya Manjunath, Colin Scott Johnson, Amitabh Sinha, Dayanand Sharma, Prakash Veljibhai Vaghela, Karandeep Singh Chawla
  • Patent number: 12248382
    Abstract: A system, method, and computer-readable medium for performing a data center management and monitoring operation. The data center management and monitoring operation includes: receiving a plurality of system under test (SUT) test plans, each SUT test plan comprising a plurality of SUT test cases; analyzing the plurality of SUT test cases, the analyzing comprising generating a phase component resolution score for each of the plurality of SUT test cases; generating a continuous schedule for the SUT test plan, the generating the continuous schedule taking into account the phase component resolution score for each of the plurality of SUT test cases; and, continuously orchestrating the SUT test plan based upon the continuous schedule for the SUT test plan.
    Type: Grant
    Filed: January 24, 2023
    Date of Patent: March 11, 2025
    Assignee: Dell Products L.P.
    Inventor: Vijay Narayana Reddy Halaharvi
  • Patent number: 12248563
    Abstract: An electronic device for receiving and seamlessly providing cybersecurity analyzer updates and concurrent management systems for detecting cybersecurity threats including a processor and a memory communicatively coupled to the processor. The memory stores an analyzer logic to generate a first analyzer configured to receive a suspicious object for threat evaluation, an inspection logic to manage a first queue of suspicious objects for threat evaluation to the first analyzer, and an update logic to receive updated cybersecurity analytics content data. The analyzer logic receives updated cybersecurity analytics content data and can generate a second analyzer that incorporates at least a portion of the parsed updated cybersecurity analytics content data.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: March 11, 2025
    Assignee: Musarubra US LLC
    Inventors: Neeraj Kulkarni, Robert M. Beard, Jr., Robin Caron
  • Patent number: 12244516
    Abstract: A system for processing data, comprising a compute node having a first processor that is configured to receive a digital data message containing a request for computing services and to allocate processing resources on a network as a function of the request. A smart network interface controller (NIC) having a second processor that is configured to interface with the network and to send and receive data over the network associated with the computing services as a function of one or more policies. The smart NIC configured to receive policy update data and to implement the policy update data and to process the data that is sent and received over the network in accordance with the policy data.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: March 4, 2025
    Assignee: RELIANCE JIO INFOCOMM USA, INC.
    Inventor: Arun Rajagopal
  • Patent number: 12222842
    Abstract: A host computer includes a memory storing a proxy VM, and a host CPU. The proxy VM emulates target hardware having an incomplete design. The proxy VM includes a virtual processor for emulating a target processor. The proxy VM includes an emulated memory coupled to the virtual processor over a virtual memory bus. The emulated memory includes at least one portion storing the target code. The host CPU is configured to execute the proxy VM to emulate the target hardware. The proxy VM, upon execution by the host CPU, is configured to execute, by the virtual processor, the target code.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: February 11, 2025
    Assignee: The Boeing Company
    Inventor: Jonathan Nicholas Hotra
  • Patent number: 12222831
    Abstract: A method for testing a data-transferring arrangement includes (c) acquiring a channel output-side data set, (d)(e) evaluating the channel output-side data set to determine an error distribution and a bit error ratio in the channel output-side data set, (f) determining at least one test subsequence, (g) forming a further test data set with at least the determined test subsequence, (h) applying the further test data set to the data-transferring arrangement, (i) acquiring a present channel output-side data set based on the further test data set, (j)(k) evaluating the present channel output-side data set to determine a present error distribution and to determine a present bit error ratio in the present channel output-side data set, comparing the present bit error ratio with a predetermined threshold value and, if the comparison reveals that the bit error ratio is larger than the predetermined threshold value, repeatedly carrying out steps (f) to (k).
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: February 11, 2025
    Assignee: BitifEye Digital Test Solutions GmbH
    Inventors: Anton Unakafov, Wolfgang Koebele, Valentina Unakafova, Victor-Rico Sanchez-Guerra, Ransom Stephens, Hermann Stehling
  • Patent number: 12159125
    Abstract: Disclosed is a page multiplexing method, a page multiplexing device, a storage medium and an electronic apparatus. After obtaining the page frame information of pages to be configured in a client to be developed, a component relational tree corresponding to the plurality of pages can be determined. The component relational tree is compared with a pre-constructed reference relational tree to determine a target tree structure composed of target components from the reference relational tree. Dependencies between target components in the reference relational tree match those in the component relational tree. The component code of the target component used by the developed client is queried to multiplex the component code. The component relational tree corresponding to pages to be developed can be compared with the reference relational tree corresponding to each page included in the developed client to determine the component code that can be multiplexed.
    Type: Grant
    Filed: November 30, 2023
    Date of Patent: December 3, 2024
    Assignee: ZHEJIANG LAB
    Inventors: Tianshu Zhou, Xin Gao, Jingsong Li, Yu Tian
  • Patent number: 12141864
    Abstract: A transaction evaluation system may include a configurable and/or scalable transaction rate input model which models historical and/or recent transaction input rate patterns of a transaction processing system for a specified time period with configurable and/or scalable transactional amplitude for use in evaluating performance of the transaction processing system. The system may operate to inject particular volumes of transactions into the transaction processing system at specific times and/or periods of time.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: November 12, 2024
    Assignee: Chicago Mercantile Exchange Inc.
    Inventor: Amir Onallah
  • Patent number: 12141174
    Abstract: The example embodiments are directed to a system and method that applies knowledge developed by a subject matter expert with respect to a physical asset. In one example, the method includes receiving knowledge and issue resolution information developed of subject matter experts in association with historical issues for an asset, generating a plurality of data clusters for the asset based on the knowledge, wherein each historical issue of the asset is mapped to a cluster and includes a plurality of resolutions for the issue, receiving a new issue and new issue information, and processing the new issue by extracting keywords from the new issue information and assigning the new issue to a data cluster from among the plurality of data clusters based on the extracted keywords, and outputting, to a display, a cause of the new issue and potential solutions for the new issue.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: November 12, 2024
    Assignee: General Electric Company
    Inventors: Arindam Baral, Nagendra Perugupalli, Manohar Swamynathan, Abhishek Narain
  • Patent number: 12112287
    Abstract: This disclosure describes a test prediction service for predicting needed resources and associated costs for testing projects related to testing of new programs, services, etc., within a service provider network. The test prediction service uses a first machine learning model for predicting “hard costs” using data from a first data source that includes end-to-end test details such as associated resource and infrastructure use (costs) of the service provider network during previous end-to-end testing projects. A second machine learning model is used for predicting “soft costs” using data from a second data source that includes data, e.g., engineering headcount/hours spent developing the end-to-end testing and/or during previous end-to-end testing. The data is used to train the machine learning models. The test prediction service uses the trained machine learning models to generate estimated testing costs of new testing projects when a user enters project attributes for a new testing project.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: October 8, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Yuk Lun Patrick Kwan, Huang Li, Michael Ho, Gary Rittinger, Kavitha Thiyaghu
  • Patent number: 12099352
    Abstract: Methods may comprise: identifying a fault indicator associated with a physical system; collecting first data related to a state of the physical system; applying a surrogate model to the first data to produce a plurality of potential fault modes; applying an optimization algorithm to the plurality of potential fault modes using a similarity metric to produce an input and a plurality of outputs, wherein each of the plurality of outputs corresponds to one of the plurality of potential fault modes, wherein the input provides differentiation between each of the plurality of outputs; applying the input to the physical system; collecting second data from physical system in response to applying the input; identifying a true mode of the physical system based on a comparison of the second data and the plurality of outputs; and diagnosing a fault of the physical system based on the true mode.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: September 24, 2024
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Ion Matei, Aleksandar B. Feldman, Alexandre Perez, Johan de Kleer
  • Patent number: 12056487
    Abstract: A library model addition engine adds library models to a library knowledge base by defining a template for a library configuration file that conveys information about each library model, custom inputs and code snippets to facilitate library comparison operations, and education content for the library model. The library configuration file template may be automatically filled with extracted data using an iterative sequence of operations to retrieve, scrape, or extract data to automatically populate data fields in a library configuration file template for validation processing to ensure that the file is in the correct format and satisfies the constraints provided by the library recommendation engine.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: August 6, 2024
    Assignee: DevFactory Innovations FZ-LLC
    Inventor: Tushar Makkar
  • Patent number: 12052370
    Abstract: Methods and apparatus for managing state in accelerators. An accelerator performs processing operations on a data chunk relating to a job submitted to the accelerator. During or following processing the data chunk, the accelerator generates state information corresponding to its current state and stores the state information or, optionally, the accelerator state information is obtained and stored by privileged software. In connection with continued processing of the current data chunk or a next job and next data chunk, the accelerator accesses previously stored state information identified by the job and validates the state information was generated by itself, another accelerator, or privileged software. Valid state information is then reloaded to restore the state of the accelerator/process state, and processing continues. The chunk processing, accelerator state store, validation, and restore operations are repeated to process subsequent jobs.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: July 30, 2024
    Assignee: Intel Corporation
    Inventor: Vinodh Gopal
  • Patent number: 12045652
    Abstract: Technologies for batching requests in an edge infrastructure include a compute device including circuitry configured to obtain a request for an operation to be performed at an edge location. The circuitry is also configured to determine, as a function of a parameter of the obtained request, a batch that the obtained request is to be assigned to. The batch includes a one or more requests for operations to be performed at an edge location. The circuitry is also configured to assign the batch to a cloudlet at an edge location. The cloudlet includes a set of resources usable to execute the operations requested in the batch.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: July 23, 2024
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Kshitij Doshi, Suraj Prebhakaran, Ned M. Smith
  • Patent number: 12047398
    Abstract: Techniques and screening messages based on tags in an automotive environment, such as, messages communicated via a communication bus, like the CAN bus. Messages can be tagged with either a binary or probabilistic tag indicating whether the message is fraudulent. ECUs coupled to the CAN bus can receive the messages and the message tags and can determine whether to fully consume the message based on the tag.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: July 23, 2024
    Assignee: INTEL CORPORATION
    Inventors: Marcio Juliato, Manoj Sastry, Michael Kara-Ivanov, Aviad Kipnis, Shabbir Ahmed, Christopher Gutierrez, Vuk Lesi
  • Patent number: 12047504
    Abstract: According to one embodiment, a semiconductor device includes a first system including a first operation circuit, and a second system configured to control a debug operation in the first system. The semiconductor device includes a normal mode and a debug mode. In the debug mode of the semiconductor device, in a case where a first key received from an outside corresponds to a second key stored in the second system, the second system transmits a debug command to the first operation circuit.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: July 23, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Yuji Ishikawa
  • Patent number: 11971808
    Abstract: Provided is a method for automated verification of a software program in a Behavior-Driven Development environment and a data processing system configured to execute such a method. Individual test steps of BDD test scenarios are first matched and then assigned to existing test step definitions from a BDD framework. If a one-to-one matching is not possible, natural language processing is used to decide if an assignment is possible with a certain matching probability. The assigned test step definitions are used to generate graphical test models for the test scenarios, e.g., UML diagrams. Finally, executable test scripts are generated to test the software program. The present invention relates particularly to Behavior-Driven Development and combines traditional BDD advantages with Model Based Testing for improved convenience and automatization in case of complex software packages.
    Type: Grant
    Filed: November 28, 2019
    Date of Patent: April 30, 2024
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventor: Stephan Storck
  • Patent number: 11947435
    Abstract: A computer-implemented method for testing a functionality of a computing platform, the computing platform comprising a first microservice, the method comprising: receiving, by an injector microservice, a test configuration file; determining from the test configuration file: a test input message; a test input communication mechanism; and a test output communication mechanism. The method further comprises: generating a test identifier for identifying that a message is being used for testing purposes; transmitting, by the injector microservice, the test input message to the first microservice using the test input communication mechanism, wherein the test input message comprises the test identifier; identifying, by the injector microservice, an output message transmitted via the test output communication mechanism that comprises the test identifier; and recording, by the injector microservice, the output message comprising the test identifier.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: April 2, 2024
    Assignee: Amadeus S.A.S.
    Inventors: Vincent Boulineau, Nicolas Isch, Serge Beuzit
  • Patent number: 11934760
    Abstract: Methods and systems for performing timing analysis during the design of a circuit are described. In one embodiment, a simulation system can generate an effective resistance value (or an impedance value based on the effective resistance value) for an instance and use the effective resistance value in a simulation to determine a minimum timing delay for the instance when only the instance switches during such simulations.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: March 19, 2024
    Assignee: ANSYS, INC.
    Inventors: Joao Geada, Nicholas Lee Rethman
  • Patent number: 11921598
    Abstract: Example techniques may be implemented as a method, a system or more non-transitory machine-readable media storing instructions that are executable by one or more processing devices, Operations performed by the example techniques include obtaining data representing results of tests executed by one or more test instruments on an initial set of devices under test (DUTs) in a test system; and using the data to train a machine learning model. The machine learning model is for predicting which of the tests will produce failing results for a different set of DUTs. DUTs in the different set have one or more features in common with DUTs in the initial set.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: March 5, 2024
    Assignee: Teradyne, Inc.
    Inventor: Padmanabha Kannampalli
  • Patent number: 11914505
    Abstract: Provided is an API adapter test system capable of easily determining the health of an API adapter. An API adapter test system 1 includes: an API adapter test assistance device 20 that assists a health determination test of a predetermined API adapter; a developer terminal 10; and a wholesale API simulation device 30.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: February 27, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Sho Kanemaru, Kensuke Takahashi, Tomoki Ikegaya, Satoshi Kondo
  • Patent number: 11892504
    Abstract: Systems and methods of debugging a design under test for metastability issues using formal verification. In one aspect, the method includes determining, by a server, that a functionality of the DUT failed an assertion; generating, by the server, a plurality of first waveforms for a plurality of clock domain crossing (CDC) pairs that are in a cone of influence of the assertion; applying, by the server, a constraint including a condition to the plurality of waveforms; and generating, by the server, one or more second waveforms for a first subset of the plurality of CDC pairs, wherein the first subset of the CDC pairs satisfied the condition.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: February 6, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Alberto Arias Drake, Bijitendra Mittra, Keyliane da Silva Fernandes Silvano
  • Patent number: 11882132
    Abstract: A computer-implemented method of monitoring security of a set of computing devices in a distributed system, the distributed system having a plurality of computing devices, in communication with one another over a network, by a security software running in a computer node. The method includes comparing an app signature of the application running in a selected one of the set of computing devices to a reference app signatures generated from a respective functional replica of the application.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: January 23, 2024
    Assignee: Prescient Devices, Inc.
    Inventor: Andrew Wang
  • Patent number: 11868216
    Abstract: Systems and methods are provided for management of data item recovery operations based on classification of data items with respect to a target recovery time. Data items may be classified using metadata regarding versioning and other data storage operations performed on the data items, and the timing of those storage operations with respect to the target recovery time (TRT). Each class may be associated with one or more recovery actions. The recovery actions may involve modifying the metadata rather than the underlying data items.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: January 9, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Koushik Biswas, James William Fogel, Dhananjay Baburao Karanjkar, Douglas John Youd, Allistaire Mair, James Ryan Powers
  • Patent number: 11869612
    Abstract: Method for testing an integrated circuit device, by defect modelling of the integrated circuit device, fault modelling of the integrated circuit device based on the information obtained from the defect modelling, test development based on information obtained from the fault modelling, and executing the test on the integrated circuit device. Defect modelling of the integrated circuit device including executing a physical defect analysis of the integrated circuit device to provide a set of effective technology parameters modified from a set of defect-free technology parameters associated with the integrated circuit device, and executing an electrical modelling of the integrated circuit device using the set of effective technology parameters to provide a defect-parametrized electrical model based on a defect-free electrical model of the integrated circuit device. The present methods allow parts-per-billion testing capabilities.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: January 9, 2024
    Assignee: Technische Universiteit Delft
    Inventors: Mottaqiallah Taouil, Said Hamdioui
  • Patent number: 11829234
    Abstract: Methods, apparatus, and processor-readable storage media for automatically classifying cloud infrastructure components for prioritized multi-tenant cloud environment resolution using artificial intelligence techniques are provided herein. An example computer-implemented method includes obtaining historical data pertaining to a multi-tenant cloud environment; training one or more artificial intelligence techniques, using at least a portion of the obtained historical data, for classifying cloud infrastructure components for prioritizing incident-related resolution; classifying one or more cloud infrastructure components, within the multi-tenant cloud environment and associated with one or more server-related issues, into one or more of multiple resolution priority classes; and performing one or more automated actions based at least in part on the classifying of the one or more cloud infrastructure components.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: November 28, 2023
    Assignee: Dell Products L.P.
    Inventors: Bijan Kumar Mohanty, Divya Maddi, Hung T. Dinh, Vikram Ramdev Bokka
  • Patent number: 11818665
    Abstract: According to a first embodiment, a method may include initiating, by a user equipment, at least one transient-inducing event. The method may further include entering, by the user equipment, at least one first state associated with at least one first state requirement configuration. The method may further include transmitting, by the user equipment, at least one first signal to a network entity according to the at least one first state requirement configuration.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: November 14, 2023
    Assignee: Nokia Technologies Oy
    Inventors: Toni Lahteensuo, Sari Nielsen
  • Patent number: 11789846
    Abstract: A method is disclosed. The method including receiving at a telemetry service a plurality of transaction responses from a plurality of components distributed across a network, wherein the plurality of transaction responses is generated to process a request originating from a source component, wherein the request includes a request identifier, wherein the plurality of transaction responses includes a plurality of code path identifiers. The method including generating a fingerprint associated with the request by concatenating the plurality of code path identifiers, wherein each transaction response includes the request identifier and a corresponding code path identifier. The method including storing the fingerprint in a data storage.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: October 17, 2023
    Assignee: Sony Interactive Entertainment LLC
    Inventor: Jessica Loeb
  • Patent number: 11792482
    Abstract: An example method for visual testing of programmed display of content includes obtaining a workflow of test scenarios for visual testing of a display controlled by a set-top box (STB) device. The method also includes obtaining images that capture content displayed on the display, feeding the images to a trained machine learning model to detect display elements, and performing visual testing based on the detected display elements in accordance with visual expectations specified by the test scenarios.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: October 17, 2023
    Assignee: DISH Network L.L.C.
    Inventor: Andrew Fakhry
  • Patent number: 11777984
    Abstract: Threats to systems and data captured by such systems can be automatically detected and remediated. Inbound traffic on an enterprise network can be monitored and analyzed to detect a threat based on parameters of the inbound traffic. In response, a patch can be identified or generated to address known or unknown threats based on a comparison of parameters. Once identified or generated, the patch can be conveyed to a target computing resource for deployment to address the threat.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: October 3, 2023
    Assignee: Wells Fargo Bank, N.A.
    Inventors: Divakar Sastry Prayaga, Rajasekhar Kode
  • Patent number: 11740993
    Abstract: An apparatus includes a plurality of processor circuits, a cache memory circuit, and a trace control circuit. The trace control circuit may be configured, in response to activation of a mode to record information indicative of program execution of at least one processor circuit of the plurality of processor circuits, to monitor memory requests transmitted between ones of the plurality of processor circuits and the cache memory circuit, and then to select a particular memory request of monitored memory requests using an arbitration algorithm. The trace control circuit may be further configured to allocate space in a trace buffer to the particular memory request, and to store, in the trace buffer, information associated with the particular memory request.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: August 29, 2023
    Assignee: Apple Inc.
    Inventors: Andrew J. Beaumont-Smith, Sandeep Gupta, Krishna C. Potnuru, Matthias Knoth
  • Patent number: 11709762
    Abstract: A system and method for remote testing of enterprise software applications (ESA) allows one or more testers to remotely access an ESA and remotely test the ESA. In at least one embodiment, the ESA resides in a testing platform that includes one more computers that are provisioned for testing. “Provisioning” a computer system (such as one or more servers) refers to preparing, configuring, and equipping the computer system to provide services to one or more users. In at least one embodiment, the computer system is provisioned to create an ESA operational environment in accordance with a virtual desktop infrastructure (VDI) template interacting with virtualization software.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: July 25, 2023
    Assignee: DevFactory Innovations FZ-LLC
    Inventor: Rahul Subramaniam
  • Patent number: 11683219
    Abstract: Examples of the present disclosure describe a testing framework for adaptive virtual services. In an example, a function vendor provides a network function having stated specifications to a service provider. A derived signature is generated for the network function (e.g., based on associated metadata, an image associated with the network function, and/or a network signature for the network function), which is used to classify the network function. The testing framework is used to test the network function according to its classification, thereby determining a set of capabilities. In examples, a network function having the same or similar signature as a previously tested network function may be categorized according to the previously tested network function. The network function is categorized according to its determined capabilities and added to an inventory of network functions for the service provider. Network functions in the inventory can then be selected to form a computer network.
    Type: Grant
    Filed: February 1, 2022
    Date of Patent: June 20, 2023
    Assignee: CenturyLink Intellectual Property LLC
    Inventor: Zubin Ingah
  • Patent number: 11663101
    Abstract: A semiconductor device includes a debug port, a first access port, a second access port, a first processing unit, a second processing unit, and an embedded emulator unit. The first access port is coupled to the debug port. The second access port is coupled to the debug port. The first processing unit is coupled to the first access port. The second processing unit is coupled to the second access port. The embedded emulator unit is coupled to the debug port, the first processing unit and the second processing unit. The first processing unit generates a debug instruction to access the embedded emulator unit, so that the embedded emulator unit generates a debug signal. The debug signal is output to the second processing unit through the debug port and the second access port, so as to perform a debug operation on the second processing unit.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: May 30, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Zong-Min Lin
  • Patent number: 11636004
    Abstract: Embodiments of the present disclosure include a method, an electronic device, and a computer program product for training a failure analysis model. In a method for training a failure analysis model in an illustrative embodiment, at least one set of log files including multiple preprocessed log files is obtained, the at least one set of log files including a marked failure cause of a storage system, and preprocessed log files in the multiple preprocessed log files including one or more potential failure causes of the storage system and scores associated with the potential failure causes; a failure cause of the storage system is predicted according to a failure analysis model and based on the potential failure causes and the scores in the multiple preprocessed log files; and parameters of the failure analysis model are updated based on a probability that the predicted failure cause is the marked failure cause.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: April 25, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Jiacheng Ni, Min Gong, GuangZhou Zhou, Zijia Wang, Zhen Jia
  • Patent number: 11625628
    Abstract: The method disclosed herein includes preprocessing large amounts of input data into a smaller input data sets based on first predetermined associations, sorting the smaller input data sets into groups based on second predetermined associations, filtering grouped data based on upper and lower thresholds, updating a hierarchical processing decision tree within a processor of a computing system, processing data based on the updated hierarchical processing decision tree, and recursively restarting the preprocessing of the large amounts of input data to dynamically update the hierarchical processing decision tree within a user device.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: April 11, 2023
    Inventor: Daniel Suklja
  • Patent number: 11620200
    Abstract: There is provided a system and method for performing system integration on an embedded system of a connected and/or autonomous vehicle. Integration testing may include obtaining one or more requirements and/or specifications for a system under test; generating a metamodel based on the requirements and/or specifications; generating test cases based on the metamodel; prioritizing said test cases based on hazards associated with said test cases; executing one or more of said prioritized test cases; and obtaining a verdict for each of said one or more prioritized test cases.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: April 4, 2023
    Assignee: EMTECH GROUP INC.
    Inventors: Toni Jardini, Spencer Reuben, Farsam Farzadpour, Akramul Azim, Amalnnath Parameswaran, Ansh David, Bradley Wood
  • Patent number: 11604643
    Abstract: A method for executing new instructions includes the following steps. An instruction is received. A determination is made as to whether the received instruction is a new instruction. When the received instruction is the new instruction, a emulation flag is generated. The emulation flag is a first value. A system management interrupt is generated according to the emulation flag. In response to the system management interrupt, entering the system management mode and simulating the execution of the received instruction in the system management mode to generate a simulation execution result. The simulation execution result is stored in a system management memory.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: March 14, 2023
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Weilin Wang, Yingbing Guan, Mengchen Yang
  • Patent number: 11586517
    Abstract: A method, system, and computer program product for automated testing of Internet of Things devices are provided. The method generates a device table for a set of devices. The device table includes a set of inputs and a set of controllable outputs for each device. A set of input signals are detected for a device for a subset of inputs associated with the device. The set of input signals are detected from one or more controllable outputs of a subset of devices. The device table is modified based on the set of input signals and the one or more controllable outputs to generate an association table representing a relation of the subset of inputs with the one or more controllable outputs. The method detects a fault in one or more device of the set of devices based on a test input signal and the association table.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: February 21, 2023
    Assignee: International Business Machines Corporation
    Inventors: John Jesse Wood, Gareth James Hugh Morgan
  • Patent number: 11586502
    Abstract: A method is described that includes processing, by a memory subsystem, a read memory command that is addressed to a first die of a memory device. The memory subsystem determines whether processing the read memory command failed to correctly read user data from the first die and, in response to determining that processing the read memory command failed to correctly read user data from the first die, determines whether the first die has failed. In response to determining that the first die has failed, the memory subsystem performs an abbreviated error recovery procedure to successfully perform the read memory command instead of a full error recovery procedure.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: February 21, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Boon Leong Yeap, Matthew Covalt
  • Patent number: 11579195
    Abstract: A method for performing verification and testing of a device under test (DUT) is described. The method includes receiving, by a processing device, inputs from a user regarding a hardware design for the DUT. The processing device presents cover group attribute suggestions to the user based on the hardware design and receives cover group information from the user corresponding to one or more cover group attributes of one or more cover groups based on the cover group attribute suggestions. Based on the cover group information, the processing device automatically generates verification code, including one or more cover group definitions.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: February 14, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Benjamin Ting, Alon Shtepel, Isaac Kim
  • Patent number: 11574696
    Abstract: The present disclosure provides a semiconductor test method. The semiconductor test method includes the operations of: receiving a source code written in an interpreted language; and performing, by a first test apparatus, a first test on a device under test (DUT) based on the source code. The operation of performing, by the first test apparatus, the first test on the DUT based on the source code includes the operations of: interpreting, by a processor, the source code to generate a first interpreted code; and performing the first test on the DUT according to the first interpreted code. The first test apparatus is configured to execute the first interpreted code written in a first language.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: February 7, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Ting-Wei Yu
  • Patent number: 11570041
    Abstract: A method and system for managing performance of over a multimedia content distribution network (MCDN), such as a digital subscriber line network, involves receiving an indication of an impairment in network performance from an MCDN client. The MCDN node associated with the client may be identified and a community of MCDN clients coupled to the MCDN node may be further identified. Impairment information, representative of MCDN equipment, may be collected for each of the MCDN clients. Detailed network diagnostics and field service may be performed for MCDN clients based on a characterization of the impairment parameters. After remediation of the MCDN node, collection of the impairment information may be terminated.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: January 31, 2023
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: James Gordon Beattie, Jr., Edward Marsh
  • Patent number: 11552811
    Abstract: A conferencing system may include a data input port and an ingest system to receive signals through the data input port from a separate conference data source. The ingest system may include a notification subsystem to: identify an error state with respect to the signals received through the data input port; and output a human interface device (HID) notification to a conferencing application, wherein the HID notification includes the identified error state.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: January 10, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Robert C. Brooks, Daniel J. Braden, Chi So
  • Patent number: 11533247
    Abstract: A method for autonomously generating network function test cases includes detecting a failure case in a network function of a core network of a telecommunications network. The method includes, in response to detecting the failure case, autonomously generating a network function test case based on the failure case. The network function test case includes one or more network status parameters detected when detecting the failure case. The method includes supplying the network function test case to a network testing system configured for executing the network function test case by repeating the one or more network status parameters and determining whether or not the network function repeats the failure case.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: December 20, 2022
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Varun Saxena, Venkatesh Aravamudhan, Kawal Sapra
  • Patent number: 11520685
    Abstract: Systems and methods for implementing an end-to-end automation framework. The method includes receiving a testing data file associated with applications. The method also includes initiating a first automation framework corresponding to a first application. The method further includes storing first data generated from the first automation framework in a data file. The method also includes initiating a second automation framework corresponding to a second application. The method further includes storing second data generated from the second automation framework based on at least the first data in the data file. The method also includes generating a data log based on the data file. The method further includes generating for display the data log on a user device.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: December 6, 2022
    Assignee: FMR LLC
    Inventors: Kirankumar Raka, Sean Callot, Alex Thomas, Vamsi Nallagatla, Veena Radhakrishna, Faris Jadadic, Christopher Addison, Rajarajan Venkatesan
  • Patent number: 11509676
    Abstract: In an embodiment, an asset may utilize one or more scanning techniques to detect a first set of software components that is not being natively tracked by an operating system of the asset, the one or more scanning techniques comprising one or more of an evaluation of metadata associated with one or more running processes of the asset, and an evaluation of file system information that characterizes the first set of software components. The asset may further store an indication of the first set of software components detected in accordance with the one or more scanning techniques, and may optionally report the indication to an external entity (e.g., a vulnerability management system).
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: November 22, 2022
    Assignee: TENABLE, INC.
    Inventors: Tony Huffman, Nicholas Miles
  • Patent number: 11500018
    Abstract: Circuits, methods, and systems are provided which facilitate testing of asynchronous circuits having one or more global or local feedback loops. A circuit includes a data path and a scan path. The data path has an input configured to receive a data input signal, and a first output. The scan path includes a first multiplexer having a first input configured to receive the data input signal, a latch coupled to an output of the first multiplexer, a scan isolator coupled to an output of the latch, and a second multiplexer having a first input coupled to the first output of the data path and a second input coupled to an output of the scan isolator. The second multiplexer is configured to output a data output signal.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: November 15, 2022
    Assignees: Taiwan Semiconductor Manufacturing Co., Ltd., National Taiwan University
    Inventors: Ting-Yu Shen, Chien-Mo Li
  • Patent number: 11500563
    Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may, when setting a firmware as a target firmware, generate a plurality of test commands to test the target firmware, test the target firmware by processing the plurality of test commands, and randomly generate logical block address (LBA) values corresponding to each of the plurality of test commands based on a seed value corresponding to each of the plurality of test commands.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: November 15, 2022
    Assignee: SK hynix Inc.
    Inventor: In Jong Jang