Capacitor of semiconductor memory device that has composite A12O3/HfO2 dielectric layer and method of manufacturing the same
A semiconductor memory device that includes a composite Al2O3HfO2 dielectric layer with a layer thickness ratio greater than or equal to 1, and a method of manufacturing the capacitor are provided. The capacitor includes a lower electrode, a composite dielectric layer including an Al2O3 dielectric layer and an HfO2 dielectric layer sequentially formed on the lower electrode, the Al2O3 dielectric layer having a thickness greater than or equal to the HfO2 dielectric layer, and an upper electrode formed on the composite dielectric layer. The Al2O3 dielectric layer has a thickness of 30-60 Å. The HfO2 dielectric layer has a thickness of 40 Å or less.
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This application is a Divisional of U.S. patent Ser. No. 10/713,577, filed on Nov. 12, 2003, now pending, which claims priority from Korean Patent Application No. 2002-69997, filed on Nov. 12, 2002, and which is a Continuation-In-Part (C.I.P.) of U.S. application Ser. No. 10/452,979, filed on Jun. 2, 2003, which claims priority from Korean Patent Application No. 2002-48404, filed on Aug. 16, 2002, all of which are hereby incorporated by reference in their entirety.
BACKGROUND OF THE INVENTION1. Field of the Invention
The present invention relates generally to integrated circuits and a method of manufacturing the same, and more particularly, to a semiconductor device that has a dielectric structure capable of enhancing electrical characteristics, and a method of manufacturing the same.
2. Description of the Related Art
The increasing integration density of semiconductor devices needs a capacitor of a DRAM having greater capacitance per unit area. To meet this requirement, a variety of methods have been introduced. Such methods include a method of increasing the electrode surface area of the capacitor by forming a three-dimensional stacked, cylindrical, or trench type electrode or by forming hemispherical grains on the electrode surface, a method of thinning a dielectric layer, a method of forming the dielectric layer using of high-dielectric material having a high dielectric constant or a ferroelectric material and so on. However, the above methods are not without their limitations. For example, reducing the thickness of the dielectric layer seriously increases leakage current as the capacitance increases. When a material having a high dielectric constant, for example, Ta2O5 or BST((Ba,Sr)TiO3), is used for the dielectric layer, polysilicon, which has been conventionally used to form the electrode, cannot be used. This is because the use of the polysilicon causes tunneling and increases leakage current when the thickness of the dielectric layer is reduced.
As another method for increasing capacitance per unit area of the capacitor, a metal-insulator-metal (MIM) capacitor whose electrode is formed of, instead of polysilicon, a metal having a large work function, such as TiN or Pt, has been suggested. In this method, the growth of a native oxide layer on the metal electrode is suppressed to prevent a capacitance reduction by a low-dielectric oxide layer. In the MIM capacitor, an oxide of a metal having a great affinity for oxygen is mostly used for a dielectric layer.
Recently, in order to resolve problems caused by increase in leakage current with reduced thickness of the dielectric layer, forming a composite dielectric layer, which includes a conventional dielectric layer and a higher dielectric constant layer, instead of a single dielectric layer, has been suggested. The formation of the composite dielectric layer prevents leakage current from increasing due to the use of the higher dielectric constant layer, without reducing capacitance, and improves the electrical properties of the capacitor.
a needs still exists for particularly, a great deal of research has been conducted into a dual or multi-dielectric layer including a Al2O3 layer, which has a small dielectric constant of about 10 but effectively prevents leakage current, and an HfO2 layer, which has a large dielectric constant of 20-25 and effectively prevents leakage current due to its large band gap.
SUMMARY OF THE INVENTIONThe present invention provides a capacitor of a highly integrated semiconductor memory device that includes a composite Al2O3/HfO2 dielectric layer with a layer thickness ratio that is optimized for maximum suppression of leakage current.
The present invention also provides a method of manufacturing a capacitor of a semiconductor memory device that includes a composite Al2O3/HfO2 dielectric layer with a layer thickness ratio that is optimized for maximum suppression of leakage current. According to an aspect of the present invention, there is provided capacitor of a semiconductor memory device, the capacitor comprising: a lower electrode; a composite dielectric layer including an Al2O3 dielectric layer and an HfO2 dielectric layer sequentially formed on the lower electrode, the Al2O3 dielectric layer having a thickness greater than or equal to the HfO2 dielectric layer; and an upper electrode formed on the composite dielectric layer.
According to specific embodiments of the capacitor, the Al2O3 dielectric layer may have a thickness of 30-60 Å. The HfO2 dielectric layer may have a thickness of 40 Å or less, for example, 10-40 Å. The lower electrode is made of one of polysilicon, metal nitride, and noble metal. Preferably, the lower electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials. When the lower electrode is made of polysilicon, the capacitor according to the present invention may further includes a silicon nitride layer between the lower electrode and the composite dielectric layer.
The upper electrode may be made of one of polysilicon, metal nitride, and noble metal. Preferably, the upper electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials.
An alternative capacitor according to the present invention includes: a lower electrode made of one of metal nitride and noble metal; an upper electrode made of one of metal nitride and noble metal; a composite dielectric layer, formed between the lower electrode and the upper electrode, that includes an Al2O3 dielectric layer and an HfO2 dielectric layer with a thickness ratio of Al2O3 to HfO2 that is greater than or equal to 1.
According to another aspect of the present invention, there is provided a method of manufacturing a capacitor of a semiconductor memory device, the method including forming a lower electrode on a semiconductor substrate. Next, a composite dielectric layer is formed on the lower electrode, wherein the composite dielectric layer includes an Al2O3 dielectric layer having a first thickness and an HfO2 dielectric layer having a second thickness, the second thickness being smaller than or equal to the first thickness. An upper electrode is formed on the composite dielectric layer.
According to specific embodiments of the capacitor manufacturing method, each of the Al2O3 dielectric layer and the HfO2 dielectric layer may be formed using one of chemical vapor deposition and atomic layer deposition. The method may further include thermally treating the composite dielectric layer. In which case, thermally treating the composite dielectric layer is performed in a vacuum, in an oxygen atmosphere, in an inert gas atmosphere by rapid thermal annealing, by furnace annealing, plasma annealing, or UV annealing.
Since a capacitor of a semiconductor memory device according to the present invention has a composite Al2O3/HfO2 dielectric layer with a thickness ratio of Al2O3 to HfO2 that is greater than or equal to 1, the leakage current characteristics of the capacitor are improved. With the capacitor according to the present invention that includes the composite Al2O3/HfO2 dielectric layer with optimal thickness ratio between the two dielectric layers, the effect of suppressing increase in leakage current is maximized and superior electrical properties are obtained.
BRIEF DESCRIPTION OF THE DRAWINGSThe above objects and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings in which:
Exemplary embodiments of the present invention described below may be varied in many different forms, and the scope of the present invention is not limited to the following embodiments; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. In the drawings, the thickness of layers and regions are exaggerated for clarity.
Referring to
The Al2O3 dielectric layer 132 may be formed using chemical vapor deposition (CVD) or atomic layer deposition (ALD). When the Al2O3 dielectric layer 132 is formed using ALD, sequential deposition processes are carried out with trimethylaluminum (TMA) as a first reactant and O3 as a second reactant, at a temperature of 200-500° C. and a pressure of 0.1-5 torr. The deposition and purging processes are repeated until the Al2O3 dielectric layer 132 having a desired thickness is obtained. In addition to TMA, other examples of a first reactant for forming the Al2O3 dielectric layer 132 include AlCl3, AlH3N(CH3)3, C6H15AlO, (C4H9)2AlH, (CH3)2AlCl, (C2H5)3Al, (C4H9)3Al, and the like. Other examples of a second reactant for forming the Al2O3 dielectric layer 132 include activated oxidizing agents, such as H2O, H2O2, plasma N2O, plasma O2, and the like. When the Al2O3 dielectric layer 132 is formed using O3 as the second reactant, the Al2O3 dielectric layer 132 has a similar dielectric constant and leakage current characteristics but is more reliable, compared to the case of using H2O as the second reactant.
Referring to
The HfO2 dielectric layer 134 may be formed using CVD or ALD. When the HfO2 dielectric layer 134 is formed using CVD, deposition is carried out with an Hf source material and O2 gas at a temperature of about 400-500° C. and a pressure of about 1-5 torr. Examples of the Hf source material include HfCl4, Hf(OtBu)4, Hf(NEtMe)4, Hf(MMP)4, Hf(NEt2)4, Hf(NMe2)4, and the like.
When the HfO2 dielectric layer 134 is formed using ALD, deposition is carried out with a metal organic precursor as an Hf source and H2O, H2O2, alcohols containing an —OH radical, or O3 or O2 plasma, as an oxygen source, at a temperature of about 150-500° C. and a pressure of about 0.1-5 torr. Examples of the Hf source include HfCl4 and metal organic precursors, such as Hf(OtBu)4, Hf(NEtMe)4, Hf(MMP)4, Hf(NEt2)4, and Hf(NMe2)4. The deposition and purging processes are repeated until the HfO2 dielectric layer 134 having a desired thickness is obtained. When ALD is applied to form the HfO2 dielectric layer 134, low-temperature deposition, effective step coverage, and easy thickness control are ensured. The HfO2 dielectric layer 134 manufactured through either of the above-described methods has good leakage current characteristics and high reliability.
Referring to
Examples of the thermal treatment 136 includes thermal treatment in a vacuum, thermal treatment in an oxygen atmosphere, rapid thermal annealing in an oxygen or inert gas atmosphere, furnace annealing, plasma annealing, UV annealing, and the like. Examples of oxygen gas for RTA include O2, N2O, and the like, and examples of inert gas for RTA include N2, Ar, and the like. The thermal treatment 136 may be followed by additional thermal treatment in an O3 or O2 plasma atmosphere if required. Alternatively, additional thermal treatment may be performed before the thermal treatment 136. Both the thermal treatment 136 and additional treatment may be omitted if required.
Referring to
As described above, a capacitor according to the present invention includes a composite Al2O3/HfO2 dielectric layer composed of the Al2O3 dielectric layer 132 and the HfO2 dielectric layer 134, which has the same or smaller thickness than the Al2O3 dielectric layer 132. In other words, a thickness ratio of the Al2O3 dielectric layer 132 to the HfO2 dielectric layer 134 is greater than or equal to 1. The leakage current characteristics of the capacitor are improved by such a composite Al2O3/HfO2 dielectric layer structure. By forming the thickness of the Al2O3 dielectric layer 132 in a range of 30-60 Å, direct tunnelling through the dielectric layer of the capacitor is suppressed and the composite dielectric layer has stable current leakage current characteristics.
As is apparent from
In
As described above, in a capacitor with such a composite Al2O3/HfO2 dielectric layer, leakage current characteristics are more dependent on the thickness of the Al2O3 dielectric layer than on the thickness of the HfO2 dielectric layer. Therefore, to attain stable leakage current characteristics in capacitors with the composite Al2O3/HfO2 dielectric layer, it is preferable that the thickness of the Al2O3 dielectric is 30 Å or greater.
In general, as the deposition thickness of the HfO2 layer increases, more crystallization occurs during the deposition. This effect can be identified using an atomic force microscope (AFM).
According to the result of an AFM analysis, the HfO2 layer starts to crystallize at a thickness of about 50 Å.
Contrary to the expectation that the thicker HfO2 dielectric layer is, the more the high dielectric layer will improve leakage current characteristics, which is a known advantage of the composite Al2O3/HfO2 dielectric layer structure, in
As is apparent from the above measurement results, in order to maximize the effect of the HfO2 layer reducing the leakage current in capacitors with such a composite Al2O3/HfO2 dielectric layer structure, it is preferable that the thickness of the HfO2 dielectric layer is determined to be smaller than the thickness at which crystallization of the HfO2 layer is initiated, for example, to be about 40 Å or less based on the results of the AFM analysis.
In particular,
As is apparent from
In particular,
As is apparent from
A capacitor of a semiconductor memory device according to the present invention has a composite Al2O3/HfO2 dielectric layer, which is composed of an Al2O3 dielectric layer and an HfO2 dielectric layer, wherein a thickness ratio of the Al2O3 dielectric layer to the HfO2 dielectric layer is greater than or equal to 1. The leakage current characteristics of capacitors are improved with such a composite Al2O3/HfO2 dielectric layer structure. In addition, when the Al2O3 dielectric layer of the composite Al2O3/HfO2 dielectric layer has a thickness of about 30-60 Å, direct tunnelling through the dielectric layer of the capacitor is suppressed and stable leakage current characteristics are obtained. When the HfO2 dielectric layer of the composite Al2O3/HfO2 dielectric layer has a thickness of about 40 Å or less, crystallization of the HfO2 dielectric layer and an accompanying increase in leakage current are suppressed.
With the capacitor according to the present invention that includes a composite Al2O3/HfO2 dielectric layer with optimal thickness ratio between the two dielectric layers, the effect of suppressing increase in leakage current is maximized and superior electrical properties are obtained.
While this invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims
1. A semiconductor memory device, comprising:
- a lower electrode;
- a composite dielectric layer including an Al2O3 dielectric layer and an HfO2 dielectric layer sequentially formed on the lower electrode, the Al2O3 dielectric layer having a thickness greater than or equal to the HfO2 dielectric layer; and
- an upper electrode formed on the composite dielectric layer.
2. The semiconductor device of claim 1, wherein the Al2O3 dielectric layer has a thickness of 30-60 Å.
3. The semiconductor device of claim 1, wherein the HfO2 dielectric layer has a thickness of 40 Å or less.
4. The semiconductor device of claim 3, wherein the HfO2 dielectric layer has a thickness of 10-40 Å.
5. The semiconductor device of claim 1, wherein the lower electrode is made of one of polysilicon, metal nitride, and noble metal.
6. The capacity of claim 5, wherein the lower electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials.
7. The semiconductor device of claim 1, wherein the upper electrode is made of one of polysilicon, metal nitride, and noble metal.
8. The semiconductor device of claim 7, wherein the upper electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials.
9. The semiconductor device of claim 1, wherein the lower electrode is made of polysilicon, and a silicon nitride layer is further formed between the lower electrode and the composite dielectric layer.
10. A semiconductor memory device, comprising:
- a lower electrode made of one of metal nitride and noble metal;
- an upper electrode made of one of metal nitride and noble metal;
- a composite dielectric layer, formed between the lower electrode and the upper electrode, that includes an Al2O3 dielectric layer and an HfO2 dielectric layer with a thickness ratio of Al2O3 to HfO2 that is greater than or equal to 1.
11. The semiconductor device of claim 10, wherein the Al2O3 dielectric layer has a thickness of 30-60 Å.
12. The semiconductor device of claim 10, wherein the HfO2 dielectric layer has a thickness of 40 Å or less.
13. The semiconductor device of claim 12, wherein the HfO2 dielectric layer has a thickness of 10-40 Å.
14. The semiconductor device of claim 10, wherein the lower electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials.
15. The semiconductor device of claim 10, wherein the upper electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials.
Type: Application
Filed: Dec 8, 2004
Publication Date: Apr 28, 2005
Applicant: Samsung Electronics Co., Ltd. (Suwon-Si)
Inventors: Ki-Yeon Park (Kyungki-do), Sung-Tao Kim (Seoul), Young-Sun Kim (Kyungki-do), In-Sung Park (Seoul), Jae-Hyun Yeo (Seoul), Ki-Vin Im (Kyungki-do)
Application Number: 11/009,198