Method of growing semi-insulating GaN layer
Disclosed herein is a method for growing a semi-insulating GaN layer with high sheet resistance by controlling the size of grains through changes in growth temperature at the initial growth stage of the layer, without doping of dopants. The method comprises the steps of growing a buffer layer on a substrate at a first growth temperature, growing a GaN layer on the buffer layer at a second growth temperature higher than the first growth temperature for a first growth time (a first growth step), growing the GaN layer at increasing temperatures from the second growth temperature to a third growth temperature higher than the second growth temperature for a second growth time (a second growth step), and growing the GaN layer at the third growth temperature for a third growth time (a third growth step).
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The present application is based on, and claims priority from, Korean Application Number 2004-51983, filed Jul. 5, 2004, the disclosure of which is hereby incorporated by reference herein in the entirety.
BACKGROUND OF THE INVENTION1. Field of the Invention
The present invention relates to a method for growing a semi-insulating undoped GaN layer, and more particularly to a method for growing an undoped GaN layer with high sheet resistance by controlling the size of grains through changes in growth temperature at the initial growth stage of the layer, without doping of dopants.
2. Description of the Related Art
With the recent development of digital communication technologies, communication technologies for ultrahigh-speed and high-capacity signal transmission have been rapidly advanced. In particular, as the demands on personal cellular phones, satellite communications, military radars, broadcasting communications, communication satellites, and the like have been increased in wireless communication technologies, there is an increasing need for high-speed and high-power electronic devices essential to ultrahigh-speed digital communication systems in the microwave and millimeter-wave bands. Since GaN as a nitride semiconductor material has superior physical properties, e.g., large energy gap, superior thermal and chemical stability, high electron saturation velocity (˜3×107 cm/sec), etc., it has strong potential for application to optoelectronic and high-frequency and high-power electronic devices. A number of studies on GaN are being actively undertaken in various fields.
In particular, it is widely known that GaN has various applications in the field of electronic devices.
Electronic devices fabricated employing GaN have many advantages in terms of a high breakdown voltage (˜3×106 V/cm), maximum current density, stable high temperature operation, high thermal conductivity, etc. Since heterostructure field effect transistors (HFETs) fabricated using an AlGaN/GaN heterojunction structure have large band-discontinuity at the junction interface, a high concentration of free electrons may be present at the interface and thus the electron mobility is further increased. Further, since the GaN layer has a high surface-acoustic-wave velocity, superior temperature stability and polarization effects of piezoelectricity, it can be easily used for the fabrication of a band-pass filter which can be operated on the order of GHz or more.
As such, the GaN layer used in electronic devices, for example, HFETs and surface acoustic wave (SAW) devices, is commonly grown on a sapphire substrate by metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). However, since there is a large difference in the lattice constant and thermal expansion coefficient between the sapphire substrate and the GaN layer, the growth of a single crystal is difficult and many defects are generated during growth of the layer. In addition, nitrogen vacancies are formed due to highly volatile nitrogen. Furthermore, since n-type conductivity naturally takes place due to the influence of impurities, such as oxygen, it is difficult to form a semi-insulating layer. For these reasons, a leakage current is caused during fabrication of electronic devices, such as HFETs and SAW devices, leading to low transconductance and increased insertion loss.
Referring to
Therefore, the present invention has been made in view of the above problems of the prior art, and it is an object of the present invention to provide a method for growing a semi-insulating GaN layer with high sheet resistance by controlling the size of grains through changes in growth temperature at the initial growth stage of the layer, without doping of dopants such as Zn, Mg, C, Fe, etc.
In order to accomplish the above object of the present invention, there is provided a method for growing a semi-insulating GaN layer, comprising the steps of: growing a buffer layer on a substrate at a first growth temperature; growing a GaN layer on the buffer layer at a second growth temperature higher than the first growth temperature for a first growth time (a first growth step); growing the GaN layer at increasing temperatures from the second growth temperature to a third growth temperature higher than the second growth temperature for a second growth time (a second growth step); and growing the GaN layer at the third growth temperature for a third growth time (a third growth step).
It is preferable that the second growth temperature is in the range of about 800° C. to about 950° C/, and the third growth temperature is in the range of about 1,000° C. to 1,100° C.
Further, it is preferable that the first growth time is about 3 minutes or less, and the second growth time is about 5 minutes or less.
BRIEF DESCRIPTION OF THE DRAWINGSThe above and other objects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
A method for growing a semi-insulating GaN layer according to the present invention will now be described in more detail with reference to the accompanying drawings.
After the formation of the buffer layer, the first growth temperature is increased to a second growth temperature. At this temperature, a GaN layer is grown on the buffer layer for a first growth time (II, hereinafter referred to as ‘a first growth step’). It is preferable that the buffer layer is subjected to annealing at the second growth temperature for several minutes, before the growth of the GaN layer on the buffer layer at the second growth temperature. The second growth temperature is a temperature at which the size of grains present in the buffer layer is relatively small and the density of grains is high. The second growth temperature is lower than the growth temperatures of conventional GaN layers. By growing the GaN layer on the buffer layer having relatively small and highly dense grains formed thereon at the second growth temperature, Ga vacancies capable of capturing electrons, acting as carriers, are formed. Relatively large grains are formed at a growth temperature (about 1,000° C.˜1,100° C.) of a conventional GaN layer, and thus Ga vacancies capable of capturing electrons are seldom formed. These uncaptured electrons act as carriers, causing the degradation of insulation. The second growth temperature for forming small-sized grains is preferably in the range of about 800° C. to 950° C.
It is preferable that the first growth time is relatively short. This is because the degradation of crystallinity is caused by the GaN layer grown on the buffer layer having relatively small and highly dense grains formed thereon. The first growth time is preferably 3 minutes or shorter.
After the first growth step is completed, the GaN layer is grown while the temperature is increased to a third growth temperature higher than the second growth temperature (III, hereinafter referred to as ‘a second growth step’). While the small and highly dense grains are formed at the initial stage of the first growth step, the GaN layer is grown at the first growth step for a relatively short time, and the growth temperature is increased to a third growth temperature, defects associated with Ga vacancies are formed. The presence of these defects leads to the formation of a larger number of deep trap levels capable of capturing free electrons, acting as carriers, in the GaN band gap. Specifically, when the free electrons are captured by the Ga vacancies, the number of active carriers in the GaN layer is reduced, and finally the GaN layer exhibits semi-insulation. To attain better semi-insulation of the GaN layer, the second growth time is preferably 5 minutes or less.
After the second growth step is completed, the GaN layer is grown to a desired thickness while maintaining the third growth temperature to form the final semi-insulating GaN layer.
In order to develop the method for growing a semi-insulating GaN layer according to the present invention, the present inventors have conducted the following experiment. Hereinafter, the experimental results will be explained in more detail with reference to the accompanying drawings.
As is apparent from the SEM images shown in
As can be seen from the results of FIGS. 3 to 5, the grains present on the surface of the low-temperature buffer layers became large and less dense, with increasing temperatures. The large, less dense and crystalline grains can improve the crystallinity of the overlying GaN layer, but less Ga vacancies capable of capturing electrons are formed in the GaN layer, leading to high carrier concentration. Accordingly, the GaN layer is conductive. From the experimental results of FIGS. 3 to 5, it can be concluded that the low-temperature buffer layers annealed at about 950° C. or lower have many Ga vacancies capable of capturing electrons.
In order to evaluate the characteristics of the GaN layers, the present inventors have further conducted the following experiment. First, low-temperature buffer layers were grown to a thickness of 160 Å on respective sapphire substrates. Then, after the growth temperature was increased to 950° C., 980° C., 1,000° C., 1,020° C. and 1,050° C., GaN layers were grown to a thickness of 1.7 μm on the respective sapphire substares for about 40 minutes.
Thus, the growth procedure of a semi-insulating GaN layer shown in
The present inventors have compared the initial growth stage of GaN layers grown by a conventional method and the method of the present invention. According to the conventional method, after a buffer layer was grown, a GaN layer was grown on the buffer layer at an increased temperature of 1,020° C. for 3 minutes. In contrast, the method of the present invention was performed as follows: first, a low-temperature buffer layer was grown. Then, after the temperature was increased to 950° C., a GaN layer was grown at this temperature for 1 minute. Thereafter, the GaN layer was further grown while the temperature was increased to 1,020° C. for 2 minutes. The GaN layer was finally grown while the temperature was maintained at 1,020° C.
As explained above, the semi-insulating GaN layer grown by the method of the present invention has various applications in electronic devices requiring semi-insulation. In particularly, the semi-insulating GaN layer grown by the method of the present invention can be widely used in electronic devices having a heterojunction structure. The term “heterojunction structure” refers to one in which materials at different energy levels are joined so that electrons can be stored therein. Representative electronic devices having a heterojunction structure are heterojunction field-effect transistors (HFETs), metal semiconductor field effect transistors (MESFETs), metal insulator semiconductor field effect transistors (MISFETs), and the like. Further, since the GaN layer has piezoelectric effects and high wave propagation velocity along the surface, it is suitably used as a material for surface acoustic wave (SAW) devices which can be used in the high-frequency region.
Metal semiconductor field effect transistors (MESFETs) employ a high concentration n-doped GaN layer, instead of the AlGaN layer employed in the HEETs. Only when there is no leakage current flowing from the high concentration n-doped GaN layer to the underlying insulating GaN layer can MESFETs having superior electrical properties be fabricated.
Further, metal insulator semiconductor field effect transistors (MISFETs) have a structure wherein an insulating layer, such as a SiO2 layer, is interposed between the AlGaN layer and the gate electrode of the HFET. Like HFETs and MESFETs, only when there is no leakage current flowing into the insulating GaN layer can MISFETs having superior electrical properties be fabricated.
Although the present invention has been described herein with reference to the foregoing embodiments and the accompanying drawings, the scope of the present invention is defined by the claims that follow. Accordingly, those skilled in the art will appreciate that various substitutions, modifications and changes are possible, without departing from the technical spirit of the present invention as disclosed in the accompanying claims.
As apparent from the above description, according to the method of the present invention, a highly semi-insulating GaN layer with high sheet resistance can be grown by controlling the growth temperature and time at the initial growth stage of the layer, without doping of dopants. In addition, the use of the highly semi-insulating GaN layer grown by the method of the present invention enables fabrication of HFETs and SAW devices having superior electrical properties.
Claims
1. A method for growing a semi-insulating GaN layer, comprising the steps of:
- growing a buffer layer on a substrate at a first growth temperature;
- growing a GaN layer on the buffer layer at a second growth temperature higher than the first growth temperature for a first growth time (a first growth step);
- growing the GaN layer at increasing temperatures from the second growth temperature to a third growth temperature higher than the second growth temperature for a second growth time (a second growth step); and
- growing the GaN layer at the third growth temperature for a third growth time (a third growth step).
2. The method according to claim 1, further comprising the step of annealing the buffer layer at the second growth temperature before the first growth step.
3. The method according to claim 1, wherein the second growth temperature is in the range of about 800° C. to about 950° C., and the third growth temperature is in the range of about 1,000° C. to 1,100° C.
4. The method according to claim 1, wherein the first growth time is about 3 minutes or less, and the second growth time is about 5 minutes or less.
5. An electronic device having a heterojunction structure formed by using a semi-insulating GaN layer grown by the method according to any one of claim 1.
6. A surface acoustic wave (SAW) device fabricated using a semi-insulating GaN layer grown by the method according to claim 1, as a piezoelectric substrate.
Type: Application
Filed: Oct 15, 2004
Publication Date: Jan 5, 2006
Applicant: Samsung Electro-Mechanics Co., Ltd. (Suwon)
Inventors: Jae Lee (Suwon), Jung Lee (Daegu)
Application Number: 10/965,263
International Classification: H01L 21/20 (20060101);