Boost circuit and level shifter
A level shifter including a first boost circuit, an inverter, a second boost circuit and a level shift circuit is disclosed. The first boost circuit receives an input signal, and a first amplification factor for the input signal is determined based on a control signal. The inverter receives the input signal to generate an inverted input signal. The second boost circuit is coupled to an output terminal of the inverter to receive the inverted input signal, and a second amplification factor for the inverted input signal is determined based on the control signal. The level shift circuit has a first input terminal and a second input terminal respectively coupled to output terminals of the first boost circuit and second boost circuit to change the voltage level of output signals from the first boost circuit and second boost circuit to a first voltage level.
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1. Field of the Invention
The invention relates to a level shifter, and more particularly to a two-stage level shifter with a boost circuit.
2. Description of the Related Art
The conventional voltage pull-up circuit is typically implemented by a level shifter. The level shifter includes two input terminals respectively receiving an input signal and an inverted input signal. In a typical level shifter, the input terminal is electrically connected to the gate of a transistor. If the output current of the level shifter needs to be increased, the W/L ratio of the transistor coupled to the input terminal must be raised firstly, thus, the layout area of the level shifter will be increased. To completely turn on an NMOS transistor, the input positive voltage applied to the gate of the NMOS transistor must exceed a predetermined voltage level. If the input positive voltage applied to the gate of the NMOS transistor does not exceed the predetermined voltage level, the NMOS transistor can not be completely turned on and only outputs small output current. If the voltage level of the input signal applied to the level shift does not exceed a predetermined voltage level, the level shifter may be not properly driven.
BRIEF SUMMARY OF THE INVENTIONIn one aspect of the invention, a boost circuit comprising a first transistor, a second transistor, a capacitor module, a third transistor, a fourth transistor and a fifth transistor is provided. The first transistor has a first source, a first gate and a first drain, wherein the first source is coupled to a voltage source. The second transistor has a second source, a second gate and a second drain, wherein the second drain is coupled to the first drain, the second source is grounded, and the second gate is coupled to the first gate to receive an input signal. The capacitor module has a first terminal and a second terminal, and is controlled by a control signal to change a capacitance of the capacitor module for changing the discharge time of the capacitor module, wherein the first terminal is coupled to the first drain and the second drain. The third transistor has a third source, a third gate and a third drain, wherein the third source is coupled to the voltage source, and the third gate is coupled to an output terminal. The fourth transistor has a fourth source, a fourth gate and a fourth drain, wherein the fourth gate receives the input signal, the fourth source and the third drain are coupled to the second terminal of the capacitor module, and the fourth drain is coupled to the output terminal. The fifth transistor has a fifth source, a fifth gate and a fifth drain, wherein the fifth gate receives the input signal, the fifth drain is coupled to the output terminal, and the fifth source is grounded.
In another aspect of the invention, a level shifter comprises a first boost circuit, an inverter, a second boost circuit and a level shift circuit is provided. The first boost circuit receives an input signal, and determines a first amplification factor of the input signal based on a control signal. The inverter receives the input signal to generate an inverted input signal. The second boost circuit is coupled to an output terminal of the inverter to receive the inverted input signal, and to determine a second amplification factor of the inverted input signal based on the control signal. The level shift circuit has a first input terminal and a second input terminal respectively coupled to output terminals of the first boost circuit and second boost circuit to change the voltage level of output signals from the first boost circuit and second boost circuit to a first voltage level.
A detailed description is given in the following embodiments with reference to the accompanying drawings.
The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.
When the input signal Vin is at high voltage level, the transistor T5 is turned on and the voltage level of the output signal is 0. The voltage level of the third drain is at VDD because the capacitor module 11 is charged in a previous cycle. When the input signal Vin is at low voltage level, the capacitor module 11 is charged by the voltage VDD and the voltage level of the third drain is pulled up to 2VDD. Because the input signal Vin is at low voltage level, the transistor T5 and the transistor T4 are turned on, thus, the voltage level of the output signal is 2 VDD. In this embodiment, the capacitance and the discharge time of the capacitor module 11 can be changed by the control signal Cs.
For further illustration, please refer to
When the output signal of the second boost circuit 32 is at low voltage level and the transistors T12 and T13 are turned on, the transistors T16 and T17 are turned on, and the voltage level of the output signal Vout is VDD2. In
While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Claims
1. A boost circuit, comprising:
- a first transistor, having a first source, a first gate and a first drain, wherein the first source is coupled to a voltage source;
- a second transistor, having a second source, a second gate and a second drain, wherein the second drain is coupled to the first drain, the second source is grounded, and the second gate is coupled to the first gate to receive an input signal;
- a capacitor module, having a first terminal and a second terminal, controlled by a control signal to change a capacitance of the capacitor module for changing the discharge time of the capacitor module, wherein the first terminal is coupled to the first drain and the second drain;
- a third transistor, having a third source, a third gate and a third drain, wherein the third source is coupled to the voltage source, and the third gate is coupled to an output terminal;
- a fourth transistor having a fourth source, a fourth gate and a fourth drain, wherein the fourth gate receives the input signal, the fourth source and the third drain are coupled to the second terminal of the capacitor module, and the fourth drain is coupled to the output terminal; and
- a fifth transistor, having a fifth source, a fifth gate and a fifth drain, wherein the fifth gate receives the input signal, the fifth drain is coupled to the output terminal, and the fifth source is grounded.
2. The circuit as claimed in claim 1, wherein the capacitor module includes a first capacitor and a second capacitor, the first capacitor is further coupled to a switch device, and the first capacitor is connected in parallel to the second capacitor in response to the switch device is turned on based on the control signal.
3. The circuit as claimed in claim 2, wherein the first capacitor and the second capacitor are made up of transistors.
4. The circuit as claimed in claim 2, wherein the switch device is a transmission gate.
5. A Level shifter, comprising:
- a first boost circuit for receiving an input signal, and determining a first amplification factor of the input signal based on a control signal;
- an inverter for receiving the input signal to generate an inverted input signal;
- a second boost circuit coupled to an output terminal of the inverter to receive the inverted input signal and to determine a second amplification factor of the inverted input signal based on the control signal; and
- a level shift circuit having a first input terminal and a second input terminal respectively coupled to output terminals of the first boost circuit and second boost circuit to change the voltage level of output signals from the first boost circuit and second boost circuit to a first voltage level.
Type: Application
Filed: Mar 27, 2007
Publication Date: Jun 12, 2008
Applicant:
Inventors: Yen-Wen Chen (Taipei County), Yen-Ynn Chou (Taipei County)
Application Number: 11/727,556
International Classification: H03L 5/00 (20060101); G05F 3/02 (20060101);