OPTICALLY MONITORING AN ALOX FABRICATION PROCESS

A method of forming an insulator that passes through a metal substrate (302) comprising: anodizing a region (312a, 312b, 314,316a, 316b, 318, 320a, 320b, 322, 324a, 324b) of the substrate to form the insulator; illuminating the region with light (330); and determining if the light passes through the substrate at the region to determine if the insulator passes completely through the substrate.

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Description
FIELD

This application relates to inspection and process control for interconnect substrates, more particularly, ALOX™ substrates.

BACKGROUND

Microelectronics packaging and interconnection technologies have undergone both evolutionary and revolutionary changes to serve the trend towards miniaturization in electronics equipment, which is now very evident in military, telecommunications, industrial and consumer applications. The trend has been driven by various forces including specialist requirements for size and weight as well as cost and aesthetics, which have led to various innovative developments in packaging of integrated circuits and in connectivity on electronics substrates and circuit boards.

In a broad sense, “microelectronic packaging” can simply be viewed as a way to interface an IC (or a die) with the “real” world of peripherals such as power sources (e.g., power supplies, batteries, and the like), input devices (e.g., keyboards, mouses, and the like), and output devices (e.g., monitors, modems, antennas, and the like). To do this, you need to connect the IC (or die) with the peripheral—basically, to get signals in and out of the IC, as well as to provide operating power to the IC—and this is typically done with wires or conductive traces on a printed wiring board (PWB).

There are many examples (or subsets) of interconnect substrates, one example is the “interposer”. Generally, an interposer provides electrical connections between an IC and a package, may perform a pitch spreading function, typically does not “translate” connection types (rather, has one connection type on both the “in” side and the “out” side), and often must provide a thermal management function.

A fundamental purpose of an interconnect substrate is, simply stated, to electrically connect two electronic components with one another. If, for example, you have a simple two terminal device (such as a simple resistor having two leads) poking through two holes on a PWB to conductors on the underside of the PWB, this is relatively straightforward, even if there is a conductive trace on the PWB which needs to pass under a body portion of the two terminal device (without connecting to it). However, with more complex electronic devices having many terminals (for example, input/output (I/O) connections) it is inevitable that there needs to be many crossovers to effect complex routing of signals (to a lesser extent, power). Solutions to this topological problem is multilayer interconnect technology.

In multilayer interconnect technology, there are typically several metal layers (of conductive traces) separated from one another by layers dielectric material. (Kind of like a layer cake, or lasagna.) Multilayer interconnect substrates with tens of alternating dielectric and conductive layers are not uncommon, and typically many layers are needed to effect complex routing schemes (schematically speaking, many cross-overs).

A key element in every multilayer interconnect technology is the “via”—an electrical connection between conductive traces of two adjacent metal layers separated by a dielectric material.

In conventional multilayer substrate technologies a dielectric sheet is used as base material, in which the vias are formed using drilling (etching or punching) and hole plating process. (A via is kind of like a metal eyelet for shoelaces.)

In multilayer substrate technology one type of via is the “blind” via which extends through a given dielectric layer(s) to a conductive trace on an inner metal layer, rather than completely through the entire substrate. Another blind via may extend through the remaining dielectric layers from a different position on the conductive trace, which could be useful for pitch spreading, or simply for effecting complex interconnections.

Vias provide electrical connectivity between conductive traces on two different (typically adjacent) metal layers, and also can serve a role in conducting heat away from an operating electronic device mounted on the substrate. Typically, with a dielectric-based substrate (such as a ceramic substrate), the vast bulk of the substrate is poor thermal conductivity ceramic material, in which case many vias can be formed and filled to improve the thermal conductivity. ALOX™ substrate technology is described in the following patents and publications: U.S. Pat. No. 5,661,341; U.S. Pat. No. 6,448,510; U.S. Pat. No. 6,670,704; International Patent Publication No. WO 00/31797; and International Patent Publication No. WO 04/049424, the disclosures of which are incorporated herein by reference.

ALOX™ substrate technology is a multilayer substrate technology developed for microelectronics packaging applications. The ALOX™ substrate technology does not require drilling and hole plating—the via is of solid full aluminum and the dielectric is of a high quality ceramic nature. The process is simple and low cost, and contains a low number of process steps. The ALOX™ substrate technology serves as a wide technology platform, and can be implemented in various electronics packaging applications such as for RF, SiP, 3-D memory stacks, MEMS and high power modules and components.

The starting material in the ALOX™ process is a conductive aluminum sheet. A first step in the process is masking the top and bottom of the sheet using conventional masking techniques and materials (for example, lithography and/or photoresist). Via structures are formed using anodization of the sheet through the whole thickness of the sheet. The exposed areas are converted into aluminum oxide, which is ceramic in nature and a highly insulating dielectric material. The protected unexposed areas remain as aluminum elements—the connecting vias.

In its simplest form, an ALOX™ interconnect substrate is formed by electrochemical anodic oxidation of selected portions of an initially conductive valve metal (for example, aluminum, titanium, or tantalum) substrate resulting in areas (regions) of conductive (starting) material which are geometrically defined and isolated from one another by areas (regions) of anodized (non-conductive, such as aluminum oxide, or alumina) isolation structures. “Vertical” isolation structures extend into the substrate, including completely through the substrate. “Horizontal” isolation structures extend laterally across the substrate, generally just within a surface thereof. Anodizing from one or both sides of the substrate can be performed to arrive at complex interconnect structures.

In a more complex form, such as disclosed in U.S. Pat. No. 6,670,704, using this innovative process, a multilayer low cost ceramic board is formed. A complete “three metal layer” core contains an internal aluminum layer, top and bottom patterned copper layers with though vias and blind vias incorporated in the structure. The ALOX™ technology offers a very simple and low cost production process; excellent thermal performance product, superior mechanical and electrical properties. The ALOX™ technology is illustrated in the following figures.

FIG. 1A illustrates a schematic process flow 100 for via formation in an ALOX™ substrate, and the resulting via formed thereby, according to the prior art. Starting (a) with an aluminum layer or substrate 102, a masking material 104 such as photoresist is applied (b) and patterned (c) to form optionally islands 105 of photoresist. Then, the unprotected aluminum is anodized (d), converting selected areas 106 of the layer/substrate 102 into non-conducting aluminum oxide leaving vias 108 of conducting aluminum.

Notice in step (d) that the anodizing proceeds partially anisotropically, extending slightly under the photoresist and also tapering in width from thickest at the top and bottom surfaces of the substrate to thinner within the body of the substrate. In step (d), anodization proceeds from both sides of the substrate. (In a situation involving a layer rather than a substrate, anodization would proceed from only an exposed side of the layer.) The resulting aluminum oxide is porous.

The photoresist islands 105 are stripped (e), and pore filling material, such as a resin is diffused into the porous oxide regions of the layer/substrate. For a substrate, resin for example can be diffused from both sides. (Theoretically, the substrate could be impregnated with resin before photoresist strip.) The result is an aluminum via 108 extending completely through the substrate from one surface thereof to the opposite surface thereof, and the via is isolated from other such vias (not shown) by the insulating (and impregnated) aluminum oxide material 106. This is referred to by the assignee as the “core of cores”.

Next, metal interconnect layers 110 of conductive traces (such as copper) are applied (f), using conventional technology to achieve what the assignee refers to as a “core”, which is a 3 metal layer structure. The process illustrated generally in FIG. 1A is shown and described in greater detail in U.S. Pat. No. 6,448,510.

FIG. 1B is a cross-sectional view of an ALOX™ substrate comprising a core having 3 metal layers. As illustrated therein, a substantially planar aluminum sheet 122 having a nominal thickness T typically between 125-250 μm (microns) is anodized to create regions 124 of modified aluminum oxide (Al2O3) bounding and defining a variety of aluminum structures comprising (from left to right in the figure) an internal aluminum layer 126 (which can be used for power or ground), an aluminum via 128 extending completely through the sheet from the top surface to the bottom surface thereof, and blind/thermal vias 130 and 132. The process illustrated generally in FIG. 1B is shown and described in greater detail in U.S. Pat. No. 6,670,704.

GLOSSARY

Unless otherwise noted, or as may be evident from the context of their usage, any terms, abbreviations, acronyms or scientific symbols and notations used herein are to be given their ordinary meaning in the technical discipline to which the disclosure most nearly pertains. The following terms, abbreviations and acronyms may be used throughout the descriptions presented herein and should generally be given the following meaning unless contradicted or elaborated upon by other descriptions set forth herein. Some of the terms set forth below may be registered Trademarks®.

  • ALOX™ A substrate technology (proprietary to Micro Components Ltd. of Ramat-Gabriel, Israel) wherein the substrate is metal based, made of a combination of aluminum metal and aluminum oxide based dielectric material forming a multi layer interconnect substrate, typically in a BGA format.
    Aluminum Aluminium, or aluminum (Symbol Al)
  • Ampere (A) is the SI base unit of electrical current equal to one coulomb per second. It is named after Andre-Marie Ampere, one of the main discoverers of electromagnetism.
  • Angstrom (Å) a unit of measurement equal to 10 exp-10 meters (0.0000000001 meter). 10 Å=1 nm (nanometer).
  • array a set of elements (usually referring to leads or balls in the context of semiconductor assembly) arranged in rows and columns
  • assembly the process of putting a semiconductor device or integrated circuit in a package of one form or another; it usually consists of a series of packaging steps that include: die preparation, die attach, wirebonding, encapsulation or sealing, deflash, lead trimming/forming, and lead finish
  • chip A portion of a semiconductor wafer, typically containing an entire circuit which has not yet been packaged
  • chip-scale package (CSP)—any package whose dimensions do not exceed the die's dimensions by 20%
  • die 1. a single chip from a wafer, 2. a small block of semiconductor material containing device circuitry.
  • die attach the assembly process step wherein the die is mounted on the support structure of the package, for example, the leadframe, die pad, cavity, or substrate
  • die used synonymously with “chip”. Plural, “dies” or “dice”.
  • earth (electrical) another name for “ground”
  • IC or ICC short for Integrated Circuit, or Integrated Circuit Chip.
  • Interconnect Substrate As used herein, an interconnect substrate is a typically flat substrate used to connect electronic components with one another and having patterns of conductive traces in at least one layer for effecting routing of signals (and power) from one electronic component to another, or to the outside world. Typically, an interconnect substrate has many metallization layers with the conductive traces, and vias connect selected traces from one layer to selected traces of another layer.
  • interposer an intermediate layer or structure that provides electrical connection between the die and the package
  • leadframe A metal frame used as skeleton support to provides electrical connections to a chip in many package types.
  • mask Broadly speaking, a mask is any material forming a pattern for a subsequent process to selectively affect/alter certain areas of a semiconductor substrate, and not others. Photoresist is a commonly-used masking material which is applied to the substrate, then washed off (stripped) after the desired process is completed.
  • microelectronics The branch of electronics that deals with miniature (often microscopic) electronic components.
  • micron (μm) a unit of measurement equal to one millionth of a meter (0.000001 meter); also referred to as a micrometer.
  • mil a unit of measurement equal to 1/1000 or 0.001 of an inch; 1 mil=25.4 microns
  • nanometer (nm) a unit of measurement equal to one billionth of a meter (0.000000001 meter).
  • package a container, case, or enclosure for protecting a (typically solid-state) electronic device from the environment and providing connections for integrating a packaged device with other electronic components.
  • photoresist or, simply “resist”. Photoresist (PR) is a photo-sensitive material used in photolithography to transfer a pattern from a mask onto a wafer. Typically, a liquid deposited on the surface of the wafer as a thin film then solidified by low temperature anneal. Exposure to light (irradiation) changes the properties of the photoresist, specifically its solubility. “Negative” resist is initially soluble, but becomes insoluble after irradiation. “Positive” resist is initially insoluble, but becomes soluble after irradiation. Photoresist is often used as an etch mask. In the context of the present disclosure, photoresist may be used as an oxidation mask.
  • PWB short for printed wiring board. Also referred to as printed circuit board (PCB).
  • semiconductors 1. Any of various solid crystalline substances, such as germanium or silicon, having electrical conductivity greater than insulators but less than good conductors, and used especially as a base material for computer chips and other electronic devices. 2. An integrated circuit or other electronic component containing a semiconductor as a base material.
  • SI units The SI system of units defines seven SI base units: fundamental physical units defined by an operational definition, and other units, which are derived from the seven base units, including:
    • kilogram (kg), a fundamental unit of mass
    • second (s), a fundamental unit of time
    • meter, or metre (m), a fundamental unit of length
    • ampere (A), a fundamental unit of electrical current
    • kelvin (K), a fundamental unit of temperature
    • mole (mol), a fundamental unit of quantity of a substance (based on number of
      • atoms, molecules, ions, electrons or particles, depending on the substance)
    • candela (cd), a fundamental unit luminous intensity
    • degrees Celsius (° C.), a derived unit of temperature. t° C.=tK−273.15
    • farad (F), a derived unit of electrical capacitance
    • henry (H), a derived unit of inductance
    • hertz (Hz), a derived unit of frequency
    • ohm (Ω), a derived unit of electrical resistance, impedance, reactance
    • radian (rad), a derived unit of angle (there are 2π radians in a circle)
    • volt (V), a derived unit of electrical potential (electromotive force)
    • watt (W), a derived unit of power
  • SIP short for ‘System-in-a-Package’. A SIP (or SiP) is a package that contains several chips and components that comprise a completely functional stand-alone electronic system (also acronym for ‘Single-in-Line Package’—a through-hole package whose leads are aligned in just a single row, but that definition is not used in the description herein)
  • SMD short for ‘Surface-Mount Device’
  • SMT short for ‘Surface-Mount Technology’
  • substrate 1. the base material of the support structure of an IC; 2. the surface where the die or other components are mounted during packaging; 3. the semiconductor block upon which the integrated circuit is built
  • surface-mount a phrase used to denote that a package is mounted directly on the top surface of the board, as opposed to ‘through-hole’, which refers to a package whose leads need to go through holes in the board in order to get them soldered on the other side of the board
  • valve metal a metal, such as aluminum, which is normally electrically conductive, but which can be converted such as by oxidation to both a non-conductor (insulator) and chemical resistance material. Valve metals include aluminum (Al, including Al 5052, Al 5083, Al 5086, Al 1100, Al 1145, and the like), titanium, tantalum, also niobium, europium and like.
  • via A metallized or plated-through hole, in an insulating layer, for example, a substrate, chip or a printed circuit board which forms a conduction path itself and is not designed to have a wire or lead inserted therethrough. Vias can be either straight through (from front to back surface of the substrate) or “blind”. A blind via is a via that extends from one surface of a substrate to within the substrate, but not through the substrate.
  • Volt (V) A measure of “electrical pressure” between two points. The higher the voltage, the more current will be pushed through a resistor connected across the points. The volt specification of an incandescent lamp is the electrical “pressure” required to drive it at its designed point. The “voltage” of a ballast (for example 277 V) refers to the line voltage it must be connected to. A kilovolt (KV) is one thousand volts.
  • Voltage A measurement of the electromotive force in an electrical circuit or device expressed in Volts. It is often taught that voltage can be thought of as being analogous to the pressure (rather than the volume) of water in a waterline.
  • Watt (W) A unit of electrical power. Lamps are rated in watts to indicate the rate at which they consume energy. A kilowatt is 1000 watts.
  • Wavelength The distance between two neighboring crests of a traveling wave. The wavelength of (visible) light is between about 400 and about 700 nanometers.

SUMMARY

Generally, the disclosure is described in the context of ALOX™ substrate technology. The ALOX™ substrate technology employs area selective anodization of aluminum substrates for forming patterned anodized (oxidized) areas defining corresponding patterned electrically-isolated aluminum conductive areas, such as vias extending through the substrate. Typically, a vertical isolation structure surrounding a via will be ring-shaped.

As used herein, aluminum is exemplary of any number of “valve metal” starting materials that is initially a good electrical conductor, and which can be selectively converted to a non-conductive (insulating) material (such as, but not limited to aluminum oxide) by a process such as (but not limited to) electrochemical anodic oxidation resulting in conductive areas (regions) which are defined and isolated from one another by the insulting areas (regions).

The inventors have noted that aluminum oxide (Al2O3) is relatively transparent to light and that therefore, a fully oxidized zone (such as vertical isolation structure) can be visually observed and inspected using light transmission. The inspection process may be automated.

An aspect of some embodiments of the invention relates to providing a method for process control in ALOX™ substrate fabrication. A step in ALOX™ substrate fabrication is anodizing an aluminum panel, area selectively, to form pre-designed zones (vertical isolation structures) in the panel, which are fully oxidized through the whole thickness of the panel. Methods are disclosed for monitoring this process step and determining when it is complete using visual inspection of transmitted light through the oxidized zones. The inspection process may be automated.

According to an embodiment of the disclosure, a method of making an interconnect substrate comprises: providing a valve metal substrate; selectively anodizing the substrate to form vertical isolation areas that extend completely through the substrate; and determining whether the vertical isolation areas have been fully formed by shining light through the substrate. The valve metal substrate may be aluminum.

Light may be observed shining through the substrate, and a determination may be made that a given vertical isolation area is defined as fully formed if it appears as a continuous area of light. The vertical isolation areas may extend through the substrate, surround and define valve metal vias which extend through the substrate and which are electrically isolated from other valve metal vias and from the body of the substrate, in which case a given vertical isolation area is determined to be fully formed if it appears as a continuous ring of light surrounding a corresponding one of the valve metal vias.

Observing whether the vertical isolation areas are fully formed may be performed during anodizing the substrate, and the process of forming the vertical isolation areas may be continued if they are determined to not be fully formed, until they are fully formed.

According to an embodiment of the disclosure, apparatus for inspecting an interconnect substrate comprising a valve metal substrate having a plurality of vertical isolation areas extending completely through the substrate and defining a plurality of valve metal vias electrically isolated from the body of the substrate, comprises: a light source for shining light through the substrate; and detectors for observing whether the vertical isolation areas are fully formed.

The substrate may be held (supported) by a scanning mechanism, such as an X-Y mechanism under computer control, or by a light table. Inspection may be performed using a microscope, and determining whether the vertical isolation areas are fully formed (analyzing images) may be performed with the computer.

The apparatus may be capable of functioning while the substrate is in an anodizing bath. A first mirror may be provided for reflecting light from a light source external the bath, through the substrate, to a second mirror for reflecting light passing through the substrate to external the bath. Means for moving the mirrors to scan the substrate may be provided, and means for moving the substrate in the bath may be provided, to effect scanning.

There is therefore provided in accordance with an embodiment of the invention, a method of forming an insulator that passes through a metal substrate comprising: anodizing a region of the substrate to form the insulator; illuminating the region with light; and determining if the light passes through the substrate at the region to determine if the insulator passes completely through the substrate.

Optionally, the method comprises determining a pattern for the light that passes through the substrate. Optionally, the method comprises determining whether the pattern is satisfactory. Optionally, the method comprises determining deeming that the insulator is satisfactorily formed when the pattern is satisfactory. Additionally or alternatively, the method comprises stopping anodization when the pattern is satisfactory.

In some embodiments of the invention, determining if the light passes through the region comprises determining during anodization. In some embodiments of the invention, determining if the light passes through the region comprises determining when anodization has stopped.

There is further provided in accordance with an embodiment of the invention, a method of forming an insulator that passes through a metal substrate comprising: anodizing a region of the substrate to form the insulator; illuminating the region with light; and stopping anodization when a sufficient amount of light passes through the substrate at the region. There is further provided in accordance with an embodiment of the invention, a method of making an interconnect substrate comprising an insulated via that passes through the substrate, comprising forming an insulator in accordance with an embodiment of the invention that completely surrounds a region of non-anodized metal.

In some embodiments of the invention, the metal is a valve metal.

There is further provided in accordance with an embodiment of the invention apparatus for forming an insulator that passes through a metal substrate comprising: apparatus for anodizing a region of the substrate to form the insulator; a light source configured to illuminate the region with light; and at least one detector positioned to receive light that passes through the substrate at the region.

Optionally the apparatus comprises a scanning mechanism that moves the substrate relative to the detector so that light passing through the region is incident on the at least one detector.

Optionally, the scanning mechanism moves the substrate relative to the light source so that light passing through the region is incident on the at least one detector. Additionally or alternatively, the scanning mechanism moves the substrate. In some embodiments of the invention, the scanning mechanism moves the light source. In some embodiments of the invention, the scanning mechanism moves the at least one detector. In some embodiments of the invention, the at least one detector comprises a microscope. In some embodiments of the invention, the light source is configured to illuminate the substrate during anodizing.

BRIEF DESCRIPTION OF THE DRAWINGS

Reference will be made in detail to preferred embodiments, examples of which may be illustrated in the accompanying drawing figures. The figures are intended to be illustrative, not limiting. Although the disclosure is generally described in the context of these preferred embodiments, it should be understood that it is not intended to limit the claims to these particular embodiments.

Certain elements in selected ones of the figures may be illustrated not-to-scale, for illustrative clarity. The cross-sectional views, if any, presented herein may be in the form of “slices”, or “near-sighted” cross-sectional views, omitting certain background lines which would otherwise be visible in a true cross-sectional view, for illustrative clarity.

Cross-hatching may or may not be used in cross-sectional views. If it is, close-spaced diagonal line cross-hatching is used to indicate insulator and wide-spaced cross hatching is used to indicate conductor.

Elements of the figures are typically numbered as follows. The most significant digits (hundreds) of the reference number correspond to the figure number. For example, elements of FIG. 1 (FIG. 1) are typically numbered in the range of 100-199, and elements of FIG. 2 are typically numbered in the range of 200-299. Similar elements throughout the figures may be referred to by similar reference numerals. For example, the element 199 in FIG. 1 may be similar (and possibly identical) to the element 299 in FIG. 2. Throughout the figures, each of a plurality of elements 199 may be referred to individually as 199a, 199b, 199c, and the like. Such relationships, if any, between similar elements in the same or different figures will become apparent throughout the specification, including, if applicable, in the claims and abstract.

FIG. 1A is a diagram of a process flow for via formation in an ALOX™ substrate, and the resulting via formed thereby, according to the prior art.

FIG. 1B is a cross-sectional view of an ALOX™ substrate, according to the prior art.

FIG. 2 is a diagram illustrating a process flow, according to an embodiment of the invention.

FIG. 3A is a cross-sectional view of a technique for inspecting an exemplary ALOX™ substrate, according to an embodiment of the invention.

FIG. 3B is a top view of a portion of the exemplary ALOX™ substrate of FIG. 3A.

FIGS. 4A-4D are cross-sectional views of an ALOX™ substrate being subjected to two-sided anodization.

FIG. 5A is a photomicrograph of an ALOX™ substrate having fully-formed via structures, in accordance with an embodiment of the invention.

FIG. 5B is a photomicrograph of an ALOX™ substrate having partially-formed via structures, in accordance with an embodiment of the invention.

FIG. 6 is diagram illustrating an embodiment of an “off-line” technique for inspecting an exemplary ALOX™ substrate, according to an embodiment of the invention.

FIG. 7 is diagram illustrating an embodiment of an “in-situ” technique for inspecting an exemplary ALOX™ substrate, according to an embodiment of the invention.

DETAILED DESCRIPTION

The disclosure relates to inspection techniques for interconnect substrates, such as ALOX™ substrates.

FIGS. 1A and 1B, described hereinabove, disclose the ALOX™ technology, generally. As discussed hereinabove, the ALOX™ substrate starts with a valve metal (such as aluminum) substrate 102 which is initially conductive, and portions of the substrate are anodized in a controlled manner to produce areas or regions 104 of valve metal oxide (such as aluminum oxide). Anodization can be performed from either one or both sides of the substrate, and can proceed partially or fully through the substrate. In some cases, the anodization proceeds completely through the substrate, and may be ring-shaped so as to define electrically-isolated regions of aluminum extending as “vias” through the substrate. Anodized areas extending completely through the substrate are referred to herein as “vertical isolation regions”.

When aluminum is anodized, it becomes converted to aluminum oxide. Whereas aluminum is a good electrical conductor, aluminum oxide is an electrically-insulting material, thus enabling a substrate of aluminum (valve metal) to be made into an interconnect substrate having electrically-isolated aluminum structures such as vias extending through the substrate by anodizing (converting to aluminum oxide) selected areas of the substrate.

The inventors have noted that for such a substrate (referred to herein as an “ALOX™ substrate”) the anodized (aluminum oxide) areas are relatively transparent to light. Thus, when an ALOX™ substrate is held up to light, one can see evidence of the structures “buried” within the substrate. The aluminum portions of the substrate block light, and aluminum oxide portions extending completely through the substrate transmit light. Therefore, a vertical isolation ring (of aluminum oxide) surrounding a via (of aluminum) is readily observed as a ring of light. This phenomenon of having two materials in the substrate (aluminum, aluminum oxide) having different transparency, is used, in accordance with some embodiments of the invention, for inspecting ALOX™ substrates, both during and after processing, as described herein below.

FIG. 2 illustrates an exemplary overall process flow 200 for manufacturing ALOX™ substrates.

In a first step 202, masking processes are performed. This includes photolithography, dense anodizing and second masking. Generally, a pattern of masking material, such as dense oxide mask, photoresist mask, is disposed on the surface(s) of the substrate, using conventional photolithography techniques, to prevent the areas covered by masking material from being anodized and, conversely, to allow the areas not covered by masking material to be anodized, as is known. This step is performed to mask the substrate, prior to anodization, using known processes.

In a next step 204, the substrate is anodized, using known processes.

In a next step 206, the substrate is inspected, as described greater detail hereinbelow. (Generally, the purpose of inspection is to determine whether the anodization is complete, and is based on transmitted light inspection.) Good inspection is generally advantageous at this stage, because the following processes are expensive (pore filling, sputtering, lapping).

In a next step 208, post-anodization processes, such as copper metallization (refer to FIG. 1B), are performed.

Generally, the technique(s) disclosed herein are directed at monitoring the results of the anodizing step (204). Generally, a desired result is full anodization completely through selected areas of the aluminum substrate, to form regions of electrical insulation surrounding and isolating conducting regions. The conducting and insulating regions may have any of various desired shapes. Optionally, the insulating regions are ring-shaped aluminum oxide vertical isolation areas enclosing and electrically isolating aluminum via structures extending through the substrate.

FIG. 3A schematically illustrates an exemplary ALOX™ substrate 302 being inspected using light transmission. The substrate 302 is generally planar, having a top side and a bottom side (top and bottom, as viewed). The substrate 302 is illustrated as having (from left-to-right, as viewed):

    • an internal aluminum layer 304 (compare “internal aluminum layer” in FIG. 1B);
    • an aluminum via 306 which extends completely through the substrate 302 from the top surface thereof top the bottom surface thereof;
    • a “hybrid” aluminum structure 308 comprising an aluminum via portion (compare 306) extending completely through the substrate 302 and an internal aluminum layer portion (compare 304); and
    • an internal aluminum layer 310 (compare 304).

Note that the internal aluminum layer 304 is horizontally spaced apart from the aluminum via 306, the aluminum via 306 is horizontally spaced apart from the composite aluminum structure 308, and the composite structure 308 is horizontally spaced apart form the internal aluminum layer 310.

The remainder of the substrate 302 (those areas which are not aluminum) have been converted to aluminum oxide (to define the aluminum structures described hereinabove), as follows:

    • an area 312a above the internal aluminum layer 304;
    • an area 312b below the internal aluminum layer 304;
    • an area 314 between the internal aluminum layer 304 and the aluminum via 306, and extending completely through the substrate;
    • an area 316a above a left portion of the internal aluminum layer portion 308 of the composite aluminum structure 308; 304;
    • an area 316b below the left portion of the internal aluminum layer portion 308 of the composite aluminum structure 308;
    • an area 318 between the composite aluminum structure 308 and the aluminum via 306, and extending completely through the substrate;
    • an area 320a above a right portion of the internal aluminum layer portion 308 of the composite aluminum structure 308; 304;
    • an area 320b below the right portion of the internal aluminum layer portion 308 of the composite aluminum structure 308;
    • an area 322 between the composite aluminum structure 308 and the internal aluminum layer 310, and extending completely through the substrate;
    • an area 324a above the internal aluminum layer 310; and
    • an area 324b below the internal aluminum layer 310.

For purposes of this example, the substrate 302 is being inspected, after anodizing (step 202). Methods for making the exemplary substrate 302, and the substrate itself, are known.

FIG. 3A further illustrates that light, from a suitable light source (not shown) is directed at a surface, in this example, a top surface 332 of the substrate, as indicated by arrows 330 pointing down on the top surface of the substrate. The light can be, but is not limited to, visible light.

An observer, looking at the opposite side, in this example, a bottom surface 334 of the substrate 302 will see patterns of dark and light, corresponding to areas where there is aluminum (such as 304, 306, 308, 310), and areas where there is aluminum oxide, respectively. This is reminiscent of looking at an X-ray, except that instead of seeing bones, the observer can see aluminum structures (and, the observer can view the structures directly, rather than through the intermediary of film).

Notice in FIG. 3A that there are no aluminum structures between the top and bottom surface in the aluminum oxide areas 314, 318 and 322 which are between horizontally spaced apart aluminum structures 304, 306, 308 and 310, respectively.

Aluminum oxide (ceramic) is relatively transparent, as compared with aluminum (metal). A typical via structure, such as 306, has a shape that is round (looking at it from either surface 332 or 334 of the substrate), surrounded by a ring of anodization (such as the areas 314 and 318, which are contiguous with one another).

In ALOX™ technology, vias are typically round, and tend to have a tapered shape, as illustrated in FIG. 3A. A via such as 306 will have a small diameter at the surfaces of the substrate, then increase in diameter towards the interior of the substrate. This taper is generally a “byproduct” of the anodization process.

FIG. 3B is an illustration of what an observer will see when viewing the substrate 302 from the bottom side, with light shining onto substrate 302 from the top side. If the anodization step 202 (FIG. 2) has been successfully completed, and if the aluminum via structure 306 has a round shape, the observer should see the following.

Regarding the via 306, the observer will be able to see the aluminum via structure 306 as a substantially opaque (non-light transmissive, non-transparent, non-translucent) “dark” circle 346 surrounded by a relatively transparent “light” ring-shaped area 348. The dark circle corresponds to the larger diameter of the via 306 within the substrate 302. The observer may also be able to distinguish a smaller circle 350, which is the smaller diameter of the via 306 at the surface of the substrate 302.

The observer will also be able to see the inner edge of the internal aluminum layer 304 (which may be in the form of a ring 352 surrounding the via 306).

The ability to observe light areas 348 corresponding to regions such as 314 and 318 (FIG. 3A) surrounding dark areas (such as 306) allows for verification that the anodization process (step 202) has been completed—that there is “full anodization”. Or, as discussed hereinbelow, that anodization has not been successfully completed.

Again, the examples set forth herein are generally in the context of round-shaped vias surrounded by rings of vertical isolation. Hence, full anodization will be indicated by bright, continuous ring of light surrounding a dark circle.

Recalling that it is the areas which are not covered by masking material (step 202) that become anodized (step 204), hence relatively transparent, it is evident that the inspection of the substrate for rings of light can be performed either before stripping the masking material, such as during the anodizing process (as described hereinbelow), or after stripping the masking material, such as after the anodizing process (as described hereinbelow.

Generally, as is known, the purpose of a via in an interconnect substrate is to effect an electrical connection between an isolated area on the top surface of the substrate and a corresponding isolated area on the bottom surface of the substrate, and an ALOX™ substrate is no different in this regard. In this regard, the purpose of the aluminum via structure 306 is realized if the surrounding aluminum oxide vertical isolation area (the ceramic ring formed around the aluminum via 306) is completely formed—in this example, the areas 314 and 318 being fully oxidized.

FIGS. 4A-4D schematically illustrate an ALOX™ substrate 402 being anodized to form a plurality of conductive aluminum vias 406 (compare 306) surrounded by a plurality of vertical isolation structures 414 (compare 314, 318).

In FIG. 4A, the substrate 402 is shown with patterned masking material 424 and 428 on a top surface 403 thereof, and patterned masking material 426 and 430 on a bottom surface 404 thereof. Vias 406, which in FIG. 4A are not yet formed but will be produced by the end of the anodizing process are schematically shown in dashed lines. In FIG. 4B-4C as the process progresses, portions of vias 406 that are formed are shown in solid lines.

Typically, for making vias (406, compare 306), the top and bottom masking patterns are identical. Areas, which are not intended to be anodized are masked (covered) by material 424 and 428. Areas covered by mask material 424 and 428 will become the aluminum vias 406 (not formed yet, shown with dashed lines). Masking material 424 and 426 determines the main bodies of vias 406 and remains throughout the anodizing process. In areas between the masking material 404, anodization will proceed, to form the vertical isolation structures 414 (not formed yet) which electrically isolate the vias 414 from the other vias 414 and from the body of the substrate 402. Masking material 428 and 430 is provided so that that during anodizing, rate of growth of anodized material into substrate 402 proceeds at a relatively same rate for most regions between vias 406. Masking material 428 and 430 does not remain throughout the anodizing process. The material is configured to dissolve and/or amalgamate with material anodized during the anodizing process and disappear, or to be removed, at about a time when anodizing has penetrated for example from surface 403 or 404 to a depth of about 15% or 25% of the total thickness of substrate 402. Use of masking material to control rate of growth of anodized material is described in U.S. Pat. No. 6,670,704 the disclosure of which is incorporated herein by reference.

Once masked, anodization can proceed using any of various suitable anodizing methods known in the art.

FIG. 4B schematically illustrates substrate 402 part way into the anodization process, such as 33% of the way to completion. Depth of anodization and conversion of aluminum to aluminum oxide is schematically represented by depth of shading in the substrate. Here, it can be seen that anodization has begun, making its way through the substrate 402 (from one surface to the other), as well as proceeding laterally, under the masking elements 424, 426.

The anodization process is largely anisotropic, and will proceed not only through the substrate 402, but also under the masking material 424, 426, 428 and 430. The size (such as diameter) of a masking element 424, 426 is generally approximately the same size as the resulting via 406 (that is, the diameter of the via 406 within the substrate 402).

FIG. 4C illustrates the substrate part way into the anodization process, such as 67% (two thirds, ⅔) of the way to completion. Here, it can be seen that anodization has progressed further through the substrate 402 (from one surface to the other), as well as further laterally, under the masking elements 424, 426.

The mask elements 424, 426 must be properly sized and the anodization process controlled so that the anodization does not proceed laterally completely across the intended via 406 at the surface(s) of the substrate 402. Else, that would result in a “buried via” (resembling an internal aluminum layer, such as 304) which does not emerge at the surface of the substrate 402.

FIG. 40 illustrates the substrate 402, successfully (fully) anodized except for relatively small islands 413 of un-anodized material to provide isolation structures 414 (compare 314) extending completely through substrate 402 and surrounding the vias 406 (compare 306). Islands 413 are isolated islands of Aluminum optionally remaining at the end of the anodizing process when isolation structures are sufficiently formed to provide desired isolation of vias 406. The masking material 424, 426 can be stripped away, and copper metallization performed (see FIG. 2).

In FIG. 4D we see vertical isolation structures 414 (compare 314) extending completely through the substrate 402 and surrounding the vias 406 (compare 306).

An unsuccessful, or “partial” anodization may look something like the partially complete anodization illustrated in FIG. 4C, at selected spots.

FIG. 5A is a schematic photomicrograph of what an observer would see with light shining through an ALOX™ substrate having a plurality (approximately 50 shown) of via structures (seen as dark spots) surrounded by fully-formed ring shaped vertical isolation regions (seen as white rings surrounding the dark spots). Of interest here is not only the presence of all the white rings, but also their uniformity.

To give the reader an idea of scale, the area being shown in FIG. 5A measures approximately 10×7 mm, the dark spots have a diameter of approximately 160 μm, the rings have an outer diameter of approximately 320 μm and the dark spots are spaced approximately 1 mm apart from one another. The dark spots correspond to vias, such as 306 (FIG. 3A), 406 (FIG. 4D). The light rings surrounding the dark spots correspond to fully formed vertical isolation rings, such as 314, 414 surrounding the vias. The overall substrate (only a portion of which is shown in FIG. 5A) may measure 100 mm×100 mm.

FIG. 5B is a schematic photomicrograph of what an observer would see with light shining through an ALOX™ substrate having a plurality of vias (dark spots) surrounded by vertical isolation structures indicated by rings of light, in this case, partially formed rings of light. In this figure, only 3 vias are shown (seen as dark spots) surrounded by partially formed ring shaped isolation zones (seen as white rings surrounding the dark spots). The via on the top left is nearly fully formed, since the light colored ring surrounding the (dark colored) via is about 80% formed. The via on the top right is less fully formed, since the (light colored) ring surrounding the (dark colored) via is only about 60% formed. And, the via at the middle bottom is even less fully formed, since the (light colored) ring surrounding the (dark colored) via is only about 40% formed. These are 3 examples of vias that are not fully formed, because the anodization process for forming oxide rings around the vias has not completed, for one reason or another. In other words, the vias are defective, which may make the substrate unusable.

To give the reader an idea of scale, the area being shown in FIG. 5B measures approximately 2×2 mm, the dark spots have a diameter of approximately 50 μm, the (partially-formed) rings have an outer diameter of approximately 300 μm, and the dark spots are spaced approximately 1 mm apart from one another.

All three vias schematically shown being inspected in FIG. 5B in accordance with an embodiment of the invention are defective because the vertical isolation rings surrounding (and defining, and intended to electrically-isolate) the vias are not fully formed (they are “partially formed”). If inspection is being made during the anodization process (step 204 FIG. 2), the process optionally continues until the vertical isolation rings are fully formed. If this inspection is made after the anodization process has been completed, it is possible that the substrate can be put back into the anodizing process so that the vertical isolation rings can continue to be formed until they are fully formed. The process of inspecting an ALOX™ substrate may be automated, as follows.

FIG. 6 illustrates, schematically, a system 600 for “off-line” inspection of substrates. Substrates being inspected by system 600 are optionally substrates that have already had the anodizing step performed, and are being inspected for successful formation of vias, and any structures which were intended to be formed in the substrate.

Generally, a substrate 602 under test is placed in an X-Y scanning mechanism, schematically represented by a rectangle 604, such as in a frame holding (supporting) the edges of the substrate, rather than on a table, so that light from a light source 606 can be directed at a surface (bottom, as viewed in the figure) of the substrate, and light passing through the substrate can be detected/observed by an optical apparatus such as a microscope 608. With an optical apparatus such as a microscope 608, X-Y scanning (in this example, moving the substrate) is needed so that the entire substrate can be brought into the field of view (FOV) of the microscope.

Alternatively, the substrate may be placed on (and supported by) a light table, such as of the type used to view photographic negatives, and the light table may be stationary. If the light table is stationary, the microscope (or other optical apparatus) can be fitted for X-Y motion so that the entire surface of the substrate can be scanned—in this example, by moving the field of view across a stationary substrate.

In either case, an X-Y mechanism for moving the substrate or the microscope while it is being inspected would be under the control of a computer for controlling movement of the X-Y mechanism. The computer is also capable of analyzing images of the substrate being inspected, using any suitable matching algorithm, such as by comparing images to templates stored in computer memory, for example, or more detailed analysis of the rings of light, their intensity, their uniformity, their dimensions, and any other similar criteria.

The X-Y “scanning” would generally be required if the light source emits a beam of light, rather than a diffuse field of light, which illuminates only a portion of the substrate, so that the entire substrate may be scanned and inspected.

FIG. 7 illustrates, schematically, a system 700 for “in-situ” inspection of substrates, such as for example a substrate 702 undergoing anodizing step 204 (FIG. 2) performed, in a tank 704 of anodizing solution, under appropriate conditions for performing anodizing. The inspection apparatus is capable of functioning during anodization.

Light is directed from a light source 706 external to the tank, down (as viewed) into tank 704, to a first mirror 708 within the tank, which reflects the light, optionally at 90 degrees, onto a surface 703 (left, as viewed in the figure) of the substrate. Light passing through the substrate is reflected by a second mirror 710 to an optical apparatus such as a microscope 712. Supports, indicated by small circles behind the mirrors may be provided for moving the mirrors to facilitate scanning the substrate, such as by pivoting.

As in the previous (off line) example, some form of scanning may be required. In this case, the mirrors can be scanning mirrors, capable of rotating about appropriate axes so that the entire substrate may be scanned by a beam of light. Supports, indicated by small circles behind the mirrors may be provided for rotating the mirrors to facilitate scanning the substrate, such as by pivoting. Alternatively and/or additionally, the substrate itself can be moved to effect or augment “scanning”, such as being withdrawn from the bath (as illustrated). For example, the mirrors could control scanning left and right, while the substrate is moved to effect scanning up and down. To this end, means (such as a robotic device which clamps the substrate and inserts it into the bath) may be provided for moving the substrate in the bath, to effect at least one axis of scanning.

As in the previous (off line) example, the scanning mechanism would be under the control of a computer, which also analyzes images of the substrate under inspection such as by comparing images to templates stored in computer memory, for example.

The process disclosed herein may be conducted on large panels of aluminum typically having thousands of isolated aluminum vias and oxidized zones distributed over the substrate area.

The inspection technique disclosed herein can be used in different modes to achieve various objectives, such as:

1) for end point detection for the process step (204) of anodizing:

    • a) using in-line (“in situ”) inspection (FIG. 6) where a light source and detection system for the light pattern can be incorporated in the anodizing apparatus
    • b) using off-line inspection (FIG. 5) where the substrate is pulled out of the oxidizing bath for visual inspection to monitor the anodization process progression and formation of the fully oxidized zones according to the pre-designed pattern;
      2) for process monitoring and quality control of the product post anodization, as the substrate can be visually checked, using same transmitted light method, according to a certain pass/fail criteria;
    • a) for yield enhancement
    • b) for failure analysis
    • c) for process uniformity analysis

It will be apparent to those skilled in the art that various modifications and variation can be made to the techniques described in the present disclosure. Thus, it is intended that the present disclosure covers the modifications and variations of the techniques, provided that they come within the scope of the appended claims and their equivalents.

Claims

1. A method of forming an insulator that passes through a metal substrate comprising:

anodizing a region of the substrate to form the insulator;
illuminating the region with light; and
determining if the light passes through the substrate at the region to determine if the insulator passes completely through the substrate.

2. A method according to claim 1 and comprising determining a pattern for the light that passes through the substrate.

3. A method according to claim 2 and comprising determining whether the pattern is satisfactory.

4. A method according to claim 3 and comprising deeming that the insulator is satisfactorily formed when the pattern is satisfactory.

5. A method according to claim 3 and comprising stopping anodization when the pattern is satisfactory.

6. A method according to any of claims 1-5 wherein determining if the light passes through the region comprises determining during anodization.

7. A method according to any of claims 1-5 wherein determining if the light passes through the region comprises determining when anodization has stopped.

8. A method of forming an insulator that passes through a metal substrate comprising:

anodizing a region of the substrate to form the insulator;
illuminating the region with light; and
stopping anodization when a sufficient amount of light passes through the substrate at the region.

9. A method of making an interconnect substrate comprising an insulated via that passes through the substrate, comprising forming an insulator in accordance with any of claims 1-8 that completely surrounds a region of non-anodized metal.

10. A method according to any of claims 1-9 wherein the metal is a valve metal.

11. Apparatus for forming an insulator that passes through a metal substrate comprising:

apparatus for anodizing a region of the substrate to form the insulator;
a light source configured to illuminate the region with light; and
at least one detector positioned to receive light that passes through the substrate at the region.

12. Apparatus according to claim 11 and comprising a scanning mechanism that moves the substrate relative to the detector so that light passing through the region is incident on the at least one detector.

13. Apparatus according to claim 12 wherein the scanning mechanism moves the substrate relative to the light source so that light passing through the region is incident on the at least one detector.

14. Apparatus according to claim 12 or claim 13 wherein the scanning mechanism moves the substrate.

15. Apparatus according to any of claims 12-14 wherein the scanning mechanism moves the light source.

16. Apparatus according to any of claims 12-15 wherein the scanning mechanism moves the at least one detector.

17. Apparatus according to any of claims 11-16 wherein the at least one detector comprises a microscope.

18. Apparatus according to any of claims 11-17 wherein the light source is configured to illuminate the substrate during anodizing.

Patent History
Publication number: 20100078329
Type: Application
Filed: Feb 25, 2007
Publication Date: Apr 1, 2010
Inventors: Uri Mirsky (Nofit), Shimon Neftin (Kiryat Shmonah), Lev Furer (Haifa)
Application Number: 12/449,745
Classifications
Current U.S. Class: Controlling Coating Process In Response To Measured Or Detected Parameter (205/82); Involving Measuring, Analyzing, Or Testing (205/81); Cells (204/242)
International Classification: C25D 11/02 (20060101); C25D 21/12 (20060101); C25D 17/00 (20060101);