MEMS INTEGRATED CHIP WITH CROSS-AREA INTERCONNECTION
The present invention discloses a MEMS (Micro-Electro-Mechanical System) integrated chip with cross-area interconnection, comprising: a substrate; a MEMS device area on the substrate; a microelectronic device area on the substrate; a guard ring separating the MEMS device area and the microelectronic device area; and a conductive layer on the surface of the substrate below the guard ring, or a well in the substrate below the guard ring, as a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.
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The present invention relates to a Micro-Electro-Mechanical System (MEMS) integrated chip and a wiring structure of this system chip.
DESCRIPTION OF RELATED ARTMEMS devices are used in a wide variety of products such as micro-acoustical sensor, gyro-sensor, accelerometer, etc. A MEMS typically includes a MEMS device and other microelectronic devices which are integrated into an integrated chip.
Referring to 1B, which is a cross-section view along the line A-A of
In order to functionally connect the microelectronic devices and the MEMS device, an electrical connection must be provided therebetween. The foregoing prior art achieves this connection by means of one or more metal layers, such as the first metal layer 14 shown in
Accordingly, it is highly desired to provide a wiring structure which functionally connects the MEMS device and the microelectronic devices but still maintains the completeness of the guard ring structure.
SUMMARY OF THE INVENTIONAn objective of the present invention is to provide a MEMS integrated chip with specially designed cross-area interconnection for electrically connecting the MEMS device area and the microelectronic device area to solve the foregoing problem.
In order to achieve the foregoing objective, in one perspective of the present invention, it provides an integrated MEMS chip with cross-area interconnection, comprising: a substrate; a MEMS device area on the substrate; a microelectronic device area on the substrate; and a guard ring separating the MEMS device area and the microelectronic device area, the guard ring including a structural layer on the substrate and a contact layer on the structural layer, wherein the contact layer is for a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.
In another perspective of the present invention, it provides a MEMS integrated chip with cross-area interconnection, comprising: a substrate; a MEMS device area on the substrate; a microelectronic device area on the substrate; a guard ring separating the MEMS device area and the microelectronic device area; and a conductive layer on a surface of the substrate below the guard ring, as a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.
In a third perspective of the present invention, it provides a MEMS integrated chip with cross-area interconnection, comprising: a substrate; a MEMS device area on the substrate; a microelectronic device area on the substrate; a guard ring separating the MEMS device area and the microelectronic device area; and a well in the substrate below the guard ring, as a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.
The foregoing MEMS integrated chip can include both the aforementioned conductive layer and the aforementioned well.
Preferably, the guard ring of the foregoing MEMS integrated chip includes a structural layer with dielectric function on the substrate; a preferable material of the structural layer is undoped polysilicon.
In the foregoing MEMS integrated chip, the well can extend under the MEMS device area.
The objectives, technical details, features, and effects of the present invention will be better understood with regard to the detailed description of the embodiments below, with reference to the drawings.
The drawings as referred to throughout the description of the present invention are for illustration only, to show the interrelationships between the process steps and between the layers, but not drawn according to actual scale.
The present invention has been described in considerable detail with reference to certain preferred embodiments thereof. It should be understood that the description is for illustrative purpose, not for limiting the scope of the present invention. Those skilled in this art can readily conceive variations and modifications within the spirit of the present invention. For example, the materials, number of the metal layers, etc. of each foregoing embodiment can be modified without departing from the spirit of the present invention. Furthermore, the microelectronic devices integrated with the MEMS device are not limited to CMOS devices; they can include bipolar junction transistors (BJTs) and other devices. In view of the foregoing, the spirit of the present invention should cover all such and other modifications and variations, which should be interpreted to fall within the scope of the following claims and their equivalents.
Claims
1. A MEMS (Micro-Electro-Mechanical System) integrated chip with cross-area interconnection, comprising:
- a substrate;
- a MEMS device area on the substrate;
- a microelectronic device area on the substrate; and
- a guard ring separating the MEMS device area and the microelectronic device area, the guard ring including a structural layer on the substrate and a contact layer on the structural layer, wherein the contact layer is for a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.
2. The MEMS integrated chip of claim 1, wherein the structural layer includes one selected from an undoped polysilicon layer, a silicon nitride layer and a silicon oxynitride layer.
3. A MEMS integrated chip with cross-area interconnection, comprising:
- a substrate;
- a MEMS device area on the substrate;
- a microelectronic device area on the substrate;
- a guard ring separating the MEMS device area and the microelectronic device area; and
- a conductive layer on a surface of the substrate below the guard ring, as a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.
4. The MEMS integrated chip of claim 3, wherein a material of the conductive layer includes cobalt silicide or titanium silicide.
5. The MEMS integrated chip of claim 3, further including a well in the substrate below the conductive layer.
6. The MEMS integrated chip of claim 5, wherein the well and the substrate form a junction diode.
7. The MEMS integrated chip of claim 3, wherein the guard ring includes a structural layer with dielectric function on the substrate.
8. The MEMS integrated chip of claim 7, wherein the structural layer includes one selected from an undoped polysilicon layer, a silicon nitride layer and a silicon oxynitride layer.
9. The MEMS integrated chip of claim 3, wherein the MEMS device area includes a contact layer forming connection lines.
10. A MEMS integrated chip with cross-area interconnection, comprising:
- a substrate;
- a MEMS device area on the substrate;
- a microelectronic device area on the substrate;
- a guard ring separating the MEMS device area and the microelectronic device area; and
- a well in the substrate below the guard ring, as a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area.
11. The MEMS integrated chip of claim 10, wherein the well including a doped region and a heavily doped region above the doped region.
12. The MEMS integrated chip of claim 10, wherein the well and the substrate form a junction diode.
13. The MEMS integrated chip of claim 10, wherein the guard ring includes a structural layer with dielectric function on the substrate.
14. The MEMS integrated chip of claim 13, wherein the structural layer includes one selected from an undoped polysilicon layer, a silicon nitride layer and a silicon oxynitride layer.
15. The MEMS integrated chip of claim 10, further including a conductive layer on a surface of the substrate above the well and below the guard ring.
16. The MEMS integrated chip of claim 15, wherein a material of the conductive layer includes cobalt silicide or titanium silicide.
17. The MEMS integrated chip of claim 10, wherein the MEMS device area includes a contact layer forming connection lines.
18. The MEMS integrated chip of claim 10, wherein the well extends under the MEMS device area.
19. The MEMS integrated chip of claim 15, wherein the well extends under the MEMS device area.
Type: Application
Filed: May 12, 2009
Publication Date: Nov 18, 2010
Applicant:
Inventors: Hsin-Hui Hsu (Hsin-Chu), Chuan-Wei Wang (Hsin-Chu), Sheng-Ta Lee (Hsin-Chu)
Application Number: 12/464,375
International Classification: H01L 29/84 (20060101);