HYBRID WINDOW LAYER FOR PHOTOVOLTAIC CELLS

A novel photovoltaic solar cell and method of making the same are disclosed. The solar cell includes: at least one absorber layer which could either be a lightly doped layer or an undoped layer, and at least a doped window-layers which comprise at least two sub-window-layers. The first sub-window-layer, which is next to the absorber-layer, is deposited to form desirable junction with the absorber-layer. The second sub-window-layer, which is next to the first sub-window-layer, but not in direct contact with the absorber-layer, is deposited in order to have transmission higher than the first-sub-window-layer.

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Description
CROSS-REFERENCE TO RELATED APPLICATIONS

This invention is a continuation application of the patent application Ser. No. 11/899,799, filed Sep. 7, 2007, allowed on Dec. 2, 2010, which is a divisional application of the patent application Ser. No. 10/696,545, filed Oct. 29, 2003, now U.S. Pat. No. 7,667,133.

STATEMENT REGARDING SPONSORED RESEARCH

This invention was made with Government support under National Renewable Energy Laboratory (NREL) contract No. NDJ-1-30630-08 awarded by the Department of Energy. The government has certain rights in this invention.

TECHNICAL FIELD

The invention relates to a novel doped window layer and photovoltaic solar cells containing the same.

BACKGROUND OF THE INVENTION

Solar cells rely on the semiconductor junction to convert sunlight into electricity. The junction consists at least of two layers of opposite types one layer being an n-layer with an extra concentration of negatively charged electrons and the other layer being a p-layer with an extra concentration of positively charged holes. There is at least a window layer, which is usually heavily doped and an absorber layer, which is either a lightly doped or undoped semiconductor. In solar cells, only photons that are near or above the semiconductor bandgap of the absorber layer can be absorbed and utilized. In the solar radiation, there is a limited amount of flux of photons with energy above such a value. Unfortunately, all photons will have to pass through the doped window layer before the photons reach the absorber layer. Those photons absorbed by the window layer will not be able to be converted into useful electricity and are wasted. One way to reduce such an absorption is to make the doped window layer with a wider bandgap and to make the doped window layer very thin. However, a minimum thickness is required for the doped window layer in order to maintain build-in potential. When the bandgap of the window layer is increased beyond the absorber layer, there is a mismatch in the band edge at the junction. Such a mismatch at the band edge prevents carriers, electrons or holes, to flow smoothly and get collected, which then results in poor solar cell performance, as represented often by a “roll-over” or “double-diode” effect in the current-voltage (I-V) characteristics.

As a specific example of the problem, single-junction hydrogenated amorphous silicon (a-Si) based solar cells could be fabricated. In these a-Si based solar cells (including solar cells based on a-SiGe:H alloys), the absorber layer is sandwiched between two doped layers which generate an electrical field over the intrinsic layer (i-layer). Either the n-type doped layer or the p-type doped layer could serve as the window layer, which is on the side the sunlight enters. However, due to the fact that the hole mobility is much smaller than the electron mobility in a-Si based materials, the p-layer is often used as the window layer so that holes, having smaller mobility compared with electrons, will need to travel less distance to get collected. For this reason, the properties of the p-layer must meet several, often conflicting, requirements. The p-layer must have a wider bandgap so that sunlight can pass through the p-layer without being absorbed before reaching the intrinsic layer (absorber layer in this case) for the photon to electricity conversion. On the other hand, this p-layer must not have a bandgap wider than the i-layer since there would be a mismatch in the band edge at the p-i interface.

In order to make a single-junction solar cell with higher efficiency, it is desirable to reduce the bandgap of the absorber layer, for example by using alloys having a small amount (about 10-30%) of germanium. Earlier work by the inventors found that the a-SiGe solar cells with about 10-30% Ge in the i-layer is more stable after prolonged exposure in the sun. The p-layer for such a lower bandgap a-SiGe absorber layer needs to have a smaller bandgap so that the p-layer can form a smooth interface with the lower-bandgap a-SiGe i-layer while at the same time the p-layer needs to have a wider bandgap to have minimized absorption.

The problems and difficulties represented here for single-junction a-SiGe solar cell apply also to a broader range of solar cells that have at least a doped window layer and a lightly doped or undoped absorber layer.

Therefore, there is a need to design a novel window layer that overcomes most, if not all, of the preceding problems.

SUMMARY OF THE INVENTION

In one aspect, the invention relates to a novel photovoltaic solar cell comprising: at least one absorber layer, and at least one doped window layer having at least two sub-layers. The first sub-window-layer is adjacent the absorber layer and forms a desirable junction with the absorber-layer and the second sub-window-layer is adjacent the first sub-window-layer and has high optical transmission. In certain embodiments, the second sub-window-layer has a transparency greater than the transparency of the first sub-layer.

In certain aspects, the photovoltaic cell comprises an thin film silicon (tf-Si) alloy based solar cell including at one of amorphous silicon (a-Si:H) based solar cell, nanocrystalline silicon (nc-Si:H) based solar cell, microcrystalline silicon (μc-Si:H) based solar, polycrystalline silicon (poly-Si:H) based solar cell, or other combinations and mixtures. In certain specific aspects, the photovoltaic cell comprises an amorphous silicon alloy based solar cell such as, for example, at least one of a-Si:H, a-Si(1−x)Gex:H and other combinations and mixtures.

The doped window-layer can comprise a p-type layer or an n-type layer and be formed using vapor phase deposition, such as for example, plasma enhanced chemical vapor deposition. The desirable deposition conditions are achieved by varying parameters including at least one of the following: temperature, composition of gas mixtures, rf power, pressure, reactor geometry and dilution with gases such as hydrogen.

The solar cell can further comprise one or more of the following: a substrate selected from at least one of: glass, metal or plastic; a suitable transparent conductive oxide layer adjacent the second sub-window-layer; an encapsulation layer overlaying the solar cell to provide a substantially airtight and watertight protective barrier against moisture and contaminants; and/or a buffer semi-conductor layer between the absorber-layer and the first sub-window-layer. In certain embodiments, the absorber layer is the i-layer for a-Si solar cells; and, for other solar cells, such as crystalline silicon solar cells, the absorber layer is a lightly doped layer.

In another aspect, the invention relates to a method for manufacturing a solar cell comprising the steps of:(i) providing a substrate; (ii) depositing semiconductor layers that comprise at least an absorber layer and at least one doped-window-layer, wherein the doped window layer comprises at least two-sub-window-layers deposited under desirable deposition conditions; and, (iii) depositing a layer of transparent conducting oxide next to the doped-window-layer but not in direct contact with the absorber-layer. In certain embodiments, the first sub-window-layer is adjacent to the absorber layer and is deposited under conditions which achieve a desirable junction with the absorber-layer; and in which the second sub-window-layer is adjacent the first sub-window-layer but not directly in contact with the absorber-layer and is deposited under conditions which achieve high optical transmission.

The doped window layer can be deposited before or after the deposition of the semiconductor absorber layer. In certain embodiments, the absorber layer contains silicon and germanium and during the absorber-layer deposition, an optimized ratio of germanium-containing gas and silicon-containing gas provides a Ge content suitable for forming a high efficiency single-junction solar cell. The first and second sub-window-layers are deposited by a vapor phase deposition process such as, for example, by chemical vapor deposition including radio frequency plasma enhanced chemical vapor deposition. The plasma enhanced chemical vapor deposition can be by at least one of the following: cathodic direct current glow discharge, anodic direct current glow discharge, radio frequency glow discharge, very high frequency (VHF) glow discharge, alternate current glow discharge, or microwave glow discharge.

In certain aspects, the first and second window-layers amorphous silicon-containing material are selected from: hydrogenated amorphous silicon, hydrogenated amorphous silicon carbide, and hydrogenated amorphous silicon germanium, as well as the mixtures and combinations of the above. In certain embodiments, the first and second window-layers silicon-containing material are selected from: a-Si:H, a-Si1−xCx:H, a-Si1−xGex:H, nc-Si:H, nc-Si1−xCx:H, nc-Si1−xGex:H, μc-Si:H, μc-Si1−xCx:H, μc-Si1−xGex:H, as well as mixtures and combinations of the above.

Further, in certain specific embodiments, the invention is directed to a photovoltaic solar cell comprising: at least one n-type layer, at least one i-type layer, and at least two sub-p-layers. The first sub-p-layer, which can also be considered as an interface p-layer, is deposited at a desired first temperature next to the i-type layer and a second sub-p-layer is deposited next to the first sub-p-layer at a desired second temperature which is lower than the first temperature at which the first sub-p-layer is deposited. The first sub-p-layer is deposited next to the i-type layer at a temperature sufficiently high to form a good junction with the i-layer. In certain preferred embodiments, the first sub-p-layer is deposited at about 140° C.

The second sub-p-layer has a transparency greater than the transparency of the first sub-p-layer. The second sub-p-layer is deposited at a temperature sufficient low to provide acceptable transparency. In certain embodiments, the second sub-p-layer is deposited at or below a temperature of about 70° C.

The first and second p-layers amorphous silicon-containing material are generally selected from the group including hydrogenated amorphous silicon, hydrogenated amorphous carbon, and hydrogenated amorphous silicon germanium. In certain embodiments, the i-layer comprises hydrogenated amorphous silicon germanium having a bandgap ranging from about 1.4 e-V to about 1.6 e-V and wherein the first and second sub p-layers comprise nanocrystalline silicon with a bandgap of 1.6 eV.

Also, in certain embodiments, the first sub-p-layer has a thickness in the range of about 0.001 micron to about 0.004 micron and the second sub-p-layer has a thickness in the range of about 0.005 micron to about 0.02 micron. It is to be understood that in certain embodiments, the first sub-p-layer is thinner than the second sub-p-layer.

The solar cell made using the hybrid sub p-layers has a conversion efficiency of about 10% or greater. Such solar cell can include a suitable substrate such as a glass, metal or plastic, and can further include a suitable transparent conductive oxide layer adjacent the second sub-p-layer. The transparent conductive oxide layer can comprise, for example, indium-tin-oxide (ITO) deposited at a temperature sufficiently low to avoid damaging the second sub-p-layer. It is further to be understood that the solar cell can further comprise an encapsulation layer overlaying the cell to provide a substantially air tight and water tight protective barrier against moisture and contaminants.

Also, in certain embodiments, the solar cell can further comprise a buffer semi-conductor layer between the n-layer and the i-layer and between the i-layer and the first sub-p-layer.

Various materials are especially useful in the invention. For example, the first and second p-layers can comprise a nanocrystalline silicon-containing material; the i-layer can comprise amorphous silicon germanium; and the n-layer can comprise amorphous silicon.

In another aspect, the invention relates to a method for manufacturing a solar cell comprising the steps of

    • (i) providing a substrate;
    • (ii) depositing a layer of n-type semi-conductor on the substrate at a temperature sufficiently low to avoid damage or melting the substrate;
    • (iii) depositing an i-layer on the n-layer at a temperature sufficiently low to avoid melting or damaging the n-layer;
    • (iv) depositing a first sub-p-layer on the i-layer at a temperature sufficiently high to form a good junction with the i-layer; and
    • (v) depositing a second sub-p-layer on the first sub-p-layer at a temperature lower than the first temperature at which the first sub-p-layer is deposited.

In certain embodiments, the method can further include depositing a layer of a transparent conductive oxide on the second p-layer. Also a current collection layer can be deposited onto the substrate prior to deposition of the n-layer onto the substrate.

In certain embodiments, the deposition sequence of the layers can be as following:

    • (i) providing a substrate;
    • (ii) depositing a second sub-p-layer on the substrate at a temperature relatively low for improved transparency of the p-layer;
    • (iii) depositing a first sub-p-layer on the second sub-p-layer at a relatively higher temperature to form a good junction with the i-layer to be deposited;
    • (vi) depositing an i-layer on the first sub-p-layer at a temperature sufficiently low to avoid melting or damaging the p-layer; and
    • (v) depositing a layer of n-type semi-conductor on the substrate at a temperature sufficiently low to avoid damage or melting the p and i-layers.

In certain embodiments, during the i-layer deposition step, an optimized GeH4 to Si2H6 ratio is used to provide a Ge content suitable for forming a high efficiency single-junction solar cell. Still further, in certain embodiments, an optimized level of hydrogen dilution is used to form the i-layer. Appropriate level of hydrogen dilution of process gases improves the structural order and photovoltaic quality of amorphous silicon based materials.

In certain embodiments, the first and second sub-p-layers are deposited by a suitable chemical vapor deposition process such as a plasma enhanced chemical vapor deposition. The plasma enhanced chemical vapor deposition can be by at least one of the following: cathodic direct current glow discharge, anodic direct current glow discharge, radio frequency glow discharge, very high frequency (VHF) glow discharge, alternate current glow discharge, or microwave glow discharge at a pressure ranging from about 0.2 to about 3 TORR with a dilution ratio of diluent to feedstock (deposition gas) ranging from about 5:1 to about 200:1.

In yet another aspect, the invention relates to a method for manufacturing a solar cell comprising the steps of:

    • (i) providing a transparent substrate;
    • (ii) depositing a transparent conducting oxide layer on the substrate;
    • (iii) depositing a second sub-p-layer on the substrate at a temperature relatively low for improved transparency of the second sub p-layer;
    • (iv) depositing a first sub-p-layer on the second sub-p-layer at a relatively higher temperature to form a good junction with an i-layer to be deposited thereon;
    • (v) depositing the i-layer on the first sub-p-layer at a temperature sufficiently low to avoid melting or damaging the p-layer; and
    • (vi) depositing a layer of n-type semi-conductor on the substrate at a temperature sufficiently low to avoid damage or melting the p and i-layers.

Other objects and advantages of the invention will become apparent to those skilled in the art upon a review of the following detailed description of the preferred embodiments and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1a is a J-V graph showing nanocrystalline silicon with a relatively wide bandgap (WBG) top cell having a high performance (Voc=1.023V and FF fill factor 77.5%) obtained using a p-layer deposited at a temperature of 70° C. Such a p-layer forms an ideal junction with a WBG i-layer.

FIG. 1b is a schematic illustration of nanocrystalline silicon WBG top cell described in FIG. 1a.

FIG. 2a is a J-V graph showing a nanocrystalline silicon top cell having a p-layer comprising nc-Si used for Narrow bandgap a-SiGe solar cells where severe rollover occurs in the J-V curve, possibly due to a mismatch at the p-i interface.

FIG. 2b is a schematic illustration of the type nanocrystalline silicon top cell described in FIG. 2a.

FIG. 3a is a J-V graph of a nc-Si layer deposited at a higher temperature of 140° C. which forms a good interface with the NBG a-SiGe i-layer and leads to an ideal J-V curve. The diode characteristics of this material are better than that of the material shown in FIG. 1a. While the p-layer of the FIG. 3a material is less transparent than the p-layer of the material shown in FIG. 1a, such material is yet acceptable for a middle and bottom cell for in a triple stack. This material, however, would not be acceptable for use in any single-junction a-SiGe solar cells

FIG. 3b is a schematic illustration of the type nanocrystalline silicon top cell described in FIG. 3a.

FIG. 4a is a J-V graph showing a p-layer for a single-junction medium bandgap a-SiGe cell (Example 2—CD919) which forms a good interface with the a-Si i-layer and is more transparent than the material shown in FIGS. 3a and 3b.

FIG. 4b is a schematic illustration of the type nanocrystalline silicon top cell described in FIG. 4a.

FIG. 5a is a table for comparative material A, comparative material B, Example 1 of the invention, and Example 2 of the invention showing the open circuit voltage (Voc), the short circuit current (Jsc), the fill factor (FF) and the version efficiency (η).

FIG. 5b is a schematic illustration of a single junction solar cell having the hybrid p-layer of the invention.

FIG. 5c is a table showing the deposition conditions for comparative material A(GD904), comparative material B (GD907), Example 1 (GD908), and Example 2 (GD919).

FIGS. 6a, 6b and 6c are graphs showing: the dependency of the short circuit (Jsc) (FIG. 6a); the open circuit voltage (Joc) (FIG. 6b); and efficiency (EFF) (FIG. 6c) of n-i-p a-Si-Ge solar cells of GeH4 fractions.

 DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The invention relates to a novel p-layer in single-junction amorphous silicon and silicon germanium alloy photovoltaic elements. The p-layer of the invention, when incorporated into solar cells, provides single-junction solar cells with greater than about 12% initial efficiency and greater than about 10% stabilized efficiency. The solar cells with the p-layer of the invention exhibit efficiencies that previously could only be achieved using multi-junction solar cells structure such as a triple-junction structure. The solar cells of the invention have only 1/3 of the junctions compared with the triple-junction solar cell and, therefore, can be fabricated with significantly lower costs in terms of capital, labor and materials.

The p-layer of the invention comprises a hybrid p-layer that comprises at least two adjacent sub p-layers. A first sub p-layer is deposited at a desired first temperature and a second sub p-layer is deposited at another desired second temperature. In this way, the first sub p-layer, or interface region, forms a good junction with a suitable i-layer, such as an amorphous silicon germanium (a-SiGe) absorber layer. The second sub p-layer is highly transparent, thus allowing more sunlight to reach the semi-conductor absorber layer.

In certain embodiments, the second sub p-layer has a thickness that is at least as thick as, an in certain embodiments, thicker than the first sub p-layer. Also, in certain embodiments, the ratio of thicknesses of first sub p-layer to second sub p-layer is about 1:1 to about 1:3. In certain embodiments, the first sub p-layer is formed to a thickness on the order of 2 nm and in certain embodiments, preferably less than 4 nm and the second sub p-layer is formed to a thickness on the order of 10 nm, preferably less than 20 nm.

It is also to be understood that the thickness of the first and second sub p-layers can be adjusted to maximize efficiency and equalize the current generated in each layer. Further, it is to be understood that the solar cells can have the bandgap of the amorphous silicon layers varied by adjusting the hydrogen concentration in the amorphous silicon layers.

The invention provides a significant improvement in the solar cell conversion efficiency of a low cost amorphous silicon based thin film solar cell. With only ⅓ of the junctions needed for a triple-junction solar cell, the devices using the solar cell of the invention can be fabricated at low costs yet with approximately the same efficiency, thereby resulting in significant cost savings.

According to one embodiment, the invention provides high efficiency, single-junction p-i-n a-SiGe photovoltaic material deposited on a suitable substrate to form a solar cell. The solar cell is formed by depositing the p-i-n a-SiGe photovoltaic material onto a substrate such as stainless steel, with or without textured ZnO/Ag or Zn/Al back reflector by using a suitable deposition process such as radio frequency plasma enhanced chemical vapor deposition (Rf PECVD). According to another aspect of the invention, there is provided a method for making such solar cells which includes: using an optimized GeH4 to Si2H5 ratio during the i-layer deposition which leads to a Ge content especially suited for high efficiency single-junction a-SiGe cells; using an optimized level of hydrogen dilution for the i-layer; and providing an improved hybrid p-layer which forms an optimized interface between the p-layer and the a-SiGe i-layer.

FIGS. 1a 1b, 2a, 2b, 3a, and 3b show schematic illustrations and data for currently used photovoltaic materials and, in particular, the effect of various types of p-layers on single-junction a-SiGe solar cells. FIGS. 1a and 1b relate to a solar cell structure having an amorphous silicon WBG top cell with a high performance (Voc=1.023 v and FF (Fill Factor)=77.5% with a a-Si:H based p-layer deposited at a temperature of 70° C.

FIGS. 2a and 2b relate to the same a-Si:H based p-layer used for NGB a-SiGe deposited at 70° C., showing a severe roll-over which occurs in the J-V curve and which is believed to be due to a band edge mismatch at the p-i interface.

FIGS. 3a and 3b relate to a solar cell where the p-layer is deposited at a higher temperature of about 140° C. Such p-layer forms a good interface with the NBG a-SiGe I-layer which, in turn, leads to a desired J-V curve. However, the p-layer which is deposited at 140° C. is less transparent than the p-layer deposited at 70° C. Such high-temperature deposited p-layers are acceptable for middle and bottom cells in a triple junction solar cell. However, such high-temperature deposited p-layer is not acceptable for use in any single-junction solar cells.

Referring now to FIGS. 4a and 4b, a schematic illustration of a hybrid p-layer for a single-junction medium bandgap solar cells according to the invention is shown. The hybrid p-layer forms a good interface with the i-layer and has a desirable transparency.

FIG. 4a is a graph showing the high efficiency a-SiGe cell having an initial efficiency of about 13% for the a-SiGe single-junction cell and a stabilized efficiency of about 10.4% after 1000 hours of one sunlight soaking

FIG. 5a is a table for comparative material A (gd904), comparative material B (gd907), Example 1 of the invention(gd908), and Example 2 of the invention (gd919) showing the open circuit voltage (Voc), the short circuit current (Jsc), the fill factor (FF) and the conversion efficiency (η). Both the Example 1 and the Example 2 show favorable fill factor data and conversion efficiency. It is to be understood that the length of time of the deposition of each sub p-layer can range from about 0.25 to about 3 minutes and, in certain embodiments, from about 0.5 to about 2 minutes. The deposition rate for the p-layers shown in FIG. 5a is about 0.05 nm/sec, or 3 nm/min

FIG. 5b is a schematic illustration of a single junction solar cell having the hybrid p-layer of the invention. FIG. 5c is a table showing the deposition conditions for comparative material A(GD904), comparative material B (GD907), Example 1 (GD908), and Example 2 (GD919). These devices use heavily doped n-type interface layer at the n-ZnO interface, and a heavily doped p-type interface layer at the p-ITO interface to improve the device FF.

As shown in FIG. 5b, a nanocrystalline silicon-containing thin film semiconductor layer forms a single junction solar cell. The semiconductor solar cell comprises a p-i-n thin film semiconductor with a bandgap ranging from about 1.4 eV to 1.75 eV, usually to 1.6 eV. A second positively doped (p-doped) nanocrystalline silicon-containing sub p-layer is connected to the ITO layer of the front contact. A first positively doped (p-doped) nanocrystalline silicon-containing p-layer is connected to the second sub p-layer. The first and second sub p-layers can be positively doped with diborane (B2H6), BF3 or other boron-containing compounds. An amorphous silicon-containing, undoped, active intrinsic i-layer is deposited upon, positioned between and connected to the first p-layer and a n-type amorphous silicon-containing layer. The p-layer is positioned on the i-layer and can comprise amorphous silicon carbon or amorphous silicon negatively doped with phosphine (PH3) or some other phosphorous-containing compound.

In certain embodiments, the substrate may be made of a single substance conductive material, or formed with a conductive layer on a support composed of an insulating material or conductive material. The conductive materials may include, for example, metals such as NiCr, stainless steel, Al, Cr, Mo, Au, Nb, Ta, V, Ti, Pt, Pb, Sn, and alloys thereof. Also, it is to be understood that suitable insulating materials can include glass, ceramics, papers, and synthetic resins such as polyester, polyethylene, polypropylene, polystyrene, polyamide, polycarbonate, cellulose acetate, polyvinyl chloride, polyvinylidene chloride, and the like. The insulating support is formed with a conductive layer on at least one surface thereof, and a semiconductor layer of the invention is formed on the surface having the conductive layer formed thereon. For example, when the support is glass, a conductive layer composed of a material such as SnO2, NiCr, Al, Ag, Cr, Mo, Ir, Nb, Ta, V, Ti, Pt, Pb, In2 O3, ITO (In2O3+SnO2), ZnO, or an alloy thereof is formed on the surface of the glass; for a synthetic resin sheet such as polyester film, a conductive layer composed of a material such as NiCr, Al, Ag, Pb, Zn, Ni, Au, Cr, Mo, Ir, Nb, Ta, V, Tl, Pt, or an alloy thereof is formed on the surface; and for stainless steel, a conductive layer composed of a material such as NiCr, Al, Ag, Cr, Mo, Ir, Nb, Ta, V, Ti, Pt, Pb, In2O3 ITO (In2O3+SnO2), ZnO, or an alloy thereof is formed on the surface. The thickness of the substrate may be appropriately determined so as to be able to form photovoltaic elements as desired, but when the photovoltaic element is required to have flexibility, the substrate can be made as thin as possible within the range of sufficiently exhibiting the support function.

Doped Layers (n-Layer)

The base material of the n-layer is composed of non-single crystalline silicon-type semiconductor. Examples of the amorphous (abbreviated as a-) silicon type semiconductor include a-Si, a-SiGe, a-SiC, a-SiO, a-SiN, a-SiCO, a-SiON, a-SiNC, a-SiGeC, a-SiGeN, a-SiGeO, a-SiCON, and a-SiGeCON.

i-Layer

In the photovoltaic material of the invention, the i-layer may be made of amorphous silicon type semiconductor, whether slightly p-type or slightly n-type. Examples of the amorphous silicon type semiconductor include a-Si, a-SiC, a-SiO, a-SiN, a-SiCO, a-SiON, a-SiNC, a-SiCON, a-SiGe, a-SiGeC, a-SiGeO, a-SiGeN, a-SiCON, a-SiGeNC, and a-SiGeCON.

Transparent Electrode

The transparent electrode may be suitably made of a material such as indium oxide (In2O3), tin oxide (SnO2), or ITO (In2O3+SnO2), to which fluorine may be added. The deposition of the transparent electrode is optimally performed by a suitable deposition method such as sputtering or vacuum vapor deposition. The vapor deposition sources suitable for depositing the transparent electrode by vacuum deposition include metallic tin, metallic indium, and indium-tin alloy.

While the photovoltaic element of the pin structure has been described above, the invention is also applicable to the photovoltaic elements having a laminated pin structure such as a pinpin structure or a pinpinpin structure, or to photovoltaic elements having a laminated nip structure such as an nipnip structure or an nipnipnip structure. In certain embodiments, the benefit is the greatest for use as the top p-layer in a multijunction solar cell.

The photoelectric conversion element according to the invention will be described below in detail, exemplifying solar cells or photosensors, to which the invention is not limitative.

First, a substrate was fabricated. A stainless steel substrate having a desired thickness was cleaned and dried. A light reflection layer of a suitable reflective material such as Ag was formed on the surface of the stainless substrate at room temperature, and then a transparent conductive layer of ZnO was formed thereon using a suitable deposition method such that fabrication of the substrate was completed.

The photovoltaic element and method according to the invention is described in detail exemplifying a solar cell for photosensors for which the invention is not limitative.

EXAMPLE

The solar cell device structure of FIG. 5b is SS/back metal-reflector/ZnO layer/a-Si:H n-layer/a-SiGe:H absorber i-layer/nc-Si: p-layer@Ts=140° C./nc-Si: p-layer@Ts=70° C./ITO. The a-SiGe:H absorber i-layer was deposited using a gas mixture of disilane, germane and hydrogen with a varying germane to disilane ratio and a hydrogen dilution of 5-100. The illumination I-V measurement was taken under a Xe lamp solar simulator. Quantum efficiency (QE) measurement was made in the range of 350-900 nm using a Xe lamp. Light soaking was done under AM1.5 light from a metal halide lamp for 1000 hours.

FIGS. 6a, 6b and 6c show the short circuit current (Jsc) open circuit voltage (Voc), and the conversion efficiency (II) of n-i-p a-SiGe solar cells deposited on SS as a function of the [GeH4/Si2H6] ratio in the reaction gas, respectively. The solid lines in these figures are used only for guiding eyes. It is seen that with increasing GeH4 fraction, Jsc increases, whereas Voc decreases, as a result η reaches a maximum at an intermediate GeH4/Si2H6 ratio of about 0.3, before decreasing with further increasing GeH4/Si2H6 ratio. This intermediate value of GeH4/Si2H6 ratio is close to what is used for the i-layer in the middle cell of standard triple-junction solar cells.

An optimized p-layer ideal for wide bandgap a-Si solar cell is not appropriate for intermediate bandgap a-SiGe solar cells since it leads to either a low Voc or a poor fill factor. These devices show not only the decay of FF, but also anomalous rollover behaviors of the illuminated I-V characteristics, caused by the un-optimized p-layer, as shown in FIGS. 2a and 2b.

The above detailed description of the invention is given for explanatory purposes. It will be apparent to those skilled in the art that numerous changes and modifications can be made without departing from the scope of the invention. Accordingly, the whole of the foregoing description is to be construed in an illustrative and not a limitative sense, the scope of the invention being defined solely by the appended claims.

Claims

1-94. (canceled)

95. A method for manufacturing a solar cell comprising the steps of:

(i) providing a transparent substrate;
(ii) depositing a transparent conducting oxide layer on the transparent substrate;
(iii) depositing a second nano-crystalline silicon sub-p-layer on the transparent conducting oxide layer substrate at a second temperature;
(iv) depositing a first nano-crystalline silicon sub-p-layer on the second sub-p-layer at a first temperature that is different from the second temperature;
(v) depositing an i-layer on the first nano-crystalline silicon sub-p-layer; and
(vi) depositing an n-type semi-conductor layer on the i-layer substrate.

96. The method of claim 95, wherein during the i-layer deposition, a GeH4 to Si2H6 ratio provides a Ge content sufficient to forming a high efficiency single-junction solar cell.

97. The method of claim 95, wherein a ratio of hydrogen dilution to a deposition gas of about 5-100 is used to form the i-layer.

98. The method of claim 95, wherein the transparent substrate comprises glass or plastic.

99. The method of claim 95, wherein the first and second nano-crystalline silicon sub-p-layers are deposited by a chemical vapor deposition process.

100. The method of claim 99, wherein the chemical vapor deposition process comprises a plasma enhanced chemical vapor deposition process.

101. The method of claim 100, in which the plasma enhanced chemical vapor deposition comprises a radio frequency plasma enhanced chemical vapor deposition process.

102. The method of claim 95, wherein the i-layer comprises hydrogenated amorphous silicon germanium having a bandgap ranging from about 1.4 e-V to about 1.6 e-V, and wherein the first and second nano-crystalline sub-p-layers have a bandgap of around 1.6 e-V.

103. The method of claim 100, wherein the plasma enhanced chemical vapor deposition includes at least one of the following: cathodic direct current glow discharge, anodic direct current glow discharge, radio frequency glow discharge, very high frequency (VHF) glow discharge, alternate current glow discharge, or microwave glow discharge at a pressure ranging from about 0.5 to about 5 TORR with a dilution ratio of diluent to feedstock (deposition gas) ranging from about 5:1 to about 200:1.

104. The method of claim 95, wherein the second temperature at which the second nano-crystalline silicon sub-p-layer is deposited is lower than the first temperature at which the first nano-crystalline silicon sub-p-layer is deposited.

105. The method of claim 95, wherein a junction formed between the first nano-crystalline silicon sub-p-layer and the i-layer has a current-voltage relationship where the rate of change of the current-voltage relationship is one of at least a constant or an increasing rate of change.

106. The method of claim 95, wherein the i-layer comprises at least one of amorphous silicon germanium (a-Si(1−x)Gex) and hydrogenated amorphous silicon germanium (a-Si(1−x)Gex:H).

107. A method for manufacturing a solar cell comprising the steps of:

(i) providing a transparent substrate;
(ii) depositing a transparent conducting oxide layer on the transparent substrate;
(iii) depositing a second nano-crystalline silicon sub-p-layer on the transparent conducting oxide layer at a second temperature;
(iv) depositing a first nano-crystalline silicon sub-p-layer on the second nano-crystalline silicon sub-p-layer at a first temperature that is different from the second temperature, wherein the second nano-crystalline silicon sub-p-layer is formed from the same material as the first sub-p-layer;
(v) depositing an i-layer on the first sub-p-layer; and
(vi) depositing an n-type layer on the i-layer.

108. The method of claim 107, wherein the second nano-crystalline silicon sub-p-layer has a transparency greater than the first nano-crystalline silicon sub-p-layer.

109. The method of claim 107, wherein there is a minimal mismatch between the bandgap of the first nano-crystalline silicon sub-p-layer and the bandgap of the i-layer.

110. The method of claim 107, wherein the first nano-crystalline silicon sub-p-layer has a first thickness and the second nano-crystalline silicon sub-p-layer has a second thickness that is different from the first thickness.

111. The method of claim 110, wherein the first thickness is in the range of about 0.001 microns to about 0.004 microns, and the second thickness is in the range of about 0.005 microns to about 0.02 microns.

112. A method for manufacturing a solar cell comprising:

(i) providing a transparent substrate;
(ii) depositing a transparent conducting oxide layer on the transparent substrate;
(iii) depositing a second sub-p-layer comprised of nano-crystalline silicon on the transparent conducting oxide layer at a second temperature, the second sub-p-layer being doped with a boron-containing compound;
(iv) depositing a first sub-p-layer comprised of nano-crystalline silicon on the second sub-p-layer at a first temperature that is different from the second temperature, the first sub-p-layer being doped with a boron-containing compound;
(v) depositing an i-layer on the first sub-p-layer; and
(vi) depositing an n-type layer on the i-layer.

113. The method of claim 112, wherein the second temperature at which the second nano-crystalline silicon sub-p-layer is deposited is lower than the first temperature at which the first nano-crystalline silicon sub-p-layer is deposited.

114. The method of claim 112, wherein the second nano-crystalline silicon sub-p-layer has a transparency greater than the first nano-crystalline silicon sub-p-layer.

115. The method of claim 112, wherein there is a minimal mismatch between the bandgap of the first nano-crystalline silicon sub-p-layer and the bandgap of the i-layer.

116. The method of claim 112, wherein the first nano-crystalline silicon sub-p-layer has a first thickness and the second nano-crystalline silicon sub-p-layer has a second thickness that is different from the first thickness.

117. The method of claim 116, wherein the first thickness is in the range of about 0.001 microns to about 0.004 microns, and the second thickness is in the range of about 0.005 microns to about 0.02 microns.

118. The method of claim 112, wherein a junction formed between the first nano-crystalline silicon sub-p-layer and the i-layer has a current-voltage relationship where the rate of change of the current-voltage relationship is one of at least a constant or an increasing rate of change.

Patent History
Publication number: 20110111550
Type: Application
Filed: Dec 14, 2010
Publication Date: May 12, 2011
Inventors: Xunming Deng (Sylvania, OH), Xianbo Liao (Toledo, OH), Wenhui Du (Toledo, OH)
Application Number: 12/967,225
Classifications
Current U.S. Class: Graded Composition (438/87); Amorphous Semiconductor (438/96); For Device Having Potential Or Surface Barrier (epo) (257/E31.037)
International Classification: H01L 31/0352 (20060101);