Amorphous Semiconductor Patents (Class 438/96)
  • Patent number: 10087520
    Abstract: An ion implantation system is provided having an ion source configured to form an ion beam from aluminum iodide. A beamline assembly selectively transports the ion beam to an end station configured to accept the ion beam for implantation of aluminum ions into a workpiece. The ion source has a solid-state material source having aluminum iodide in a solid form. A solid source vaporizer vaporizes the aluminum iodide, defining gaseous aluminum iodide. An arc chamber forms a plasma from the gaseous aluminum iodide, where arc current from a power supply is configured to dissociate aluminum ions from the aluminum iodide. One or more extraction electrodes extract the ion beam from the arc chamber. A water vapor source further introduces water to react residual aluminum iodide to form hydroiodic acid, where the residual aluminum iodide and hydroiodic acid is evacuated from the system.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: October 2, 2018
    Assignee: Axcelis Technologies, Inc.
    Inventors: Dennis Elliott Kamenitsa, Richard J. Rzeszut, Fernando M. Silva, Neil K. Colvin
  • Patent number: 9809871
    Abstract: A method of preparing silver nanoparticles, including silver nanorings. A zinc oxide thin film is formed initially by direct-current sputtering of a zinc target onto a substrate. A silver thin film is then formed by a similar sputtering technique, of a silver target onto the zinc oxide thin film. After that, the silver thin film is subject to an annealing treatment. The temperature, duration and atmosphere of the annealing treatment can be varied to control the average particle size, average distance between particles (density), particle size distribution of the silver nanoparticles. In at least one embodiment, silver nanoparticles of ring structure are produced.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: November 7, 2017
    Assignee: King Fahd University of Petroleum and Minerals
    Inventors: Qasem Ahmed Drmosh, Mohammad Kamal Hossain, Nouar Amor Tabet
  • Patent number: 9716204
    Abstract: The invention relates to a method for producing a photovoltaic solar cell having at least one hetero-junction, including the following steps: A) providing a semiconductor substrate having base doping; B) producing a hetero-junction on at least one side of the semiconductor substrate, which hetero-junction has a doped hetero-junction layer and a dielectric tunnel layer arranged indirectly or directly between the hetero-junction layer and the semiconductor substrate; C) heating at least the hetero-junction layer in order to improve the electrical quality of the heterojunction. The invention is characterized in that, in a step D after step C, hydrogen is diffused into the hetero-junction layer and/or to the interface between the tunnel layer and the semiconductor substrate.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: July 25, 2017
    Assignee: Fraunhofer-Gesellschaft Zur Förderung der Angewandten Forschung E.V.
    Inventor: Frank Feldmann
  • Patent number: 9397246
    Abstract: A method for fabricating a device with integrated photovoltaic cells includes supporting a semiconductor substrate on a first handle substrate and doping the semiconductor substrate to form doped alternating regions with opposite conductivity. A doped layer is formed over a first side the semiconductor substrate. A conductive material is patterned over the doped layer to form conductive islands such that the conductive islands are aligned with the alternating regions to define a plurality of photovoltaic cells connected in series on a monolithic structure.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: July 19, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 9328414
    Abstract: Disclosed herein is a method of manufacturing a thin film semiconductor device includes the step of forming a silicon thin film including a crystalline structure on a substrate by a plasma CVD process in which a high order silane gas represented by the formula SinH2n+2 (n=2, 3, . . . ) and a hydrogen gas are used as film forming gases.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: May 3, 2016
    Assignee: Japan Display Inc.
    Inventor: Masafumi Kunii
  • Patent number: 9206513
    Abstract: First and second electrodes are apart from each other in a chamber. Plates are disposed on a substrate in the second electrode. Each of the plates comprises first and second parts for supplying first and second gas to a space between the first and second electrodes, respectively, a first supply path for first gas connected to the first part, and a second supply path for second gas connected to the second part. The substrate comprises a heater for the first gas, a first introducing path for introducing the first gas to the first supply path, and a second introducing path for introducing the second gas to the second supply path. The second supply path comprises a mainstream part without the second part and branch parts with the second part. A connecting portion of the second introducing path and the mainstream part is positioned in an adjacent portion of the plates.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: December 8, 2015
    Assignee: KYOCERA Corporation
    Inventors: Norikazu Ito, Koichiro Niira, Shinichiro Inaba
  • Patent number: 9059341
    Abstract: A method for manufacturing an interdigitated back contact solar cell. comprising the steps of: (a) providing a silicon substrate doped with a first dopant; (b) doping the rear surface of the silicon substrate with a second dopant in a first pattern; (c) forming a silicon dioxide layer on the rear surface; (d) depositing a silicon-containing paste comprising silicon-containing particles on the silicon dioxide layer in a second pattern; (e) exposing the substrate to a diffusion ambient, wherein the diffusion ambient comprises a third dopant and wherein the third dopant is a counter dopant to the second dopant; (f) heating the substrate in a drive-in ambient; and (g) removing the silicon dioxide layer and the doped silicate glass layer from the silicon substrate, wherein a region doped with the second dopant and a region doped with the third dopant collectively form an interdigitated pattern on the rear surface of the silicon substrate.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: June 16, 2015
    Assignee: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: Giuseppe Scardera, Maxim Kelman, Shannon Dugan, Dmitry Poplavskyy, Daniel Aneurin Inns, Karim Lotfi Bendimerad
  • Patent number: 9040812
    Abstract: A photovoltaic device including a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: May 26, 2015
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Patent number: 9040340
    Abstract: A method for fabricating a photovoltaic device includes depositing a p-type layer at a first temperature and depositing an intrinsic layer while gradually increasing a deposition temperature to a final temperature. The intrinsic layer deposition is completed at the final temperature. An n-type layer is formed on the intrinsic layer.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: May 26, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ahmed Abou-Kandil, Keith E. Fogel, Augustin J. Hong, Jeehwan Kim, Mohamed Saad, Devendra K. Sadana
  • Patent number: 9040326
    Abstract: A III-nitride light emitting diode (LED) and method of fabricating the same, wherein at least one surface of a semipolar or nonpolar plane of a III-nitride layer of the LED is textured, thereby forming a textured surface in order to increase light extraction. The texturing may be performed by plasma assisted chemical etching, photolithography followed by etching, or nano-imprinting followed by etching.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: May 26, 2015
    Assignee: The Regents of the University of California
    Inventors: Hong Zhong, Anurag Tyagi, Kenneth J. Vampola, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 9035311
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Soo-Beom Jo, Dong-Hyun Lee, Kil-Won Lee, Maxim Lisachenko, Yun-Mo Chung, Bo-Kyung Choi, Jong-Ryuk Park, Ki-Yong Lee
  • Patent number: 9029688
    Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: May 12, 2015
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Patent number: 9029185
    Abstract: A method for manufacturing a solar cell according to an embodiment of the present invention includes preparing a semiconductor substrate having a first conductivity type dopant; ion-implanting a pre-amorphization elements into a front surface of the semiconductor substrate to form an amorphous layer; and forming an emitter layer by ion-implanting second conductivity type dopant into the front surface of the semiconductor substrate. The method then further includes heat-treating the layers to activate the second conductivity type dopant. The method further includes forming a back surface field layer at a back surface of the semiconductor substrate by ion-implanting a first conductivity type dopant.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: May 12, 2015
    Assignee: LG Electronics Inc.
    Inventors: Kyoungsoo Lee, Seongeun Lee
  • Patent number: 9024177
    Abstract: A solar cell includes a doped layer disposed on a first surface of a semiconductor substrate, a doped polysilicon layer disposed in a first region of a second surface of the semiconductor substrate, a doped area disposed in a second region of the second surface, and an insulating layer covering the doped polysilicon layer and the doped area. The insulating layer has openings exposing portions of the doped polysilicon layer and the doped layer, and the doped polysilicon layer and doped layer are respectively connected to a first electrode and a second electrode through the openings. The semiconductor substrate and the doped layer have a first doping type. One of the doped polysilicon layer and the doping area has a second doping type, and the other one of the doped polysilicon layer and the doping area has the first doping type which is opposite to the second doping type.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: May 5, 2015
    Assignee: AU Optronics Corp.
    Inventors: Peng Chen, Shuo-Wei Liang
  • Publication number: 20150101659
    Abstract: A hetero-contact solar cell has a front side provided for an incidence of solar radiation. The solar cell has an absorber of a crystalline semiconductor material of a first conductivity type, an amorphous semiconductor layer of the first conductivity type doped more highly than the absorber and an electrically conductive, transparent front side conduction layer provided on the amorphous semiconductor layer. A front side contact is provided on the solar cell and has spaced-apart contact structures. An emitter of a second conductivity type opposite to the first conductivity type is provided on a back side. A back side contact is arranged on the back side. The emitter-related absorption losses of the solar cells can be eliminated by the back side contact having a back side contact layer extending over the surface of the back side, and the front side conduction layer containing a specific resistance from 7×10?4 to 50×10?4 ?cm.
    Type: Application
    Filed: May 6, 2013
    Publication date: April 16, 2015
    Applicant: ROTH & RAU AG
    Inventors: Giuseppe Citarella, Matthias Erdmann, Frank Wuensch, Martin Weinke, Guillaume Wahli
  • Patent number: 9006021
    Abstract: The amorphous silicon film formation method includes forming a seed layer on the surface of a base by heating the base and flowing aminosilane-based gas onto the heated base; and forming an amorphous silicon film on the seed layer by heating the base, supplying silane-based gas containing no amino group onto the seed layer on the surface of the heated base, and thermally decomposing the silane-based gas containing no amino group.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: April 14, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Kazuhide Hasebe, Hiroki Murakami, Akinobu Kakimoto
  • Patent number: 8993373
    Abstract: Methods of doping a solar cell, particularly a point contact solar cell, are disclosed. One surface of a solar cell may require portions to be n-doped, while other portions are p-doped. At least one lithography step can be eliminated by the use of a blanket doping of species having one conductivity and a patterned counterdoping process of species having the opposite conductivity. The areas doped during the patterned implant receive a sufficient dose so as to completely reverse the effect of the blanket doping and achieve a conductivity that is opposite the blanket doping. In some embodiments, counterdoped lines are also used to reduce lateral series resistance of the majority carriers.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: March 31, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Nicholas Bateman, John Graff
  • Patent number: 8993371
    Abstract: The method of manufacturing a light absorbing layer for a solar cell by performing thermal treatment on a specimen configured to include thin films of one or more of copper, indium, and gallium on a substrate and element selenium, includes steps of: (a) heating a wall of a chamber up to a predefined thin film formation temperature in order to maintain a selenium vapor pressure; (b) mounting the specimen and the element selenium on the susceptor at the room temperature and loading the susceptor in the chamber; and (c) heating the specimen in the lower portion of the susceptor and, at the same time, heating the element selenium in the upper portion of the susceptor, wherein, in the step (c), in order for liquefied selenium not to be condensed on the specimen which is loaded at the room temperature and is not yet heated, the temperature of the element selenium and the specimen loaded in the chamber are individually controlled, so that the selenium vapor pressure of an inner space of the chamber does not exceed a
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: March 31, 2015
    Assignee: Semics Inc.
    Inventor: Seong Hoon Song
  • Publication number: 20150087106
    Abstract: In various embodiments, photovoltaic devices incorporate discontinuous passivation layers (i) disposed between a thin-film absorber layer and a partner layer, (ii) disposed between the partner layer and a front contact layer, and/or (iii) disposed between a back contact layer and the thin-film absorber layer.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 26, 2015
    Inventors: Markus Eberhard Beck, Timothy J. Nagle, Sourav Roger Basu
  • Publication number: 20150087108
    Abstract: This disclosure describes systems and methods for making at least a portion of a photovoltaic device. This may include a method of manufacturing, an optimization procedure and an apparatus for the PECVD (plasma enhanced chemical vapor deposition) of thin films over large area substrates. In particular, the system may be used to deposit thin film silicon material for photovoltaic (PV) applications. The photovoltaic device may be achieved by a combination of plasma chamber design (e.g., inter-electrode separation) and plasma process parameters (e.g., pressure, applied RF voltage, etc.) to optimize the doped and/or intrinsic layers of the solar cell (e.g., p-i-n junction).
    Type: Application
    Filed: September 26, 2014
    Publication date: March 26, 2015
    Inventors: Elena Lorena Salabas, Eduard Kuegler, Chloe Prigent, Aurel Salabas
  • Patent number: 8987856
    Abstract: A photodiode, a light sensor and a fabricating method thereof are disclosed. An n-type semiconductor layer and an intrinsic semiconductor layer of the photodiode respectively comprise n-type amorphous indium gallium zinc oxide (IGZO) and intrinsic IGZO. The oxygen content of the intrinsic amorphous IGZO is greater than the oxygen content of the n-type amorphous IGZO. A light sensor comprise the photodiode is also disclosed.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: March 24, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Fang-An Shu, Yao-Chou Tsai, Ted-Hong Shinn
  • Patent number: 8987588
    Abstract: A solar cell and method of fabricating the same are provided. The substrate of the solar cell has heavily-doped regions and lightly-doped regions. The anode and the cathode are disposed on the back surface of the substrate, and thus the amount of incident light on the front surface of the substrate is increased. The anode and the cathode are in contact with the heavily doped regions to form selective emitter structure, and thus the contact resistance is reduced. The lightly-doped regions, which are not in contact with the anode and the cathode, have lower saturation current, and thus recombination of hole-electron pairs is reduced, and absorption of infrared light is increased.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: March 24, 2015
    Assignee: AU Optronics Corp.
    Inventors: Peng Chen, Shou-Wei Liang
  • Patent number: 8987738
    Abstract: A photoelectric conversion device with improved electric characteristics is provided. The photoelectric conversion device has a structure in which a window layer is formed by a stack of a first silicon semiconductor layer and a second silicon semiconductor layer, and the second silicon semiconductor layer has high carrier concentration than the first silicon semiconductor layer and has an opening. Light irradiation is performed on the first silicon semiconductor layer through the opening without passing through the second silicon semiconductor layer; thus, light absorption loss in the window layer can be reduced.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: March 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takashi Hirose, Naoto Kusumoto
  • Patent number: 8980661
    Abstract: Provided is a method for manufacturing a light emitting device comprising a light emitting element and an optical part, the method comprising the steps of (i) forming a hydroxyl film on a bonding surface of each of the light emitting element and the optical part by an atomic layer deposition, and (ii) bonding the bonding surfaces of the light emitting element and the optical part with each other, each of the bonding surfaces having the hydroxyl film formed thereon, wherein a substep is repeated at least one time in the step (i), in which substep a first raw material gas and a second raw material gas are sequentially supplied onto the bonding surfaces of the light emitting element and the optical part, and wherein the bonding of the bonding surfaces in the step (ii) is performed without a heating treatment.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: March 17, 2015
    Assignee: Nichia Corporation
    Inventors: Masatsugu Ichikawa, Masahiko Sano, Daisuke Sanga, Toru Takasone, Shunsuke Minato
  • Patent number: 8981513
    Abstract: An electrical circuit includes a solar cell that has a photovoltaically active front side and a back side. An electronic or micromechanical component is arranged on the back side of the solar cell and is electrically connected to the photovoltaically active front side of the solar cell by a contact-making structure. The electrical circuit also includes a transparent first protective layer that is arranged on the photovoltaically active front side of the solar cell. The contact-making structure has a first contact-making section that is arranged on a front side of the first protective layer facing away from the solar cell.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: March 17, 2015
    Assignee: Robert Bosch GmbH
    Inventors: Ricardo Ehrenpfordt, Mathias Bruendel, Daniel Pantel, Frederik Ante, Johannes Kenntner
  • Patent number: 8980683
    Abstract: A resistive memory device and a fabrication method thereof are provided. The resistive memory device includes a variable resistive layer formed on a semiconductor substrate in which a bottom structure is formed, a lower electrode formed on the variable resistive layer, a switching unit formed on the lower electrode, and an upper electrode formed on the switching unit.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: March 17, 2015
    Assignee: SK Hynix Inc.
    Inventors: Min Yong Lee, Young Ho Lee, Seung Beom Baek, Jong Chul Lee
  • Patent number: 8975172
    Abstract: [Object] To provide a method for manufacturing a solar cell element including a semiconductor substrate that includes a high-concentration dopant layer located near the surface of the semiconductor substrate and a low-concentration dopant layer located more inside the semiconductor substrate than the high-concentration dopant layer. [Solving Means] A method includes heating a semiconductor substrate having a first conductivity type in a first atmosphere which contains a dopant having a second conductivity type and which has a first dopant concentration; heating in a second atmosphere the semiconductor substrate heated in the first atmosphere, the second atmosphere having a second dopant concentration less than the first dopant concentration; and heating in a third atmosphere the semiconductor substrate heated in the second atmosphere, the third atmosphere having a third dopant concentration greater than the second dopant concentration.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: March 10, 2015
    Assignee: KYOCERA Corporation
    Inventors: Rui Yatabe, Kenichi Kurobe, Yosuke Inomata
  • Publication number: 20150063543
    Abstract: A radiation detector may include: a first photoconductor layer including a plurality of photosensitive particles; and/or a second photoconductor layer on the first photoconductor layer, and including a plurality of crystals obtained by crystal-growing photosensitive material. At least some of the plurality of photosensitive particles of the first photoconductor layer may fill gaps between the plurality of crystals of the second photoconductor layer. A method of manufacturing a radiation detector may include: forming a first photoconductor layer by applying paste, including solvent mixed with a plurality of photosensitive particles, to a first substrate; forming a second photoconductor layer by crystal-growing photosensitive material on a second substrate; pressing the crystal-grown second photoconductor layer on the first photoconductor layer that is applied to the first substrate; and/or removing the solvent in the first photoconductor layer via a drying process.
    Type: Application
    Filed: September 1, 2014
    Publication date: March 5, 2015
    Inventors: Seung-hyup LEE, Sun-il KIM, Young KIM, Chang-jung KIM
  • Publication number: 20150062088
    Abstract: A method of forming a photo sensor includes the following steps. A substrate is provided, and a first electrode is formed on the substrate. A first silicon-rich dielectric layer is formed on the first electrode for sensing an infrared ray, wherein the first silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second silicon-rich dielectric layer is formed on the first silicon-rich dielectric layer for sensing visible light beams, wherein the second silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second electrode is formed on the second silicon-rich dielectric layer.
    Type: Application
    Filed: November 7, 2014
    Publication date: March 5, 2015
    Inventors: An-Thung Cho, Chia-Tien Peng, Hung-Wei Tseng, Cheng-Chiu Pai, Yu-Hsuan Li, Chun-Hsiun Chen, Wei-Ming Huang
  • Patent number: 8969121
    Abstract: A method for manufacturing a solar cell according to an embodiment of the present invention includes preparing a semiconductor substrate having a first conductivity type dopant; ion-implanting a pre-amorphization elements into a front surface of the semiconductor substrate to form an amorphous layer; and forming an emitter layer by ion-implanting second conductivity type dopant into the front surface of the semiconductor substrate. The method then further includes heat-treating the layers to activate the second conductivity type dopant. The method further includes forming a back surface field layer at a back surface of the semiconductor substrate by ion-implanting a first conductivity type dopant.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: March 3, 2015
    Assignee: LG Electronics Inc.
    Inventors: Kyoungsoo Lee, Seongeun Lee
  • Patent number: 8963273
    Abstract: A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: February 24, 2015
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Michel Marty, François Roy, Jens Prima
  • Patent number: 8956906
    Abstract: The invention relates to a method and a device for producing a semiconductor layer. The problem addressed is that of increasing the deposition rate of the layer constituents and significantly improving the efficiency of a resulting solar cell. At the same time, the material costs are intended to be reduced. The problem is solved by virtue of the fact that, in a vacuum chamber, metal evaporator sources release Cu, In and/or Ga or the chalcogenide compounds, the latter are focused as metal vapor jets onto the substrate, and Se and/or S emerge(s) in an ionized fashion from a chalcogen low-energy wide-beam ion source and this beam is focused onto the surface of the substrate in such a way that it overlaps the metal vapor jets. A device for carrying out the method is described.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: February 17, 2015
    Assignee: Solarion AG
    Inventors: Hendrik Zachmann, Karsten Otte, Horst Neumann, Frank Scholze, Lutz Pistol
  • Publication number: 20150040974
    Abstract: The method of manufacturing a solar cell, which comprises a semiconductor substrate (1) with a first side (1a) and an opposed second side (1b), at which first side an active region doped with charge carriers of a first conductivity type is defined selectively. The method comprises introducing said charge carriers into the substrate (1) on said first side (1a) by ion implantation in an implantation step at a dose level that induces surface amorphization, therewith forming an amorphized region. Thereafter, material in part of the amorphized region is selectively recrystallized to define a first, recrystallized subregion (5), a remaining part of the amorphized region defining a second subregion (15). Subsequently, the recrystallized material of the first subregion (5) is at least partially removed, therewith creating the selectively defined active region and inducing a surface topology between the at least partially removed first subregion (5) and the second subregion (15).
    Type: Application
    Filed: May 3, 2013
    Publication date: February 12, 2015
    Inventor: Ronald Cornelis Gerard Naber
  • Patent number: 8946545
    Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: February 3, 2015
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Patent number: 8945976
    Abstract: A thin silicon solar cell is described. An example solar cell may be fabricated from a crystalline silicon wafer having a thickness of approximately 50 micrometers to 500 micrometers. The solar cell comprises a first region having a p-n homojunction, a second region that creates heterojunction surface passivation, and a third region that creates heterojunction surface passivation. Amorphous silicon layers are deposited on both sides of the silicon wafer. A final layer of transparent conductive oxide is formed on both sides. Metal contacts are applied to the transparent conductive oxide.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: February 3, 2015
    Assignee: Suniva, Inc.
    Inventors: Daniel L. Meier, Ajeet Rohatgi
  • Patent number: 8937024
    Abstract: A process for producing at least one photonic component (32, 33, 35, 39, 41), includes inserting the photonic component (32, 33, 35, 39, 41) into a surface layer (12) of a semiconductor wafer and/or within a semiconductor wafer, especially of a semiconductor chip (11, 31, 34, 38, 40) for the simpler and more cost-effective production with the most desired possible three-dimensional structures. At least one laser beam (22) is coupled into the material of the surface layer (12) and/or of the semiconductor wafer, in which the laser beam (22) is focused at a predetermined depth in the material. At least one property of the material and/or the material structure is changed in the area of focus (23, 36).
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: January 20, 2015
    Assignee: BIAS Bremer Institut für angewandte Strahltechnik GmbH
    Inventors: Ralf Bergmann, Mike Bülters, Vijay Vittal Parsi Sreenivas
  • Publication number: 20150007879
    Abstract: Discussed is a solar cell including a semiconductor substrate, a tunneling layer formed on one surface of the semiconductor substrate, a first conductive semiconductor layer formed on a surface of the tunneling layer and a second conductive semiconductor layer formed on the surface the tunneling layer. A separation portion separates the first and second conductive semiconductor layers from each other, and is formed on the surface of the tunneling layer at a location corresponding to at least a portion of a boundary between the first and second conductive semiconductor layers.
    Type: Application
    Filed: July 3, 2014
    Publication date: January 8, 2015
    Inventors: Hyungjin Kwon, Hyunjung Park, Junghoon Choi, Changseo Park
  • Publication number: 20150007867
    Abstract: A photoelectric conversion device includes an n-type semiconductor layer and a p-type semiconductor layer, a collecting electrode formed on the n-type semiconductor layer, and a collecting electrode formed on the p-type semiconductor layer, on a back surface opposite to a light receiving surface of an n-type crystalline silicon substrate, and an n-type semiconductor region on a surface on a light receiving surface side of the n-type crystalline silicon substrate, wherein in the n-type semiconductor region, an n-type semiconductor region that is opposed to the n-type semiconductor layer with the n-type crystalline silicon substrate therebetween and an n-type semiconductor region that is opposed to the p-type semiconductor layer with the n-type crystalline silicon substrate therebetween have different average impurity concentrations.
    Type: Application
    Filed: January 31, 2013
    Publication date: January 8, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hidetada Tokioka, Takehiko Sato
  • Publication number: 20150011043
    Abstract: A solar cell is provided with: a semiconductor substrate; an insulating layer formed of a silicon compound or a metal compound, and having a predetermined pattern over the substrate; and a surface covering layer formed of an amorphous semiconductor, having a same pattern as the insulating layer, and that directly contacts the insulating layer.
    Type: Application
    Filed: September 25, 2014
    Publication date: January 8, 2015
    Inventors: Sumito SHIMIZU, Tomohiro SAITOU
  • Patent number: 8927428
    Abstract: A process for the formation of at least one aluminum p-doped surface region of an n-type semiconductor substrate comprising the steps: (1) providing an n-type semiconductor substrate, (2) applying and drying an aluminum paste on at least one surface area of the n-type semiconductor substrate, (3) firing the dried aluminum paste, and (4) removing the fired aluminum paste with water, wherein the aluminum paste employed in step (2) includes particulate aluminum, an organic vehicle and 3 to 20 wt. % of glass frit, based on total aluminum paste composition.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: January 6, 2015
    Assignee: E I du Pont de Nemours and Company
    Inventors: Kenneth Warren Hang, Alistair Graeme Prince, Michael Rose, Richard John Sheffield Young
  • Patent number: 8927324
    Abstract: A method for the production of a wafer-based, back-contacted heterojunction solar cell includes providing at least one absorber wafer. Metallic contacts are deposited as at least one of point contacts and strip contacts in a predetermined distribution on a back side of the at least one absorber wafer. The contacts have steep flanks that are higher than a cumulative layer thickness of an emitter layer and an emitter contact layer and are sheathed with an insulating sheath. The emitter layer is deposited over an entire surface of the back side of the at least one absorber wafer. The emitter contact layer is deposited over an entire surface of the emitter layer so as to form an emitter contact system. At least one of the emitter layer and the emitter contact layer is selectively removed so as to expose the steep flanks of the contacts that are covered with the insulating sheath.
    Type: Grant
    Filed: October 10, 2009
    Date of Patent: January 6, 2015
    Assignee: Helmholtz-Zentrum Berlin Fuer Materialien und Energie GmbH
    Inventor: Rolf Stangl
  • Patent number: 8927857
    Abstract: A method of producing a photovoltaic device includes providing a stretchable substrate for the photovoltaic device; and stretching the substrate to produce a stretched substrate. The method further includes depositing a structure comprising hydrogenated amorphous silicon onto the stretched substrate; and subjecting the deposited hydrogenated amorphous silicon structure and the stretched substrate to a compressive force to form a compressively strained photovoltaic device.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Ahmed Abou-Kandil, Nasser Afify, Wanda Andreoni, Alessandro Curioni, Augustin J. Hong, Jeehwan Kim, Petr Khomyakov, Devendra K. Sadana
  • Publication number: 20150000732
    Abstract: A method for fabricating a solar cell includes the steps of providing a substrate, forming a transparent conductive layer on a surface of the substrate, forming a plurality of photoresist patterns on the transparent conductive layer, forming a dielectric layer on the photoresist patterns and the transparent conductive layer, in which a part of a sidewall of the photoresist pattern is exposed from the dielectric layer, removing the photoresist patterns and a part of the dielectric layer covering the photoresist pattern so that a plurality of openings are defined in the remaining part of the dielectric layer, and forming plural electrodes in the openings respectively. A solar cell fabricated by the method is also disclosed.
    Type: Application
    Filed: June 25, 2014
    Publication date: January 1, 2015
    Inventor: Po-Chuan YANG
  • Patent number: 8921148
    Abstract: The present invention provides strategies for improving the adhesion among two or more of transparent conducting oxides, electrically conductive grid materials, and dielectric barrier layers. As a consequence, these strategies are particularly useful in the fabrication of heterojunction photovoltaic devices such as chalcogenide-based solar cells. When the barrier is formed and then the grid is applied to vias in the barrier, the structure has improved moisture barrier resistance as compared to where the barrier is formed over or around the grid. Adhesion is improved to such a degree that grid materials and dielectric barrier materials can cooperate to provide a hermetic seal over devices to protect against damage induced by environmental conditions, including damage due to water intrusion. This allows the collection grids to be at least partially exposed above the dielectric barrier, making it easy to make electronic connection to the devices.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: December 30, 2014
    Assignee: Dow Global Technologies LLC
    Inventors: Paul R. Elowe, Marty W. DeGroot, Michael E. Mills, Matt A. Stempki
  • Patent number: 8921149
    Abstract: A first species selectively dopes a workpiece to form a first doped region. In one embodiment, a selective implant is performed using a mask with apertures. A soft mask is applied to the first doped region. A second species is implanted into the workpiece to form a second implanted region. The soft mask blocks a portion of the second species. Then the soft mask is removed. The first species and second species may be opposite conductivities such that one is p-type and the other is n-type.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: December 30, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Nicholas P. T. Bateman, William T. Weaver
  • Publication number: 20140373919
    Abstract: A photovoltaic cell including a semiconductor substrate of a first conductivity type provided with a main surface, a first layer made from amorphous semiconductor material of first conductivity type in contact with the main surface of the substrate, a first electric contact formed on the first amorphous layer, a second layer of amorphous semiconductor material of a second conductivity type in contact with the main surface of the substrate, a second electric contact formed on the second amorphous layer and an electrically insulating layer, a cell wherein the electrically insulating layer is formed completely on the first amorphous layer and the first and second contacts extend on the electrically insulating layer.
    Type: Application
    Filed: January 3, 2013
    Publication date: December 25, 2014
    Inventors: Thibaut Desrues, Sylvain De Vecchi, Florent Souche
  • Patent number: 8916772
    Abstract: A three-dimensional thin-film semiconductor substrate with selective through-holes is provided. The substrate having an inverted pyramidal structure comprising selectively formed through-holes positioned between the front and back lateral surface planes of the semiconductor substrate to form a partially transparent three-dimensional thin-film semiconductor substrate.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: December 23, 2014
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang
  • Publication number: 20140360571
    Abstract: A manufacturing method of a solar cell is discussed. The manufacturing method of the solar cell includes forming a tunneling layer on one surface of a semiconductor substrate, forming a semiconductor layer on the tunneling layer, doping the semiconductor layer with a first conductive dopant and a second conductive dopant to form a first conductive semiconductor layer and a second conductive semiconductor layer, and diffusing hydrogen into the first and second conductive semiconductor layers to hydrogenate the first and second conductive semiconductor layers.
    Type: Application
    Filed: June 5, 2014
    Publication date: December 11, 2014
    Inventors: Kwangsun JI, Seungjik LEE, Sehwon AHN
  • Patent number: 8906734
    Abstract: A photovoltaic device and method include a crystalline substrate and an emitter contact portion formed in contact with the substrate. A back-surface-field junction includes a homogeneous junction layer formed in contact with the crystalline substrate and having a same conductivity type and a higher active doping density than that of the substrate. The homogeneous junction layer includes a thickness less than a diffusion length of minority carriers in the homogeneous junction layer. A passivation layer is formed in contact with the homogeneous junction layer opposite the substrate, which is either undoped or has the same conductivity type as that of the substrate.
    Type: Grant
    Filed: October 22, 2012
    Date of Patent: December 9, 2014
    Assignee: International Business Machines Corporation
    Inventors: Tze-Chiang Chen, Bahman Hekmatshoartabari, Devendra K. Sadana, Davood Shahrjerdi
  • Patent number: 8900915
    Abstract: Epitaxial structures, methods of making epitaxial structures, and devices incorporating such epitaxial structures are disclosed. The methods and the structures employ a liquid-phase Group IVA semiconductor element precursor ink (e.g., including a cyclo- and/or polysilane) and have a relatively good film quality (e.g., texture, density and/or purity). The Group IVA semiconductor element precursor ink forms an epitaxial film or feature when deposited on a (poly)crystalline substrate surface and heated sufficiently for the Group IVA semiconductor precursor film or feature to adopt the (poly)crystalline structure of the substrate surface. Devices incorporating a selective emitter that includes the present epitaxial structure may exhibit improved power conversion efficiency relative to a device having a selective emitter made without such a structure due to the improved film quality and/or the perfect interface formed in regions between the epitaxial film and contacts formed on the film.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: December 2, 2014
    Assignee: Thin Film Electronics ASA
    Inventors: Joerg Rockenberger, Fabio Zürcher, Mao Takashima