THIN FILM TRANSISTOR SUBSTRATE OF LIQUID CRYSTAL DISPLAY PANEL

Abstract

A thin film transistor substrate of a liquid crystal display panel and manufacturing method thereof are disclosed. The thin film transistor substrate of the liquid crystal display panel includes a substrate, a storage capacitor electrode, a first insulated layer, a gate electrode, a gate insulated layer, a patterned semiconductor layer, a source electrode, a drain electrode, a second insulated layer, and at least one pixel electrode. A part of the storage capacitor electrode overlaps a part of the pixel electrode to form a storage capacitor and the storage capacitor electrode includes a patterned transparent conducting layer and a patterned opaque conducting layer. Moreover, the patterned transparent conducting layer and the patterned opaque conducting layer are defined by a gray-tone mask, and an area of the patterned transparent conducting layer is larger than an area of the patterned opaque conducting layer to improve the aperture ratio.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a thin film transistor substrate of a liquid crystal display panel and a manufacturing method thereof, and more particularly, to a thin film transistor substrate of a liquid crystal display panel and a manufacturing method thereof which is capable of improving the aperture ratio.

2. Description of the Prior Art

Because of the advantages of low radiation, small size, and low power consumption, liquid crystal display panels have been widely applied to various electronic products, such as notebooks, personal digital assistants, flat televisions, and mobile phones. Generally, a liquid crystal display panel includes a thin film transistor substrate, a color filter substrate, and a liquid crystal layer disposed between the thin film transistor substrate and the color filter substrate. Moreover, the thin film transistor substrate has a plurality of pixel areas defined thereon, and a back light module is further disposed on a side of the liquid crystal display panel to provide back light. Accordingly, through controlling the voltage applying to the liquid crystal layer of each pixel area, corresponding gray scale can be obtained for each pixel area to display images. Furthermore, in order to maintain the voltage to the next frame, storage capacitors are usually disposed in each pixel areas of the thin film transistor substrate.

However, the material of the storage capacitor is an opaque metal layer. The opaque metal layer would block light, decrease the aperture ratio of each pixel area, and further reduce the brightness of the liquid crystal display panel. On the other hand, decease of the area of each storage capacitor electrodes may increase the aperture ratio of each pixel area, but this would lead to deterioration of display quality, such as generation of image flicker, because the voltage of the liquid crystal layer cannot be maintained to the next frame.

SUMMARY OF THE INVENTION

It is therefore one of the objectives of the present invention to provide a thin film transistor substrate of a liquid crystal display panel and a manufacturing method thereof to solve the problems which the conventional art faces.

In accordance with a preferred embodiment of the present invention, a manufacturing method of a thin film transistor substrate of a liquid crystal display panel includes the following steps. First of all, a substrate is provided. Then, a transparent conducting layer and an opaque conducting layer are formed on the substrate, wherein the opaque conducting layer is disposed on the transparent conducting layer. Thereafter, the transparent conducting layer and the opaque conducting layer are patterned by using a gray-tone mask to form at least one storage capacitor electrode. The storage capacitor electrode includes a patterned transparent conducting layer and a patterned opaque conducting layer, and an area of the transparent conducting layer is larger than an area of the patterned opaque conducting layer. Next, a first insulated layer is formed on the storage capacitor electrode. Then, at least one gate electrode is formed on the substrate. Subsequently, at least one gate insulated layer, a patterned semiconductor layer, a source electrode, a drain electrode, and a second insulated layer are formed sequentially on the gate electrode. Moreover, at least one pixel electrode is formed on the first insulated layer and on the second insulated layer. A part of the pixel electrode overlaps a part of the storage capacitor electrode to form a storage capacitor.

In accordance with a preferred embodiment of the present invention, a thin film transistor substrate of a liquid crystal display panel includes a substrate, a storage capacitor electrode, a first insulated layer, a gate electrode, a gate insulated layer, a patterned semiconductor layer, a source electrode, a drain electrode, a second insulated layer, and a pixel electrode. The storage capacitor electrode is disposed on the substrate. The storage capacitor includes a patterned transparent conducting layer and a patterned opaque conducting layer, the patterned opaque conducting layer is disposed on the transparent conducting layer, and an area of the patterned transparent conducting layer is larger than an area of the patterned opaque conducting layer. The first insulated layer is disposed on the storage capacitor electrode. Also, the gate electrode is disposed on the substrate. The gate insulated layer, the patterned semiconductor layer, the source electrode, the drain electrode, and the second insulated layer are disposed sequentially on the gate electrode. The pixel electrode is disposed on the second insulated layer and on the first insulated layer, and a part of the pixel electrode overlaps a part of the storage capacitor electrode to form a storage capacitor.

According to the thin film transistor substrate of the liquid crystal display panel and a manufacturing method thereof, the patterned transparent conducting layer and the patterned opaque conducting layer can be accomplished by using a gray-tone mask. In comparison with the method of forming the patterned transparent conducting layer and the opaque conducting layer by using the process with two masks, one mask is saved, and process steps are reduced. Also, the electrical difference caused by the misalignment between the patterned transparent conducting layer and the patterned opaque conducting layer is prevented. Moreover, the capacitance of the storage capacitor and the aperture ratio can be both increased by forming the patterned transparent conducting layer with larger area.

These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1-6 are schematic diagrams illustrating a manufacturing method of a thin film transistor substrate of a liquid crystal display panel of a first preferred embodiment of the present invention.

FIGS. 7-10 are schematic diagrams illustrating a manufacturing method of a thin film transistor substrate of a liquid crystal display panel of a second preferred embodiment of the present invention.

DETAILED DESCRIPTION

Certain terms are applied throughout the following description and claim to refer to particular components. As those of ordinary skill will appreciate, manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but in function. In the following discussion and in the claims, the terms “include”, “including”, “comprise”, and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to . . . ”. Moreover, the phrase “electrically connect” includes any direct or indirect means to electrically connect so that if it describe that a first device is electrically connected to a second device in the article, which means, the first device may be directly connected to the second device and also nay be indirectly connected to the second device through other devices or by other methods. Furthermore, it is noticeable that the figures are only used for description and not drawn to scale.

Please refer FIGS. 1-6. FIGS. 1-6 are schematic diagrams illustrating a manufacturing method of a thin film transistor substrate of a liquid crystal display panel of a first preferred embodiment of the present invention. As shown in FIG. 1, a substrate 10 is provided. The material of the substrate 10 may be glass, plastic, or quartz, but are not limited thereto and may be any other appropriate materials. Next, a transparent conducting layer 111 and an opaque conducting layer 112 are formed on the substrate 10. The opaque conducting layer 112 is disposed on the transparent conducting layer 111. In this embodiment, the transparent conducting layer 111 is made of transparent conducting materials, such as indium tin oxide (ITO) or zinc oxide (ZnO). Also, the opaque conducting layer 112 may be a metal layer which is made of such as aluminum (Al), chromium (Cr), molybdenum (Mo), tungsten (W), tantalum (Ta), copper (Cu), or alloys thereof. The transparent conducting layer 111 and the opaque conducting layer 112 in the present invention are not limited to the materials mentioned above and could be made of any other appropriate materials. Thereafter, a photo resist layer 121 is formed on the opaque conducting layer 112, and an exposure process is performed on the photo resist layer 121 by using a gray-tone mask (GTM) 20. The gray-tone mask 20 may be a half-tone mask (HTM), but not limited thereto. For example, the gray-tone mask 20 may be a phase shift mask. The gray-tone mask 20 at least has a first area 201, a semitransparent area 202, and a second area 203. It is appreciated that when the photo resist layer 121 is a positive photo resist layer, the first area 201 is a light-shielding area and the second area 203 is a transparent area; on the other hand, when the photo resist layer 121 is a negative photo resist layer, the first area 201 is a transparent area and the second area 203 is a light-shielding area. Moreover, the transmittance of the semitransparent area 202 may be adjusted based on different situations.

As shown in FIG. 2, after the exposure process, a developing process is implemented to remove a part of the photo resist layer 121 and therefore to form a patterned photo resist layer 122. During the exposure process, the photo resist layer 121 corresponding to the first area 201, the semitransparent area 202 and the second area 203 have different amount of exposure. Consequently, after the developing process, the thickness of the patterned photo resist layer 122 corresponding to the first area 201 is thicker than the thickness of the patterned photo resist layer 122 corresponding to the semitransparent area 202, and the patterned photo resist layer 122 corresponding to the second area 203 is removed. Then, as shown in FIG. 2 and FIG. 3A, the opaque conducting layer 112 and the transparent conducting layer 111 which are not covered by the patterned photo resist layer 122 are removed by an etching process. In this embodiment, the etching process may simultaneously remove the opaque conducting layer 112 and the transparent conducting layer 111 which are not covered by the patterned photo resist layer 122, but not limited thereto. For example, in another embodiment, the etching process may remove the opaque conducting layer 112 not covered by the patterned photo resist layer 122 primarily, and then remove the transparent conducting layer 111 not covered by the patterned photo resist layer 122. Moreover, a dry etching process or a wet etching process may be chosen as the etching process based on the materials of the opaque conducting layer 112 and the transparent conducting layer 111 to be etched.

Next, as shown in FIG. 3B, an ashing process is implemented to the patterned photo resist layer 122 to reduce the thickness of the patterned photo resist layer 122 corresponding to the first area 201, and also to remove the patterned photo resist layer 122 corresponding to the semitransparent area 202 to expose a part of the opaque conducting layer 112. Then, as shown in FIG. 3B and FIG. 4, the opaque conducting layer 112 not covered by the patterned photo resist layer 122 is removed by another etching process. Thereafter, the patterned photo resist layer 122 is removed. Accordingly, the present invention uses the gray-tone mask 20 to define the pattern of the transparent conducting layer 111 and the pattern of the opaque conducting layer 112, so as to form at least one storage capacitor electrode 11. The storage capacitor electrode 11 may form a storage capacitor with a pixel electrode to be formed subsequently, and the storage capacitor is able to keep the voltage difference of the pixel electrode during the period of scanning the pixel. In this embodiment, the storage capacitor electrode 11 includes a patterned transparent conducting layer 113 and a patterned opaque conducting layer 114, and an area of the patterned transparent conducting layer 113 is larger than an area of the patterned opaque conducting layer 114. Moreover, the patterned opaque conducting layer 114 of the storage capacitor electrode 11 is substantially corresponding to the first area 201, and the part of the patterned transparent conducting layer 113 of the storage capacitor electrode 11 protruding from the patterned opaque conducting layer 114 is substantially corresponding to the semitransparent area 202.

As shown in FIG. 5, a first insulated layer 13 is formed on the storage capacitor electrode 11. The first insulated layer 13 may be a single-layered insulated layer or a composite-layered insulated layer made of materials including silicon oxide, silicon nitride, or silicon oxynitride, but not limited thereto. Then, at least one gate electrode 14 is formed on the substrate 10. In the first preferred embodiment, the gate electrode 14 is formed on the first insulated layer 13 and the gate electrode 14 may be a layer made of metal, such as aluminum (Al), chromium (Cr), molybdenum (Mo), tungsten (W), tantalum (Ta), copper (Cu), or alloys thereof. Next, a gate insulated layer 15, a patterned semiconductor layer 16, a source electrode 171, a drain electrode 172, a data line 173, and a second insulated layer 18 are sequentially formed on the gate electrode 14. The gate insulated layer 15 is mainly used to isolate the gate electrode 14 from the layers formed thereon, such as the patterned semiconductor layer 16, the source electrode 171, and the drain electrode 172. Moreover, the source electrode 171, the drain electrode 172, and the data line 173 are formed by depositing a conducting layer (not shown in figure), and then by patterning the conducting layer with a photo etching process. In other words, the source electrode 171, the drain electrode 172, and the data line 173 could be made of the same conducting layer. Furthermore, the source electrode 171 is electrically connected to the data line 173, which is shown in FIG. 6.

Then, at least one pixel electrode 19 is formed on the second insulated layer 18 and on the first insulated layer 13. A part of the pixel electrode 19 overlaps a part of the storage capacitor electrode 11 to form a storage capacitor. In this preferred embodiment, the pixel electrode 19 is made of a transparent conducting layer, such as indium tin oxide or zinc oxide, but not limited thereto. It is appreciated that the second insulated layer 18 has at least one contact hole 181, and the pixel electrode 19 is electrically connected to the drain electrode 172 via the contact hole 181. Moreover, FIG. 6 illustrates a layout of the thin film transistor substrate of the liquid crystal display panel of the first preferred embodiment. In FIG. 6, four pixels are exemplarily illustrated, and one pixel P1 of four pixels is marked by a dotted frame. In addition, FIGS. 1-5 are cross-sectional views taken along line A-A′ in FIG. 6. By virtue of the aforementioned method, the thin film transistor substrate of the liquid crystal display panel of the first preferred embodiment of the present invention is completed.

According to the manufacturing method of forming the thin film transistor substrate of the liquid crystal display panel of the first preferred embodiment, the patterned transparent conducting layer 113 and the patterned opaque conducting layer 114 can be accomplished by using the gray-tone mask 20. In comparison with the method of forming the patterned transparent conducting layer 113 and the opaque conducting layer 114 by using the process with two masks, one mask is saved, and process steps are reduced. Also, the electrical difference caused by the misalignment between the patterned transparent conducting layer 113 and the patterned opaque conducting layer 114 is prevented. The storage capacitor electrode 11 includes the patterned transparent conducting layer 113 and the patterned opaque conducting layer 114, and the area of the patterned transparent conducting layer 113 is larger than the area of the patterned opaque conducting layer 114. Consequently, the capacitance of the storage capacitor formed between the storage capacitor electrode 11 and the pixel electrode 19, and the aperture ratio can be both increased by increasing the area of the patterned transparent conducting layer 113, which is optically transmittable.

The thin film transistor substrate of the liquid crystal display panel of the present invention is not limited to the first preferred embodiment mentioned above, and may have other embodiments. In order to compare the difference between the embodiments more easily and to describe briefly, in the following second preferred embodiment, same components are denoted by same numerals. Please refer to FIGS. 7-10, FIGS. 7-10 are schematic diagrams illustrating a method of manufacturing a thin film transistor substrate of a liquid crystal display panel of the second preferred embodiment, wherein FIG. 7 is a cross-sectional view taken along line A-A′ in FIG. 8, and FIG. 9 is a cross-sectional view taken along line A-A′ in FIG. 10. In FIG. 8 and FIG. 10, two pixels are illustrated exemplarily, and one pixel P1 is marked with a dotted frame. As shown in FIG. 7 and FIG. 8, at least one gate electrode 14 is formed on the substrate 10. Next, a gate insulated layer 15, a patterned semiconductor layer 16, a source electrode 171, a drain electrode 172, a data line 173, and a second insulated layer 18 are formed sequentially on the gate electrode 14. Moreover, the first insulated layer 18 has at least one contact hole 181 exposing a part of the drain electrode 172. Thereafter, at least one storage capacitor electrode 11 is formed on the second insulated layer 18 by a method which is substantially the same as the method of the first preferred embodiment. The storage capacitor electrode 11 includes a patterned transparent conducting layer 113 and a patterned opaque conducting layer 114, and an area of the patterned transparent conducting layer 113 is larger than an area of the patterned opaque conducting layer 114.

Next, as shown in FIG. 9 and FIG. 10, a first insulated layer 13 is formed on the storage capacitor electrode 11, and a part of the first insulated layer 13 is removed such that the first insulated layer 13 and the second insulated layer 18 commonly have at least one contact hole 181 exposing a part of the drain electrode 172. Then, at least one pixel electrode 19 is formed on the second insulated layer 18 and on the first insulated layer 13, and the pixel electrode 19 is electrically connected to the drain electrode 172 via the contact hole 181. A part of the pixel electrode 19 overlaps a part of the storage capacitor electrode 11 to form a storage capacitor. By virtue of the aforementioned method, the thin film transistor substrate of the liquid crystal display panel of the second preferred embodiment of the present invention is completed. According to the manufacturing method of forming the thin film transistor substrate of the liquid crystal display panel of the second preferred embodiment, one mask is saved, and process steps are reduced. Also, the electrical difference caused by the misalignment between the patterned transparent conducting layer 113 and the patterned opaque conducting layer 114 is prevented. Moreover, the capacitance of the storage capacitor and the aperture ratio can be both increased by increasing the area of the patterned transparent conducting layer 113, which is optically transmittable.

In conclusion, the thin film transistor substrate of the liquid crystal display panel of the present invention accomplishes the storage capacitor electrode formed by the patterned transparent conducting layer and the patterned opaque conducting layer by using a gray-tone mask. In comparison with the method of forming the patterned transparent conducting layer and the opaque conducting layer by using the process with two masks, one mask is saved, and process steps are reduced. Also, since the patterned transparent conducting layer and the patterned opaque conducting layer are patterned by the same mask, the electrical difference caused by the misalignment between the patterned transparent conducting layer and the patterned opaque conducting layer is prevented. The storage capacitor electrode includes the patterned transparent conducting layer and the patterned opaque conducting layer, and the area of the patterned transparent conducting layer is larger than the area of the patterned opaque conducting layer. Consequently, the capacitance of the storage capacitor and the aperture ratio can be both increased by increasing the area of the patterned transparent conducting layer with high optical transmittance.

Those skilled in the art will readily observe that numerous modifications and alterations of the structure and method may be made while retaining the teachings of the invention.

Claims

1. A thin film transistor substrate of a liquid crystal display panel, comprising:

a substrate;

at least one storage capacitor electrode, disposed on the substrate, the storage capacitor electrode comprising a patterned transparent conducting layer and a patterned opaque conducting layer, wherein the patterned opaque conducting layer is disposed on the pattern transparent conducting layer, and an area of the patterned transparent conducting layer is larger than an area of the patterned opaque conducting layer;

a first insulated layer disposed on the storage capacitor electrode;

at least one gate electrode disposed on the substrate;

at least one gate insulated layer, a patterned semiconductor layer, a source electrode, a drain electrode, and a second insulated layer disposed sequentially on the gate electrode; and

at least one pixel electrode, disposed on the second insulated layer and on the first insulated layer, wherein a part of the pixel electrode overlaps a part of the storage capacitor electrode to form a storage capacitor.

2. The thin film transistor substrate of the liquid crystal display panel according to claim 1, wherein the gate electrode is disposed on the first insulated layer, the second insulated layer has at least one contact hole, and the pixel electrode is electrically connected to the drain electrode via the contact hole.

3. The thin film transistor substrate of the liquid crystal display panel according to claim 1, wherein the storage capacitor electrode is disposed on the second insulated layer, the first insulated layer and the second insulated have at least one contact hole, and the pixel electrode is electrically connected to the drain electrode via the contact hole.