In Array Having Structure For Use As Imager Or Display, Or With Transparent Electrode Patents (Class 257/72)
  • Patent number: 10388708
    Abstract: A display device includes a plurality of pixel electrodes; a bank having a plurality of openings respectively exposing a part of top surfaces of the plurality of pixel electrodes, a light emitting layer provided on the top surfaces of the plurality of pixel electrodes; and a common electrode covering the bank and the light emitting layer. Where an optical path of light emitted from any light emitting point in the light emitting layer and reflected by a corresponding pixel electrode, among the plurality of pixel electrodes, to return to the light emitting point is a first optical path, and an optical path of light emitted from the light emitting point and reflected by the corresponding pixel electrode to reach the bank is a second optical path, the second optical path has a length that is an integral multiple of a length of the first optical path.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: August 20, 2019
    Assignee: Japan Display Inc.
    Inventors: Shigeru Sakamoto, Hajime Akimoto
  • Patent number: 10388711
    Abstract: A display device includes two or more transistors in one pixel, and the two or more transistors include a first transistor of which a channel semiconductor layer is polycrystalline silicon, and a second transistor of which a channel semiconductor layer is an oxide semiconductor.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: August 20, 2019
    Assignee: Japan Display Inc.
    Inventor: Toshihiro Sato
  • Patent number: 10388905
    Abstract: A display device includes an auxiliary electrode in order to prevent uneven brightness by the voltage drop. The display device further includes an under-cut region formed by stacked insulating layers. In the display device, the under-cut region is completely filled by filler due to changing a shape of the auxiliary electrode, so that the quality of the displaying image is improved. Also, in the display device, the contact area between an upper electrode of a light-emitting structure and the auxiliary electrode is increased, so that the reliability and the degree of integration are improved.
    Type: Grant
    Filed: October 19, 2017
    Date of Patent: August 20, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Ho-Won Choi, Hye-Sook Kim
  • Patent number: 10381401
    Abstract: A multiple arrayed parallel nanowire device includes one or more arrays connected in series, wherein each array includes a plurality of narrow nanowires flanked by one or more wide nanowires, a top electrode, an applied current, a bottom ground electrode, and one or more lateral electrodes where one or more currents or one or more probing voltages can be applied to detect voltage changes in each array. The device detects single and multiple photons without destroying superconductivity in all the nanowires in the array and is thus capable of remaining sensitive to subsequent photon impacts. Moreover, the device can resolve the location of each photon impact.
    Type: Grant
    Filed: February 16, 2018
    Date of Patent: August 13, 2019
    Assignee: King Fahd University of Petroleum and Minerals
    Inventor: Khalil Harrabi
  • Patent number: 10380972
    Abstract: A display device is disclosed, which comprises: a substrate; a semiconductor layer disposed on the substrate; a second electrode layer disposed over the semiconductor layer and comprising first data lines extending along a second direction; and plural pixel regions disposed between two adjacent first data lines. Herein, one pixel region has a first section and a second section substantially parallel to the second direction, respectively. The first section overlaps with the semiconductor layer, but the second section does not overlap therewith. When light passes through the display device, a ratio of a first brightness integral value obtained by measuring the first section to a second brightness integral value obtained by measuring the second section is greater than 0.4 and smaller than 1.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: August 13, 2019
    Assignee: INNOLUX CORPORATION
    Inventors: Bo-Chin Tsuei, Hsia-Ching Chu, Ming-Chien Sun
  • Patent number: 10381385
    Abstract: An object of the present invention is to decrease substantial resistance of an electrode such as a transparent electrode or a wiring, and furthermore, to provide a display device for which is possible to apply same voltage to light-emitting elements. In the invention, a auxiliary wiring that is formed in one layer in which a conductive film of a semiconductor element such as an electrode, wiring, a signal line, a scanning line, or a power supply line is connected to an electrode typified by a second electrode, and a wiring. It is preferable that the auxiliary wiring is formed into a conductive film to include low resistive material, especially, formed to include lower resistive material than the resistance of an electrode and a wiring that is required to reduce the resistance.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: August 13, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Noriko Miyagi, Masayuki Sakakura, Tatsuya Arao, Ritsuko Nagao, Yoshifumi Tanada
  • Patent number: 10381380
    Abstract: The present invention provides a method of forming a semiconductor device. First, a substrate having a first insulating layer formed thereon is provided. After forming an oxide semiconductor layer on the first insulating layer, two source/drain regions are formed on the oxide semiconductor layer. A bottom oxide layer is formed to entirely cover the source/drain regions, following by forming a high-k dielectric layer on the bottom oxide layer. Next, a thermal process is performed on the high-k dielectric layer, and a plasma treatment is performed on the high-k dielectric layer in the presence of a gas containing an oxygen element.
    Type: Grant
    Filed: April 8, 2018
    Date of Patent: August 13, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Fu Hsu, Chun-Yuan Wu
  • Patent number: 10374026
    Abstract: A display device includes first, second, and third insulating layers sequentially disposed on a substrate, a scan line disposed on the first insulating layer, an auxiliary power source line disposed on the second insulating layer, a data line disposed on the third insulating layer, a power source line disposed on the third insulating layer, a pixel circuit unit that includes transistors connected to the scan line, the data line, and the power source line, a bridge pattern disposed on the third insulating layer, and a light emitting diode connected to the pixel circuit unit through the bridge pattern, wherein the bridge pattern and the auxiliary power source line overlap each other to form an additional capacitor with the third insulating layer interposed therebetween.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: August 6, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kwang Sae Lee, Myeong Hee Seo, Ki Myeong Eom, Jung Bae Bae
  • Patent number: 10367011
    Abstract: The present invention provides an array substrate, which comprises a display region and a peripheral wiring region, wherein in the peripheral wiring region, gate driving circuits and data driving lines are arranged respectively in correspondence with scanning lines and data lines in the display region and the gate driving circuits are electrically connected to different metal layers arranged in wire on array of the chip on film region to improve the electrostatic protection of the array substrate. Because the array substrate provided by the present invention comprises the wire on array arranged in different metal layers to extend the length of the wire on array and increase the impedance of the wire on array. Thereby the input current of gate driving circuit can be decreased and the probability of gate driving circuit damage can be reduced, the electrostatic protection of the array substrate can be improved.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: July 30, 2019
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventor: Yang Zhao
  • Patent number: 10366660
    Abstract: The present disclosure relates to a COA substrate including a glass substrate, a common electrode on the glass substrate, an insulation layer on the common electrode, a data line on the insulation layer, and the data line intersects with the common electrode. The COA substrate further includes a first passivation layer, a RGB color-filter layer, and a second passivation layer arranged on the data line in sequence. A disconnected gap is configured at an intersection of the common electrode and the data line such that the common electrode comprises two opposite ends. The insulation layer fills the gap, and the second passivation layer is configured with a conductive layer spanning over two ends of the common electrode. The present disclosure also relates to a liquid crystal panel including the above COA substrate.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: July 30, 2019
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventor: Shuai Chen
  • Patent number: 10359662
    Abstract: According to one embodiment, a display device comprises an insulating substrate, a pixel in a display area, a scanning line extending in a first direction, a signal line extending in a second direction, a shield line between the insulating substrate and the scanning line, a pixel electrode in the pixel, and a first switching element including a first semiconductor layer. The first semiconductor layer is provided between the scanning line and the shield line, and comprises an intersection area in which the first semiconductor layer intersects the scanning line. The shield line overlaps the intersection area, and is electrically connected to the scanning line through a contact portion.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: July 23, 2019
    Assignee: JAPAN DISPLAY INC.
    Inventor: Makoto Uchida
  • Patent number: 10359676
    Abstract: A display device including a substrate, a gate line, a data line, a plurality of thin film transistors, a first pixel electrode, and a second pixel electrode. The gate line is disposed on the substrate. The data line is disposed on the substrate. The data line includes a first branch line and a second branch line. The first branch line and the second branch line form a closed loop. The plurality of thin film transistors is connected to the data line. The first pixel electrode is connected to at least one of the plurality of thin film transistors. The second pixel electrode is connected to at least another one of the plurality of thin film transistors. The first pixel electrode and the second pixel electrode are arranged in a substantially diagonal direction with respect to each another. The first branch line is connected to a source electrode of said at least one of the plurality of thin film transistors.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: July 23, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hwanyoung Jang, Kyunghoe Lee, Seongyoung Lee, Byoungsun Na, Seonkyoon Mok, Hyungjun Park
  • Patent number: 10355232
    Abstract: Disclosed are an organic light emitting display device and a method of manufacturing the same, in which in a white organic light emitting device, an adverse influence of a leakage current leaked through an organic light emitting layer is minimized on an adjacent pixel. The organic light emitting display device includes a first electrode on a substrate, a bank covering a portion of the first electrode, a bank hole provided in the bank, an organic light emitting layer on the first electrode and the bank, and a second electrode on the organic light emitting layer.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: July 16, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: JoonYoung Heo, KyungHoon Lee, Jang Jo
  • Patent number: 10355026
    Abstract: A method for manufacturing a metal wire and an array substrate includes the steps of forming a metal layer, an insulating layer, and a photoresist on the substrate sequentially; exposing the photoresist to form a photoresist retention region and a photoresist non-retention region; developing the photoresist non-retention region; etching the insulating layer to expose a region of the metal layer to be etched; and etching the metal layer to remove portions not covered by the photoresist retention region to form a metal wire.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: July 16, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Xiang Liu
  • Patent number: 10345667
    Abstract: The present invention provides a display panel and display device. The display panel includes an array substrate and a color film substrate. The array substrate is provided with a plurality of data lines, a plurality of gate line sets arranged parallel to each other, and a plurality of first thin film transistors. Each set of the gate lines includes a first gate line and a second gate line. gate electrode of each of the first thin film transistors connected to the first gate line correspondingly, and source electrode of each of the first thin film transistors connected to the second gate line correspondingly, and drain electrode of each of the first thin film transistors connected to a first common electrode.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: July 9, 2019
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Wenying Li
  • Patent number: 10340328
    Abstract: A display device includes a first substrate arranged with a plurality of pixels on a first surface, the plurality of pixels having a display element including a transistor, and a first wiring connected to the transistor, a through electrode arranged in a first contact hole reaching the first wiring from a second surface facing the first surface of the first substrate, a second wiring connected with the through electrode, a first insulation film arranged covering the second wiring on the second surface of the first substrate, and a terminal connected with a second wiring via a second contact hole arranged in the first insulation film.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: July 2, 2019
    Assignee: Japan Display Inc.
    Inventors: Kazuto Tsuruoka, Norio Oku
  • Patent number: 10338438
    Abstract: The embodiments of the invention disclose an array substrate, a manufacturing method thereof and a display device. Due to the fact that the surfaces of a source electrode, a drain electrode and a data line which are arranged on the same layer are provided with an oxide film which is formed after annealing treatment is conducted on the source electrode, the drain electrode and the data line, in the process that the pattern of a pixel electrode is formed on the source electrode, the drain electrode and the data line by the adoption of a composition technology, the oxide film can protect the source electrode and the data line under the oxide film from being corroded by an etching agent when the pattern of the pixel electrode is formed by etching, and the display quality of a display panel will not be affected.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: July 2, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Seungjin Choi, Heecheol Kim, Youngsuk Song, Seongyeol Yoo
  • Patent number: 10338444
    Abstract: An array substrate and a manufacturing method thereof and a display device are disclosed. The array substrate includes a base substrate, and a color filter layer, a common electrode and a black matrix disposed on the base substrate, the black matrix is capable of conducting electricity, and the black matrix is electrically connected with the common electrode. The array substrate can reduce parasitic capacitance, and decrease power consumption.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: July 2, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Feng Zhang, Zhanfeng Cao, Qi Yao
  • Patent number: 10333107
    Abstract: An electroluminescent display device includes a substrate; a first electrode on the substrate; a hole auxiliary layer on the first electrode; a light emitting material layer on the hole auxiliary layer; an electron auxiliary layer on the light emitting material layer; a second electrode on the electron auxiliary layer; and insulation layers between the hole auxiliary layer and the light emitting material layer and between the electron auxiliary layer and the light emitting material layer, wherein a refractive index of the insulation layers is smaller than a refractive index of the light emitting material layer.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: June 25, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Hak-Min Lee, Hee-Jin Kim, Sung-Soo Park
  • Patent number: 10326025
    Abstract: To provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability and a manufacturing method of the semiconductor device with high mass productivity. The summary is that an inverted-staggered (bottom-gate) thin film transistor is included in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, a channel protective layer is provided in a region that overlaps a channel formation region of the semiconductor layer, and a buffer layer is provided between the semiconductor layer and source and drain electrodes. An ohmic contact is formed by intentionally providing the buffer layer having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrodes.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: June 18, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 10325943
    Abstract: The present application discloses a method of fabricating a thin film transistor, including forming a semiconductor layer having a pattern corresponding to that of the active layer on a base substrate; forming a first photoresist layer on a side of the semiconductor layer distal to the base substrate; the first photoresist layer being in an area corresponding to the channel region, the second doped region, and the fourth doped region; doping a region of the semiconductor layer corresponding to the first doped region and the third doped region using the first photoresist layer as a mask plate; forming a second photoresist layer by removing a portion of the first photoresist layer to expose an initial portion of the semiconductor layer corresponding to at least a portion of the second doped region and at least a portion of the fourth doped region; and doping the initial portion of the semiconductor layer using the second photoresist layer as a mask plate.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: June 18, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., Ordos Yuansheng Optoelectronics Co., Ltd.
    Inventors: Chaochao Sun, Chao Wang, Huafeng Liu, Shengwei Zhao, Bule Shun, Lei Yang, Chongliang Hu, Meng Yang, Jingping Lv, Lin Xie, Shimin Sun, Duolong Ding
  • Patent number: 10324348
    Abstract: The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to form the MIS storage capacitor by the P—Si semiconductor layer, the first metal layer and the insulating layer between above or the P—Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P—Si in the P—Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P—Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: June 18, 2019
    Assignee: Wuhan China Star Optoelectronics Technologies Co., Ltd
    Inventors: Yao Yan, Shangcao Cao
  • Patent number: 10325871
    Abstract: A display device comprises a control circuit board generating a first control signal; a driver chip package connected to the control circuit board and receiving the first control signal; and a display panel connected to the driver chip package interconnecting the control circuit board and the display panel. The display panel comprises pixels formed and signal lines connected to the pixels. The driver chip package comprises a wire film and a driver chip attached over the wire film. The driver chip is fixed to the display panel to transfer the second control signal to at least one of the plurality of signal lines. The wire film interconnects the driver chip and the control circuit board to transfer the first control signal from the control circuit board to the driver chip.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: June 18, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Hae-Kwan Seo
  • Patent number: 10324321
    Abstract: A display device includes a first substrate spaced from a second substrate, a gate line, a first data line, and a second data line on the first substrate, a first switch connected to the gate line and the first data line, a second switch connected to the gate line and the second data line, a first pixel electrode connected to the first switch, and a second pixel electrode connected to the second switch. The second pixel electrode is adjacent to the first pixel electrode. The first gate line extends in a first direction. A first light emission area positioned corresponding to the first pixel electrode and a second light emission area positioned corresponding to the second pixel electrode are adjacent to each other in the first direction. The second data line and the second switch are in the first light emission area.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: June 18, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seunghyun Park, Sungjin Kim, Junho Song
  • Patent number: 10325971
    Abstract: A display device includes a substrate, a semiconductor layer on the substrate, a gate insulating layer on the semiconductor layer and having one or more first openings, a gate electrode on the gate insulating layer, a first capacitor electrode on the gate insulating layer, a first interlayer insulating layer on the first capacitor electrode and having one or more second openings, a second capacitor electrode on the first interlayer insulating layer, a source electrode and a drain electrode connected with the semiconductor layer, and a light emitting diode connected with the drain electrode. The first capacitor electrode includes one or more protrusions in the first openings of the gate insulating layer and correspond to a shape of the first openings, and the second capacitor electrode includes one or more protrusions in the second openings of the first interlayer insulating layer and correspond to a shape of the second openings.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: June 18, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Cheol Yun Jeong, Hee June Kwak, Ju Ae Youn
  • Patent number: 10326100
    Abstract: To provide a method for manufacturing a lightweight light-emitting device having a light-emitting region on a curved surface. The light-emitting region is provided on a curved surface in such a manner that a light-emitting element is formed on a flexible substrate supported in a plate-like shape and the flexible substrate deforms or returns.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: June 18, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu Hirakata, Shunpei Yamazaki
  • Patent number: 10317756
    Abstract: A display substrate includes a base substrate, a gate metal pattern, a semiconductor layer, and a data metal pattern. The base substrate includes a display area and a peripheral area. The gate metal pattern includes a gate electrode of a transistor and includes a gate metal member disposed on the peripheral area. The transistor is disposed on the display area. The semiconductor layer includes a channel portion of the transistor and includes a semiconductor member disposed on the peripheral area. The data metal pattern includes a source electrode of the transistor and includes a data metal member disposed on the peripheral area, electrically connected to the gate metal member, and directly contacting the semiconductor member. A maximum thickness of the data metal member in a direction perpendicular to the base substrate is greater than a maximum thickness of the semiconductor member in the direction.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: June 11, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Joonggun Chong, Yonghwan Shin, Kwangho Lee
  • Patent number: 10319303
    Abstract: A plurality of pixel circuits included in a display device each includes: a drive transistor; a capacitor connected to a gate electrode and a source electrode of the drive transistor; a light-emitting element which is driven by the drive transistor; a write transistor having a gate electrode connected to a write control line for transmitting a write signal, one of a drain electrode and a source electrode connected to a data line for transmitting a data voltage corresponding to luminance, and the other of the drain electrode and the source electrode connected to the gate electrode of the drive transistor; and a compensation transistor having a gate electrode connected to the data line, and at least one of a drain electrode and a source electrode connected to the write control line, the compensation transistor being of same conductivity type as the write transistor.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: June 11, 2019
    Assignee: JOLED INC.
    Inventors: Masafumi Matsui, Hitoshi Tsuge, Kohei Ebisuno
  • Patent number: 10312305
    Abstract: An organic light-emitting display apparatus prevents the quality of an image being displayed thereon from being deteriorated as a result of contamination of an organic emission layer. The display apparatus includes a substrate with a display area and a periphery area. A first insulating layer, disposed over the substrate, has a first opening in the periphery area. A first electrode is disposed within the display area, over the first insulating layer. A first bank is disposed over the first insulating layer and has a second opening through which a center of the first electrode is exposed. A second bank is disposed over the first insulating layer and is separated from the first bank. The first opening is disposed between the first bank and the second bank. An intermediate layer is disposed over the first electrode. A second electrode is disposed over the intermediate layer and the first bank.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: June 4, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Deukjong Kim, Donghyun Lee, Sangki Kim
  • Patent number: 10312225
    Abstract: A display apparatus and a micro-light emitting diode are disclosed. The display apparatus includes: a first substrate including a light emitting diode part including a plurality of light emitting diodes regularly arranged on the first substrate. The display apparatus is implemented using micro-light emitting diodes formed of nitride semiconductors and thus can provide high efficiency and high resolution to be applicable to a wearable apparatus while reducing power consumption. The micro-light emitting diodes may include a wall element so as to be applied to a display substrate by force.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: June 4, 2019
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Motonobu Takeya, Young Hyun Kim
  • Patent number: 10305051
    Abstract: Provided are a flexible display device and a method of manufacturing the same. More particularly, the method of manufacturing the flexible display device according to the present invention includes a step of forming a first polyimide-based layer by coating a polyimide-based solution on a carrier substrate; a step of forming an oxide thin film transistor array on the first polyimide-based layer; a step of forming a second polyimide-based layer by coating a polyimide-based solution on the oxide thin film transistor array; a step of forming an organic light emitting diode on the second polyimide-based layer; and a step of removing the carrier substrate, wherein, in the step of forming the oxide thin film transistor array, the oxide thin film transistor array is disposed between the first polyimide-based layer and the second polyimide-based layer.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: May 28, 2019
    Assignee: UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
    Inventors: Jin Jang, Jae Gwang Um
  • Patent number: 10304862
    Abstract: A display device includes a display panel including a display area and a peripheral area, a plurality of data lines and a plurality of driving voltage lines provided in the display area, a plurality of data connection lines provided in the peripheral area and connected to the plurality of data lines, a first driving voltage transmission line provided in the peripheral area and overlapping the plurality of data connection lines, a second driving voltage transmission line provided in the peripheral area and disposed between the first driving voltage transmission line and the display area, and a plurality of driving voltage connection lines. The plurality of driving voltage connection lines are connected to the first driving voltage transmission line and the second driving voltage transmission line, and provided between the first driving voltage transmission line and the second driving voltage transmission line.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: May 28, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ji-Hyun Ka, Seung-Kyu Lee
  • Patent number: 10304868
    Abstract: To provide a circuit used for a shift register or the like. The basic configuration includes first to fourth transistors and four wirings. The power supply potential VDD is supplied to the first wiring and the power supply potential VSS is supplied to the second wiring. A binary digital signal is supplied to each of the third wiring and the fourth wiring. An H level of the digital signal is equal to the power supply potential VDD, and an L level of the digital signal is equal to the power supply potential VSS. There are four combinations of the potentials of the third wiring and the fourth wiring. Each of the first transistor to the fourth transistor can be turned off by any combination of the potentials. That is, since there is no transistor that is constantly on, deterioration of the characteristics of the transistors can be suppressed.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: May 28, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Umezaki
  • Patent number: 10297617
    Abstract: A display device includes a scan line extending primarily in a first direction, disposed on a substrate, and transmitting a scan signal, a data line extending primarily in a second direction intersecting the first direction and transmitting a data signal, a driving voltage line extending primarily in the second direction and transmitting a driving voltage, a plurality of transistors including first and second transistors, wherein the second transistor is connected to the scan line and the data line, and the first transistor is connected to the second transistor, a light emitting element connected to the plurality of transistors, and a storage capacitor disposed between the substrate and an active pattern of the first transistor, the storage capacitor including a first electrode disposed on the substrate and a second electrode at least partially overlapping the first electrode. A first insulating layer is disposed between the first and second electrodes.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: May 21, 2019
    Assignee: SAMUNG DISPLAY CO., LTD.
    Inventors: Yong Ho Yang, Hui Won Yang, Nak Cho Choi, Hwang Sup Shin, Jun Hee Lee
  • Patent number: 10288967
    Abstract: The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to form the MIS storage capacitor by the P—Si semiconductor layer, the first metal layer and the insulating layer between above or the P—Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P—Si in the P—Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P—Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: May 14, 2019
    Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd
    Inventors: Yao Yan, Shangcao Cao
  • Patent number: 10290686
    Abstract: An aspect of the present invention is directed to a display device including: an array substrate arranged with a plurality of pixels each having a light-emitting element are arranged; a first resin layer covering the plurality of pixels and having a first surface subjected to an alignment process; polarizers disposed over the first surface and aligned according to the alignment process; and a counter substrate disposed over the first resin layer.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: May 14, 2019
    Assignee: Japan Display Inc.
    Inventor: Daisuke Kato
  • Patent number: 10290690
    Abstract: Provided is an organic light emitting display panel with uniform luminance. A flattening layer including a contact hole is disposed on a substrate on which an auxiliary electrode is disposed. The contact hole in the flattening layer has an undercut pattern at a point contacting the auxiliary electrode. The organic light emitting layer is disconnected by the contact hole, but the common electrode is connected with the auxiliary electrode at an undercut pattern portion with a high step coverage as compared with the organic light emitting layer. Since the auxiliary electrode and the common electrode are connected with each other through the contact hole having the undercut pattern in the flattening layer, it is possible to preserve uniform luminance of the organic light emitting display panel.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: May 14, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Suhyeon Kim, Sungbin Shim
  • Patent number: 10290687
    Abstract: A lighting apparatus using an organic light emitting diode and a method of fabricating the same according to the present disclosure is configured such that a contact electrode is formed using laser ablation and printing after an organic light emitting material, a conductive layer for a cathode and a passivation layer are deposited on an entire surface of a substrate, and then encapsulated with a metal film. The present disclosure simplifies a fabricating process of the lighting apparatus by virtue of a non-use of an open mask (metal mask) as a sophisticated apparatus, and particularly, can be effectively applied to a roll-producing process. Also, the present disclosure can provide an effect of improving reliability by preventing moisture permeation in a manner of covering an exposed contact portion with a protection film such as a barrier tape.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: May 14, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Shinbok Lee, Taejoon Song, Namkook Kim, Soonsung Yoo, Hwankeon Lee
  • Patent number: 10288966
    Abstract: A thin film transistor array panel includes a first substrate, a gate line disposed on the first substrate and includes a lower layer including titanium, a middle layer including a transparent conductive material, and an upper layer including copper, a pixel electrode disposed on the first substrate and includes a lower layer including titanium, and an upper layer including the transparent conductive material, a gate insulating layer disposed on the gate line and the pixel electrode, a semiconductor layer disposed on the gate insulating layer, a data line and a drain electrode disposed on the semiconductor layer, a passivation layer which covers the data line and the drain electrode, and a common electrode disposed on the passivation layer.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: May 14, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: O Sung Seo, Tae Kyung Yim, Hyun-Ho Kang, Hyung June Kim
  • Patent number: 10289243
    Abstract: A manufacturing method of a touch control display device is disclosed. The method includes forming a thin film transistor element layer; forming and patterning a common electrode layer on the thin film transistor element layer to form common electrodes, forming a third insulation layer on the common electrode and the thin film transistor element layer, forming and patterning a conversion layer on the third insulation layer to form conversion lines, and forming on a first via hole that exposes at least a portion of a gate line, and forming a second via hole that exposes at least a portion of the common electrode. Further, first conversion lines are electrically connected to the gate lines via the first via hole, and second conversion lines are electrically connected to the common electrode via the second via hole.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: May 14, 2019
    Assignees: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD., TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Feng Lu, Xu Qian, Wenxin Jiang, Junchao Ma, Yong Wu
  • Patent number: 10288960
    Abstract: The present invention discloses an array substrate, and the array substrate comprises a substrate, a plurality of data lines and a plurality of scan lines; the substrate comprises a display region and a peripheral circuit region located at peripheral sides of the display region, and each data line comprises a data line outer section and a data line inner section, and each scan line comprises a scan line outer section and a scan line inner section; the peripheral circuit region further comprises a short connection line, an enable signal line, a plurality of first thin film transistors, a plurality of second thin film transistors, a plurality of first electrostatic discharge protection circuits, a plurality of second electrostatic discharge protection circuits, a plurality of third electrostatic discharge protection circuits and a plurality of fourth electrostatic discharge protection circuits.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: May 14, 2019
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventor: Xiangyang Xu
  • Patent number: 10283729
    Abstract: An OLED display element, its manufacturing method and a display device are provided. The OLED display element includes a light-emitting pixel unit. The light-emitting unit includes an anode arranged above a base substrate, a cathode arranged opposite to the anode, and a micro cavity formed between the anode and the cathode. The micro cavity includes an organic light-emitting layer, and the anode includes an ITO layer arranged opposite to the cathode and a metal oxide conductor layer arranged at a side of the ITO layer that is farther away from the cathode than the other side of the ITO layer.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: May 7, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yuting Zhang, Chunwei Wu, Jianwei Yu
  • Patent number: 10283593
    Abstract: Disclosed is a thin film transistor including a gate electrode on a substrate, a gate insulator over the entire surface of the substrate including the gate electrode, a first active layer corresponding to the gate electrode on the gate insulator, a second active layer on or under the first active layer, and a source electrode and a drain electrode spaced apart by a predetermined distance, the source electrode and the drain electrode being connected to the first active layer or the second active layer.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: May 7, 2019
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Jin Wook Moon, Yun Hoe Kim, Jae Ho Kim, Kyu Bum Lee, Jae Wan Lee
  • Patent number: 10281781
    Abstract: A display device includes a first substrate including a display area and a non-display area which is outside the display area; a first gate signal line and a second gate signal line each on the non-display area of the first substrate; a connection electrode which is on the non-display area of the first substrate and connects the first gate signal line and the second gate signal line to each other; and a static electricity prevention pattern which is on the non-display area of the first substrate and on the connection electrode.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: May 7, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Byung Gon Kum, Seong Gyu Kwon, Sang Il Kim, Tae Woo Lim, Sang Gil Lee
  • Patent number: 10283581
    Abstract: Provided is an organic light emitting display (OLED) device that includes, for example, a thin film transistor including an active layer, a gate electrode, a source electrode, and a drain electrode; a planarization layer on the thin film transistor; an anode on the planarization layer; an organic light emitting layer on the anode; a cathode on the organic light emitting layer; a first auxiliary line on the same layer and formed of the same material as the source electrode and the drain electrode; and a second auxiliary line on the same layer and formed of the same material as the anode, wherein the first auxiliary line and the second auxiliary line cross each other with the planarization layer interposed therebetween, and wherein the first auxiliary line is electrically connected with the cathode through the second auxiliary line.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: May 7, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Taehwan Kim
  • Patent number: 10276602
    Abstract: An array substrate according to an embodiment includes a substrate having a first side and a second side, multiple control lines, multiple data lines, a first region having multiply first interconnect pads, and a second region having multiply second interconnect pads. There is at least one of a distance between the first side and a center line of the first region being longer than a distance between the first side and a center line extending in the first direction of a region including the multiple control lines electrically connected to the multiple first interconnect pads, or a distance between the second side and a center line of the second region being longer than a distance between the second side and a center line extending in the second direction of a region including the multiple data lines electrically connected to the multiple second interconnect pads.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: April 30, 2019
    Assignee: Canon Electron Tubes & Devices Co., Ltd.
    Inventor: Yuichi Shimba
  • Patent number: 10276677
    Abstract: Semiconductor device structures and methods for forming the same are provided. A method for forming a semiconductor device structure includes forming a gate structure over a semiconductor substrate. The method also includes forming spacer elements adjoining sidewalls of the gate structure. The method further includes forming a protection material layer over the gate structure. The formation of the protection material layer includes a substantial non-plasma process. In addition, the method includes depositing a dielectric material layer over the protection material layer. The deposition of the dielectric material layer includes a plasma-involved process.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Wen Huang, Yun-Wen Chu, Hong-Hsien Ke, Chia-Hui Lin, Shin-Yeu Tsai, Shih-Chieh Chang
  • Patent number: 10274796
    Abstract: The present disclosure relates to a display having a narrow bezel structure. A flat panel display includes a substrate including a display area and a non-display area; a pull-up thin film transistor including a first gate electrode, a first source electrode and a first drain electrode, disposed in the non-display area; and a boosting capacitor disposed between the first gate electrode and the first source electrode; wherein the boosting capacitor includes a light shielding layer connected to the first gate electrode and overlapping with the first source electrode, but not overlapping with the first drain electrode.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: April 30, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Dosung Kim, Ryosuke Tani
  • Patent number: 10269834
    Abstract: A pixel structure for use in a display panel includes a switching element and a storage capacitor. The switching element has a drain electrode and a source electrode disposed on a high-k dielectric layer with k being equal to or higher than 8. The storage capacitor has a first capacitor electrode, a second capacitor electrode and a third capacitor electrode, wherein a passivation layer is disposed between the second an third capacitor electrodes and the high-k dielectric layer is also disposed between the first and second capacitor electrodes. The pixel structure also has a common line connected to the first capacitor electrode, a source line, and a gate line arranged such that the source line, the gate line and the common line may cross over each other over a low-k dielectric layer at a cross-over area where k is equal to or lower than 5.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: April 23, 2019
    Assignee: A.U. Vista, Inc.
    Inventors: Fang-Chen Luo, Willem Den Boer, Hsiang-Lin Lin
  • Patent number: 10268095
    Abstract: The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to from the MIS storage capacitor by the P-Si semiconductor layer, the first metal layer and the insulating layer between above or the P-Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P-Si in the P-Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P-Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: April 23, 2019
    Assignee: Wuhan China Star Optoelectronics Co., Ltd
    Inventors: Yao Yan, Shangcao Cao