Method For Planar Implementation Of PI/8 Gate In Chiral Topological Superconductors
Disclosed herein is a topologically protected π/8-gate which becomes universal when combined with the gates available through quasi-particle braiding and planar quasi-particle interferometry. A twisted interferometer, and a planar π/8-gate in CTS, implemented with the help of the twisted interferometer, are disclosed. Embodiments are described in the context of state X (CTS) supported by an ISH, although the concept of a twisted-interferometer is more general and has relevance to all anionic, i.e. quasiparticle systems.
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This application claims benefit under 35 U.S.C. §119(e) of provisional U.S. patent application No. 61/347,022, filed May 21, 2010, the disclosure of which is hereby incorporated herein by reference.
TECHNICAL FIELDThe subject matter disclosed and claimed herein relates generally to the field of quantum computing. Specifically, the subject matter disclosed and claimed herein relates to methods for planar implementation of the π/8 gate in chiral topological superconductors.
BACKGROUNDThe term chiral topological superconductor (CTS) may be used to describe any 2D-system based on a spin-orbit coupled semiconductor with superconductivity imported via proximity effect, as well as any other Ising-like system with the topological properties listed below. Examples include Sau et al. (arxiv:0907,2239), Alicea (arxiv:0912.2115), and Qi et al. (arxiv: 1003.5448), the disclosures of which are incorporated herein by reference. Such systems are topological superconductors and support localized Majorana states. These CTS are not purely topological, additionally supporting a classical order parameter φ. If the CTS is not planar, but configured as a surface of genus >0, a significant stiffness term ρ|∇φ|2 in the Lagrangian will prevent superposition of certain topological states. For this reason it is desirable to devise a protocol for executing a computationally universal set of gates in a strictly planar context.
Previously, the term Ising sandwich heterostructure (ISH) has been used for this concept. But, since it is hoped that an ISH may be built without an effective order parameter φ, the term CTS is used herein to emphasize the presence of the order parameter.
SUMMARYDisclosed herein is a topologically protected
which becomes universal when combined with the gates available through quasi-particle braiding and previously described planar quasi-particle interferometry:
Key features of the Ising topological structure underlying CTS quasi-particle excitation include:
Excitations I, σ, ψ (trivial, twist, fermion),
Nontrivial fusions σσ=1+ψ and ψψ=1,
S-matrix:
Twist-matrix:
and
To explicate the disclosed methods, the concept of quantum mechanical measurement may be connected to topology change in (2+1)-dimensional TQFTs. First, tensor contraction may be illustrated, in Penrose notation [P], with a 3-tensor, as shown in
A measurement operator O with possible outcome vectors v1, . . . , vn can be written as
where
becomes
Once the outcome of the measurement is observed, the system is in a tensor product state. Thus, measuring v (i.e., observing some vl) can be written as the right most alternative depicted in
The situation for a (2+1)-dimensional TQFT, as shown in
These calculations may now be illustrated. Case (2) is axiomatic: products correspond to identity morphisms. The identity operator “glues up” to become the vector
in the longitudinal basis. Now transforming by S to the meridial basis we obtain vm=S(vl)=(1, 0, 0)εVm and converting to an operator we should divide entries by Sl,i=di/D to obtain case (1). Finally, to compute case (3) note that if A=S−1T2S is the modular transformation sending (1) to (3), then in this twisted basis (t), v becomes
which converts to case (3).
We record also the vector and operator associated with a case (3′), the same boundary data as case (3) but with the solid torus containing a ψ-charge Wilson loop running along its core. In case (3′)
and the corresponding operator is
It is known that the operation of an interferometer within an Ising system using σ probe particles projects the topological charge state of the interferometry loop to a charge sector 1, σ, or ψ, along the interferometry loop γ up to an error exponentially small in the number of probes.
The TQFT analog to partial trace is to glue a 2-handle of space-time topological fluid along the measured loop γ. As shown in
A CTS is any semiconductor/superconducting system resulting in a “generic (no special symmetries) 2D topological superconducting film with a single sheeted Dirac-like Fermi surface.” Our terminology sometimes identifies such a state (called X) with the ISH which houses it, as in our co-pending U.S. patent application Ser. Nos. 12/979,778 and 12/979,856, the disclosures of which are incorporated herein by reference. As disclosed herein, three tunneling amplitudes, t1, t2, and t3 may be sharply regulated (essentially turned “on” and “off”) on a gigahertz time scale. This may be done either with 1) high speed electronic and/or magnetic top gates, 2) optically using laser pulses to disturb the ground state of X near a tunneling junction, effectively reducing the bulk gap Δ in this region and increasing the amplitude to tunnel (note that t≈e−const√{square root over (MΔL)}, where M is an effective mass, Δ the bulk gap, and L is the length of the summary tunneling junction,) or 3) any other electronic, optical, or magnetic intervention.
For reference and contrast,
Note that, as used herein, “vacuum” is either an absence of the X-state fluid or a transformed fluid without non-Abelian properties. The “vacuum” is created by electronic and/or magnetic top gating. In
A voltage bias may be maintained between the source S and the drains D and D′. While the tunneling junctions 1, 2, and 3 are open, all current flows into D′. At time t=0, t1 is made substantial for a brief time≈t0/10 (order 10−10−10−9 seconds), allowing a wave packet of σ-particles with support small with respect to L1 to transit to the island with amplitude t1 while, with amplitude √{square root over (1−t12)}, the wave packet continues along the left edge. Knowing the geometry and the velocity of the edge mode, t2 is briefly—again for a time≈t0/10—increased from zero precisely as this latter wave packet arrives at the second tunneling junction so that the packet is transmitted with amplitude t2. Finally, the first wave packet branch arrives, after 2.5 trips around the island, precisely when the second wave packet branch also arrives at the third tunneling junction.
At this moment, t3 is briefly made substantial (>0), and the two branches interfere. The nature of this interference, constructive or destructive, is detected at the drain D. The condition L2/L1≈5 allows the two branches to arrive synchronously. In order to maintain superposition of trivial topological charge and a topological charge along the edge of the vacuum island, during the running of the twisted interferometer, a magnetic flux should be threaded through the vacuum island which is tuned to equalize the energies of these two states. This tuning does not need to be exponentially precise; its purpose is not precision of a computational state but rather maintenance of superposition during the 2.5 laps around the interferometer. Error in this tuning may reduce the twisted interferometer's visibility algebraically.
Up to errors exponentially small in the number of Ising σ-particles admitted to the island, the twisted interferometer acts on the topological charge enclosed within the interferometry loop by either
in the longitudinal {|1,|ψ} basis according to whether |1 or |ψ is observed, where ω=e″πi/4.
In the untwisted (Beenakker) context, the measurement is in the basis of topological charge {|1, |ψ} enclosed in the untwisted interferometry loop l (
or less formally,
is observed and
is observed. One might expect in the twisted context to affect conjugates of P1, P2—accounting for a change of basis from an untwisted to a twisted interferometry loop. However, it is immediate that if no charge lines enter or leave the twisted interferometer (and we always assume there are no mobile charges) that Ot=Otwisted must be diagonal in the basis {|1,|ψ} of topological charge.
As described above, making a charge measurement with trivial outcome is equivalent to topologically Dehn filling the twisted interferometry loop γ with a solid torus S1×D2 of pure topological ground state medium; whereas outcome |ψ is equivalent to Dehn filling along γ a solid torus with a ψ-charge loop (Wilson line loop) along the core circle S1×0⊂S1×D2.
In terms of operators in twisted annular {1,ψ} basis, we have:
if |1 is measured, and
if |ψ is measured.
In
Twisted interferometry employs a single burst of n co-propagating probe particles (σ's in the Ising theory (CTS)) which form a wave packet. A reasonable estimate for n to be large enough both to converge the interferometer and to tunnel onto the vacuum island in 10−10 seconds is 10≦n≦100. The σ probes follow trajectories mutually twisting −4π and linking each other (linking number=−2) as they make two (clockwise) circuits around the vacuum island. Measurement of current into the drain D can be compared with standard interferometric calculation to yield a topological charge of either |1 or |ψ along the (−2, 1) interferometric loop.
Ball park estimates for ISH Majorana edge mode velocities are 104 m/s. If L1=5 μm and the wave packet is to have most of its amplitude supported along a 1 μm length with exponentially decaying tails, then the tunneling junction should be open for 10−10s. For reasonable tunneling currents, this would permit between 10 and 100 σ's to tunnel, adequate to effectively converge the interferometer.
The fourth event is a fusion of the σ-charged dots of the original qubit. The fifth and final event is charge measurement along α. The charge α at the top can be measured to be 1 or ψ by ordinary (previously described) Beenakker quasi-particle interferometry. Twisted interferometry is used to measure the charge around γ (≡l′ in earlier notation) with the twists recorded by the two kinks in γ corresponding to the two loops around the island of vacuum in
In all four cases, available transformations (as described above), listed in the right-most column above, convert the gate executed in
Freedman, Nayak, and Walker (arxiv: 0512.072 and 0512.066) and our U.S. patent application Ser. Nos. 12/979,778 and 12/979,856, show that the π/8-gate may be obtained by cutting along β in
Since the original qubit has σ charges on its internal punctures, there will be a σ-charge on β, but compared to the original qubit at time t=0, the relative phase between the two fusion channels 1 and ψ is now changed by e2πi/8. The loop β′ in
A (−1) Dehn twist on the loop γ′ throws β′ to the meridian μ. Thus Dehn filling on a bulk parallel to γ′, with a (−1) additional twist in its framing compared to the normal framing γ′ inherits from the boundary of the bulk, effectively endows the bulk with a new product structure in which β is connected by a cylinder to μ. γ, as drawn in
It remains to compute the effect of twisted interferometry if the outcome is |ψ. |σ is not a possible outcome as the charge along γ=l′=(1, 2) is obtained from the charge along l by applying the matrix A. A does not mix the |σ and the {|1,|ψ} sectors and the charge along l=α|1+β|ψ.) The effect of outcome |ψ is a Wilson loop of charge |ψ parallel to γ′ (in the bulk) with no additional twist in its framing.
Using the calculational tools of modular tensor categories (MTC),
which, up to an overall phase, is the square of a braid generator.
Example Computing EnvironmentNumerous other general purpose or special purpose computing system environments or configurations may be used. Examples of well known computing systems, environments, and/or configurations that may be suitable for use include, but are not limited to, personal computers, server computers, hand-held or laptop devices, multiprocessor systems, microprocessor-based systems, set top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, embedded systems, distributed computing environments that include any of the above systems or devices, and the like.
Computer-executable instructions, such as program modules, being executed by a computer may be used. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. Distributed computing environments may be used where tasks are performed by remote processing devices that are linked through a communications network or other data transmission medium. In a distributed computing environment, program modules and other data may be located in both local and remote computer storage media including memory storage devices.
With reference to
Computer 110 typically includes a variety of computer readable media. Computer readable media can be any available media that can be accessed by computer 110 and includes both volatile and nonvolatile media, removable and non-removable media. By way of example, and not limitation, computer readable media may comprise computer storage media and communication media. Computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CDROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by computer 110. Communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media. The term “modulated data signal” means a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. By way of example, and not limitation, communication media includes wired media such as a wired network or direct-wired connection, and wireless media such as acoustic, RF, infrared and other wireless media. Combinations of any of the above should also be included within the scope of computer readable media.
The system memory 130 includes computer storage media in the form of volatile and/or nonvolatile memory such as read only memory (ROM) 131 and random access memory (RAM) 132. A basic input/output system 133 (BIOS), containing the basic routines that help to transfer information between elements within computer 110, such as during start-up, is typically stored in ROM 131. RAM 132 typically contains data and/or program modules that are immediately accessible to and/or presently being operated on by processing unit 120. By way of example, and not limitation,
The computer 110 may also include other removable/non-removable, volatile/nonvolatile computer storage media. By way of example only,
The drives and their associated computer storage media discussed above and illustrated in
The computer 110 may operate in a networked environment using logical connections to one or more remote computers, such as a remote computer 180. The remote computer 180 may be a personal computer, a server, a router, a network PC, a peer device or other common network node, and typically includes many or all of the elements described above relative to the computer 110, although only a memory storage device 181 has been illustrated in
When used in a LAN networking environment, the computer 110 is connected to the LAN 171 through a network interface or adapter 170. When used in a WAN networking environment, the computer 110 typically includes a modem 172 or other means for establishing communications over the WAN 173, such as the Internet. The modem 172, which may be internal or external, may be connected to the system bus 121 via the user input interface 160, or other appropriate mechanism. In a networked environment, program modules depicted relative to the computer 110, or portions thereof, may be stored in the remote memory storage device. By way of example, and not limitation,
Claims
1. A twisted interferometer, comprising:
- a source, a first drain, and a second drain;
- a first tunneling path between a first vacuum and a second vacuum;
- a second tunneling path between the first vacuum and a third vacuum; and
- a third tunneling path between the second vacuum and the third vacuum,
- wherein a voltage bias is maintained between the source and the drains such that a current flows around edges of the vacuums.
2. The interferometer of claim 1, wherein each of the vacuums is an absence of X-state fluid or a transformed fluid without non-Abelian properties, and the vacuum is created by electronic or magnetic top gating.
3. The interferometer of claim 1, wherein a first distance through the first and third tunneling paths between a first point on an edge of the first vacuum and a third point on an edge of the third vacuum is approximately ⅕ of a second distance through the second tunneling path between the first point and the third point.
4. The interferometer of claim 3, wherein the first distance is measured around an edge of the second vacuum, and the second distance is measured around an edge of the first vacuum and an edge of the third vacuum.
5. The interferometer of claim 1, wherein tunneling is allowed at each of the tunneling paths for an interval of time that is proportional to the time for a wave packet to propagate once around the second vacuum at group velocity.
6. The interferometer of claim 1, wherein, while the first, second, and third tunneling junctions are open, all current flows into the first drain.
7. The interferometer of claim 1, wherein a wave packet of α-particles with support small with respect to the first distance is allowed to transit to the second vacuum with a first amplitude.
8. The interferometer of claim 7, wherein the wave packet is allowed to transit the first vacuum with a second amplitude that is smaller than the first amplitude.
9. The interferometer of claim 8, wherein a second wave packet arrives at the second tunneling junction such that the packet is transmitted with a third amplitude.
10. The interferometer of claim 9, wherein the first wave packet arrives at the third tunneling junction precisely when the second wave packet also arrives at the third tunneling junction.
11. The interferometer of claim 10, wherein the first wave packet arrives at the third tunneling junction after 2.5 trips around the second vacuum.
12. The interferometer of claim 11, wherein the third tunneling path is briefly made substantial such that the two wave packets interfere.
13. The interferometer of claim 12, wherein the nature of the interference is detected at the second drain.
14. A planar π/8-gate in a chiral topological superconductor, comprising a low mobility electronic structure comprising a spin-orbit coupled semiconductor, an ordinary superconductor, a ferro-magnetic insulator or a fern-magnetic insulator.
15. The gate of claim 14, wherein the electronic structure is capable of supporting universal topological, fault tolerant quantum computation.
16. A topologically protected method for implementing a π/8-gate in a chiral-topological-superconductor (CTS), Ising-sandwich-heterostructure (ISH) device, the method comprising:
- implementing universal quantum computation in a topologically protected, fault-tolerant manner within the CTS-ISH device.
17. The method of claim 16, wherein the CTS-ISH device comprises a low mobility electronic structure that is capable of supporting universal topological, fault tolerant quantum computation.
18. The method of claim 17, wherein the low mobility electronic structure comprises a spin-orbit coupled semiconductor.
19. The method of claim 17, wherein the low mobility electronic structure comprises an ordinary superconductor.
20. The method of claim 17, wherein the low mobility electronic structure comprises a ferro- or fern-magnetic insulator.
Type: Application
Filed: May 19, 2011
Publication Date: Feb 2, 2012
Applicant: Microsoft Corporation (Redmond, WA)
Inventors: Parsa Bonderson (Santa Barbara, CA), Michael Freedman (Santa Barbara, CA), Chetan Nayak (Santa Barbara, CA), Kevin Walker (Santa Barbara, CA), Lukasz Fidkowski (Santa Barbara, CA)
Application Number: 13/111,828
International Classification: H01L 39/02 (20060101); G01B 9/02 (20060101);