CIRCUIT SUBSTRATE
A circuit substrate having a base layer, a patterned conductive layer, a dielectric layer and a conductive block is provided. The patterned conductive layer is disposed on the base layer and having an inner pad. The dielectric layer is disposed on the base layer and covering the patterned conductive layer. The conductive block penetrates the dielectric layer, the conductive block being substantially coplanar with the dielectric layer and connecting the inner pad.
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This application is a Divisional of and claims the priority benefit of U.S. patent application Ser. No. 12/835,085, filed on Jul. 13, 2010, now pending, which claims the priority benefit of U.S. provisional application Ser. No. 61/315,408, filed on Mar. 19, 2010, and also claims the priority benefits of Taiwan application serial no. 99116309, filed on May 21, 2010 and Taiwan application serial no. 98137833, filed on Nov. 6, 2009. The entirety of each of the above-mentioned patent applications is hereby incorporated by reference herein and made a part of this specification.
BACKGROUND OF THE INVENTION1. Field of the Invention
The present invention relates to a circuit substrate and fabricating method thereof. More particularly, the present invention relates to a circuit substrate with a pad and a conductive block formed in one piece with each other and the fabricating method thereof.
2. Description of Related Art
In current semiconductor package technology, a circuit substrate is one of the most frequently used components. A conventional circuit substrate is mainly composed of a plurality of patterned conductive layers and a plurality of dielectric layers alternately stacked to one another. In addition, the patterned conductive layers are electrically connected through a plurality of conductive vias. As the integration of traces in the circuit substrate increases, how to utilize the limited space of circuit substrate effectively in circuit layout has become an important subject.
SUMMARY OF THE INVENTIONThe present invention further provides a circuit substrate including a base layer, a patterned conductive layer, a dielectric layer and a conductive block. The patterned conductive layer having an inner pad is disposed on the base layer. The dielectric layer is disposed on the base layer and the dielectric layer covers the patterned conductive layer. The conductive block penetrates the dielectric layer, and the conductive block is substantially coplanar with the dielectric layer and connected the inner pad.
The present invention provides a method comprising following steps for fabricating a circuit substrate. A base layer, a patterned conductive layer, a dielectric layer and a covering layer are provided, wherein the patterned conductive layer having an inner pad is disposed on the base layer, the dielectric layer is disposed on the base layer and covers the patterned conductive layer, and the covering layer is disposed on the dielectric layer. A part of the covering layer is removed by dry etching to form a first opening. A part of the dielectric layer exposed by the first opening is removed to form a dielectric opening exposing a part of the inner pad. A patterned mask having a second opening to expose a part of the inner pad is formed on the covering layer. A conductive structure including a conductive block filling the dielectric opening, an outer pad filling the first opening and a surplus layer filling the second layer is provided, wherein the conductive block, the outer pad and the surplus layer are formed in one piece together. Then, the patterned mask, the surplus layer and the covering layer are removed.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanying figures are described in detail below.
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
In the present embodiment, the dielectric layer 130 can be made of resin, and the dielectric layer 130 and the covering layer 150 thereon are laminated with the base layer 110 and the patterned conductive layer 120, such that the dielectric layer 130 is located between the base layer 110 and the covering layer 150 and covers the patterned conductive layer 120. In other words, in the present embodiment, a double layered structure comprising the dielectric layer 130 and the covering layer 150 is provided and laminated with the base layer 110 and the patterned conductive layer 120 thereon. For the fabrication process of the present invention, the double layered structure including the dielectric layer 130 and the covering layer 150 facilitates simplifying the fabricating process. In another embodiment, the dielectric layer 130 and the covering layer 150 can be formed on the base layer 110 in sequence to cover the patterned conductive layer 120.
Referring to
Then, referring to
In the present embodiment, if the material of the covering layer 150 is nonmetal, the part of the dielectric layer 130 exposed by the first opening 152 can be removed by dry etching. The dry etching used for removing a portion of the dielectric layer 130 is, for example, laser ablation or plasma etching.
Referring to
Referring to FIG. ID, a patterned mask 160 having a second opening 162 to expose the first opening 152, the dielectric opening 132 and a part of the inner pad 122 is formed on a part of the conductive seed layer 140a located on the covering layer 150.
Next, referring to
Then, referring to
Referring to
Referring to
Referring to
In summary, the present invention forms an opening in the covering layer by dry etching so as to reduce the processing time and facilitate the formation of the outer pad. In addition, the thickness of the outer pad can be precisely controlled through the covering layer. The conductive block and the outer pad are formed in one piece, such that misalignment between the outer pad and the conductive block during plural patterning steps of the conventional process can be prevented. Furthermore, the conductive block embedded in the dielectric layer can replace the outer pad to serve as an electrode of the circuit substrate.
Although the invention has been described with reference to the above embodiments, it will be apparent to one of the ordinary skill in the art that modifications to the described embodiment may be made without departing from the spirit of the invention. Accordingly, the scope of the invention will be defined by the attached claims not by the above detailed descriptions.
Claims
1. A circuit substrate, comprising:
- a base layer;
- a patterned conductive layer disposed on the base layer and having an inner pad;
- a dielectric layer disposed on the base layer and covering the patterned conductive layer; and
- a conductive block penetrating the dielectric layer, the conductive block being substantially coplanar with the dielectric layer and connecting the inner pad.
2. The circuit substrate as claimed in claim 1, further comprising:
- a surface passivation layer disposed on the conductive block.
3. The circuit substrate as claimed in claim 1, wherein an outer diameter of the inner pad is greater than an outer diameter of the conductive block such that the inner pad and the conductive block together form a structure having a cross-section in an inverted-T-shape profile.
4. The circuit substrate as claimed in claim 1, wherein an outer diameter of the inner pad is smaller than an outer diameter of the conductive block such that the conductive block encompasses the inner pad.
5. The circuit substrate as claimed in claim 1, wherein the patterned conductive layer further has an inner trace, and an end portion of the inner trace forms the inner pad.
Type: Application
Filed: Oct 4, 2012
Publication Date: Jan 31, 2013
Applicant: VIA TECHNOLOGIES, INC. (New Taipei City)
Inventor: VIA Technologies, Inc. (New Taipei City)
Application Number: 13/644,667