Abstract: A manufacturing method of an electronic package includes the following steps. A first interfacial dielectric layer is formed to cover sides of multiple first conductive vias and multiple second conductive vias. Multiple chips are directly bonded to the first and second conductive vias. A base dielectric layer is formed to fill a gap between the adjacent chips. A bridge element is directly bonded to the first conductive vias, such that the bridge element partially overlaps the adjacent chips respectively. A second interfacial dielectric layer and multiple third conductive vias are formed on the first interfacial dielectric layer and the bridge element. A redistribution circuit structure is formed on the second interfacial dielectric layer and the third conductive vias. Multiple conductive bumps are formed on the redistribution circuit structure. An electronic package is also provided.

Abstract: An object detection device and a confidence threshold method adjustment method are provided. The object detection device includes an optical camera, multiple sensors, and a processor. The optical camera and sensors are used to respectively capture a real-time video and environmental value of a detection area. The processor performs an object recognition model and at least one second recognition model. The object recognition model determines whether an object exists in the detection area based on the real-time video to generate a first recognition result and a corresponding first confidence value. The at least one second recognition model generates a second result based on the environmental value respectively. The processor dynamically adjusts a confidence threshold value based on a value of the second result and a correlation degree between the object and the second result.

Abstract: An electronic assembly includes a circuit board having a mounting surface and outer pads located on the mounting surface and staggered. The outer pads include pairs of differential signal pads arranged adjacent to each other including a first pair of differential signal pads and a second pair of differential signal pads. The first pair of differential signal pads and the second pair of differential signal pads are symmetrically arranged with respect to a symmetry line. A center extension line passing through the first pair of differential signal pads and a center extension line passing through the second pair of differential signal pads intersect at an intersection point on the symmetry line. The center extension line passing through the first pair of differential signal pads or the center extension line passing through the second pair of differential signal pads and the symmetry line are not perpendicular to each other.

Abstract: A dash cam includes a dash cam body, a plastic enclosure, an antenna module, and a connecting bracket. The dash cam body has a camera. The plastic enclosure has an adhesive surface and is suited for being pasted onto an inner side of a vehicle windshield through the adhesive surface. The antenna module is disposed inside the plastic enclosure and is electrically connected to the dash cam body. The connecting bracket is connected between the plastic enclosure and the dash cam body.

Abstract: A gas leak detection device and a detecting method are provided. The gas leak detection device includes a remote temperature sensor and a processor. The remote temperature sensors detect an area-to-be-monitored to obtain a plurality of thermal images. Each pixel position in the thermal images includes a corresponding temperature value. The processor obtains the thermal images from the remote temperature sensor, calculates a detected temperature value of each environmental block according to each of a plurality of environmental blocks in the thermal images, calculates a temperature judgment threshold based on the detected temperature value of each environmental block in a detection time period, determines whether a temperature of at least one region-of-interest is abnormal based on the temperature judgment threshold, and performs a warning operation when the temperature of the at least one region-of-interest is abnormal.

Abstract: A contact arrangement includes a plurality of contact groups. At least one of the contact groups includes a plurality of shared contacts, a plurality of dedicated contacts, and a plurality of ground contacts. The shared contacts in a first mode or a second mode transmit signals corresponding to the first mode or the second mode. The dedicated contacts transmit the signals corresponding to the first mode and do not transmit the signals corresponding to the second mode. The ground contacts surround the shared contacts and the dedicated contacts.

Abstract: A manufacturing method of an electronic package includes the following steps. Multiple chips and a base dielectric layer are provided. A back surface of each chip is fixed to a back surface temporary carrier via a back surface temporary bonding layer. A base dielectric layer surrounds each chip and covers the back surface temporary bonding layer. A material of the base dielectric layer includes a silicate composite material. At least one bridge element is installed on the adjacent chips. An intermediate dielectric layer covering the base dielectric layer, the chips, and the bridge element is formed. Multiple intermediate conductive vias and a redistribution structure are respectively formed on the chips and the intermediate dielectric layer. Multiple conductive bumps are formed on the redistribution structure. The back surface temporary bonding layer and the back surface temporary carrier are removed. An electronic package produced by the manufacturing method is also provided.

Abstract: A manufacturing method of an electronic package includes the following steps. Multiple chips are temporarily fixed to a temporary carrier. At least one bridge element is installed on the adjacent chips. A base dielectric layer covering a temporary bonding layer, the chips, and the bridge element is formed. A material of the base dielectric layer includes a silicate composite material. Multiple base conductive vias and a redistribution structure are respectively formed on the chips and the base dielectric layer. Multiple conductive bumps are formed on the redistribution structure. In addition, an electronic package is also provided, which may be produced by the manufacturing method.

Abstract: The present disclosure provides an electronic apparatus and an object detection method. The electronic apparatus includes a storage device and a processor. The storage device stores an estimation module. The processor is coupled to the storage device and configured to execute the estimation module. The processor acquires a sensed image provided by an image sensor, and inputs the sensed image to the estimation module so that the estimation module outputs a plurality of estimated parameters. The processor calculates two-dimensional image center coordinates of an object image in the sensed image based on the plurality of estimated parameters, and calculates three-dimensional center coordinates corresponding to the object image based on the two-dimensional image center coordinates and an offset parameter in the plurality of estimated parameters. Thus, the location of the object image in the sensed image can be determined accurately.

Abstract: An encoding method for a key Trie includes generating a plurality of meta data by applying encoding to a portion of non-leaf nodes of the key Trie, and storing an encoding result of the key Trie into a storage device, wherein the encoding result includes the plurality of meta data corresponding to the portion of non-leaf nodes, respectively.

Abstract: A universal serial bus (USB) control device and a control method thereof are provided. The USB control device includes multiple host interfaces, multiple USB ports, a bus physical layer circuit, a microprocessor, and a bus schedule controller. The bus schedule controller controls the bus physical layer circuit according to a USB task. The microprocessor obtains a USB task command through the host interface, which includes a USB port number of a specific host interface. The microprocessor queries the USB port number of the specific host interface based on an index lookup table to correspond to a specific USB port, generates the USB task according to the specific USB port, and transmits the USB task to the bus schedule controller. The index lookup table is configured to record a relationship between a part of the USB port that each host interface is responsible for and the USB port number.

Abstract: The present disclosure provides an object tracking method and an object tracking device. The method includes: acquiring a human-face region of an image frame so as to determine a human-body region; extracting a human-body feature from the human-body region, and determining whether a plurality of historical object trajectories match the human-body feature; in response to that one of the plurality of historical object trajectories matches the human-body feature, updating an age of the human-body feature to a preset value; and in response to that none of the plurality of historical object trajectories matches the human-body feature, adding an object trajectory corresponding to the human-body feature to the plurality of historical object trajectories. Thus, a better tracking effect may be achieved.

Abstract: A computing apparatus includes at least one general purpose processor, at least one coprocessor, and at least one application specific processor. The at least one general purpose processor is arranged to run an application, wherein data processing of at least a portion of a data processing task is offloaded from the application running on the at least one general purpose processor. The at least one coprocessor is arranged to deal with a control flow of the data processing without intervention of the application running on the at least one general purpose processor. The at least one application specific processor is arranged to deal with a data flow of the data processing without intervention of the application running on the at least one general purpose processor.

Abstract: A circuit board has a surface and a contact arrangement on the surface. The contact arrangement includes contacts. The contacts are staggered. The contacts include multiple first ground contacts, multiple first signal contacts and multiple second signal contacts. The ground contacts are arranged along a first straight line. The first signal contacts are arranged on one side of the first straight line, and the two adjacent first signal contacts are grouped into a first signal contact pair. The second signal contacts are arranged on the other side of the first straight line, and the two adjacent second signal contacts are grouped into a second signal contact pair, and the transmission direction of the first signal contact pair is different from the transmission direction of the second signal contact pair.

Abstract: A universal serial bus (USB) control device and a control method thereof are provided. The USB control device includes multiple host interfaces, multiple USB ports, a bus physical layer circuit, a microprocessor, and a bus schedule controller. The bus schedule controller controls the bus physical layer circuit according to a USB task. The microprocessor obtains a USB task command through the host interface, which includes a USB port number of a specific host interface. The microprocessor queries the USB port number of the specific host interface based on an index lookup table to correspond to a specific USB port, generates the USB task according to the specific USB port, and transmits the USB task to the bus schedule controller. The index lookup table is configured to record a relationship between a part of the USB port that each host interface is responsible for and the USB port number.

Abstract: A data storage system and a global deduplication method thereof are provided. The data storage system includes multiple storage devices and one dispatch device. The dispatch device divides an original data corresponding to a data writing request into at least one data chunk. The dispatch device performs a summary calculation on one data chunk, so as to generate a representative value. The dispatch device performs a first distribution calculation on the representative value, so as to determine a destination location corresponding to the representative value. The dispatch device transmits the data chunk and the representative value to at least one destination storage device among the storage devices through a communication network according to the destination location. The at least one destination storage device checks the representative value, so as to determine whether to store the data chunk in a storage space of the at least one destination storage device.

Abstract: An authorization method and an authorization system are provided. The authorization method includes displaying, by a service device, authorization information on an e-paper arranged on the service device; obtaining, by a user device, the authorization information from the e-paper; and using, by the user device, the authorization information displayed on the e-paper to perform an authorization operation between the user device and the service device.

Abstract: A computing apparatus includes a first processing circuit and a second processing circuit. The first processing circuit includes a programmable logic circuit. The second processing circuit includes a general purpose processor that is used to execute an application program to download a bitstream to the first processing circuit for programming the programmable logic circuit to implement a direct memory access (DMA) engine and at least one physical engine (PE). The DMA engine is used to access a first memory through a DMA manner. The at least one PE is used to read data to be processed from the first memory through the DMA engine. The first processing circuit and the second processing circuit are disposed in one chip.

Abstract: A package substrate has a substrate surface and a chip region on the substrate surface. The package substrate includes circuit layers, conductive vias, and byte region rows. The circuit layers are sequentially spaced below the substrate surface. Each conductive via is connected to at least two of the circuit layers. The byte region rows are arranged side by side sequentially from an edge of the chip region to a center of the chip region, and each byte region row includes byte regions arranged in a row. Each byte region includes pads located on the circuit layer closest to the substrate surface. The pads of the byte regions of the byte region row closer to the edge of the chip region extend from the chip region to an outside of the chip region through traces of the circuit layer closer to the substrate surface.

Abstract: A bridge circuit includes an NVMe device controller, a network subsystem, and a data transfer circuit. The NVMe device controller is arranged to communicate with a host via a PCIe bus. The network subsystem is arranged to communicate with an NVMe-TCP device via a network. The data transfer circuit is coupled between the NVMe device controller and the network subsystem, and is arranged to deal with data transfer associated with the NVMe-TCP device without intervention of the host.