MANUFACTURE METHOD FOR SEMICONDUCTOR DEVICE CAPABLE OF PREVENTING REDUCTION OF FERROELECTRIC FILM
A ferroelectric capacitor is formed on a semiconductor substrate, the ferroelectric capacitor comprising a lower electrode, a ferroelectric film and an upper electrode stacked in an order recited. A first capacitor protective film of aluminum oxide having a thickness equal to or thicker than 30 nm is formed covering the ferroelectric capacitor. A first insulating film of silicon oxide is formed on the first capacitor protective film by chemical vapor deposition using high density plasma.
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This application is a divisional of U.S. application Ser. No. 12/624,081 filed on Nov. 23, 2009 which is based upon and claims the benefit of priority of the prior International Application No. PCT/JP2007/000593, filed on Jun. 1, 2007, the entire contents of which are incorporated herein by reference.
FIELDThe embodiments discussed herein are related to a semiconductor device manufacture method, and more particularly to a semiconductor device including a capacitor protective film for preventing reduction of a ferroelectric film of a ferroelectric capacitor.
BACKGROUNDA ferroelectric memory (FRAM (a registered trademark of USA, Ramtron International Corporation)) has drawn attention as a nonvolatile memory capable of holding data even a power source is turned off.
Used as material of a capacitor dielectric film of a ferroelectric capacitor are PZT-based material such as Pb(Zr,Ti)O3(PZT) and La-doped PZT (PLZT), and Bi layer-structured compound such as SrBi2Ta2O9 (SBT) and SrBi2(Ta,Nb)2O9(SBTN), which are ferroelectric material. These ferroelectric materials are easy to be reduced by hydrogen. Manufacture processes for a ferroelectric capacitor include a process during which hydrogen is generated, such as a process of forming an interlayer insulating film. In order to prevent a dielectric film of a ferroelectric capacitor from being reduced by hydrogen, it is preferable to dispose a capacitor protective film having a hydrogen barrier function over the ferroelectric capacitor. In a ferroelectric capacitor having a MOS transistor, a gate length of which is equal to or longer than 0.35 μm, an aluminum oxide (hereinafter called “ALO”) film deposited by sputtering has been used generally as a capacitor protective film.
By setting a density of an ALO film covering the ferroelectric capacitor equal to or higher than 3.0 g/cm3, it is possible to prevent the electrical properties of the ferroelectric capacitor from being degraded even if heat treatment in a reductive atmosphere is performed (Japanese Laid-open Patent Publication No. 2001-44375). An ALO film is formed by RF sputtering, ECR sputtering or inductively coupled RF plasma enhanced sputtering, using an aluminum target. While the ALO is formed by sputtering, hydrogen will not be generated so that the ferroelectric capacitor is not degraded while the ALO film is formed.
Annealing is performed after a ferroelectric capacitor is covered with a first-layer ALO film (Japanese Laid-open Patent Publication No. 2002-94021). An interlayer insulating film is formed on the first-layer ALO film, and a local wiring is formed on the interlayer insulating film. The local wiring is connected to an upper electrode of the ferroelectric capacitor via an opening formed through the first-layer ALO film and the interlayer insulating film.
A second-layer ALO film is formed on the local wiring. By forming the two or more than two ALO films, it is possible to prevent the ferroelectric capacitor from being degraded while multi wiring layers are formed. It is possible to prevent the imprint characteristics inherent to a ferroelectric memory from being degraded.
For a ferroelectric memory of the next generation having a MOS transistor, a gate length of which is about 0.18 μm, a stack capacitor structure is adopted to improve an integration degree. The “stack capacitor structure” means the structure that one impurity diffusion region of a MOS transistor is directly connected to a lower electrode of a ferroelectric capacitor via a conductive plug formed through an interlayer insulating film in a thickness direction.
In order to realize extremely high integration, it is desired to etch the layers from an upper electrode to a lower electrode of a ferroelectric capacitor in one etching process. This one etching process results in a large aspect ratio of a lamination structure of the layers from the upper electrode to the lower electrode of the dielectric capacitor. It is apprehended that a conventional ALO film formed by sputtering has insufficient coverage (step coverage) of a step of a ferroelectric capacitor having a large aspect ratio.
Step coverage is able to be improved if an ALO film is formed by chemical vapor deposition (CVD). An ALO film is able to be formed by atomic layer deposition (ALD) which is one type of CVD. In forming an ALO film by ALD, trimethylaluminum (TMA) is generally used as aluminum source material, and water (H2O) is used as oxidant.
First, water is adsorbed to the surface of a substrate, and unnecessary water is purged by evacuating the inside of a chamber. Next, TMA is supplied onto the substrate to make TMA react with OH groups and form Al2O3 of one atomic layer. Redundant TMA is purged by evacuating the inside of the chamber. An ALO film is formed by repeating a set of these cycles.
As an ALO film to be used as a protective film for a ferroelectric capacitor is formed by the above-described method, moisture and hydrogen are adsorbed in the ferroelectric film. Alternatively, hydrogen remained in the ALO film reduces the ferroelectric film in a subsequent process. The ferroelectric capacitor is therefore degraded and does not function as a memory in some cases.
An ALO film may be formed by using TMA and ozone (O3) (Japanese Laid-open Patent Publication No. 2004-193280). Since O3 not containing hydrogen is used as oxidant for TMA, hydrogen is prevented from being adsorbed in the ferroelectric film and remaining in the ALO film. It is therefore possible to prevent the ferroelectric capacitor from being degraded.
An ALO film is formed on an interlayer insulating film having a planarized surface (Japanese Laid-open Patent Publication No. 2006-49795). Since the surface of the layer below the ALO film has no step, even an ALO film formed by sputtering and having low step coverage is able to demonstrate sufficient barrier performance against water and hydrogen. It is possible to alleviate difficulty of etching an ALO film by forming the ALO film divided into several ALO films.
SUMMARYAccording to an aspect of the invention, there is provided a manufacture method for a semiconductor device including:
forming a ferroelectric capacitor over a semiconductor substrate, the ferroelectric capacitor including a lower electrode, a ferroelectric film and an upper electrode stacked in an order recited;
forming a first capacitor protective film of aluminum oxide having a thickness equal to or thicker than 30 nm, the first capacitor protective film covering the ferroelectric capacitor; and
forming a first insulating film of silicon oxide on the first capacitor protective film by chemical vapor deposition using high density plasma.
According to another aspect of the invention, there is provided a manufacture method for a semiconductor device including:
forming a ferroelectric capacitor over a semiconductor substrate, the ferroelectric capacitor comprising a lower electrode, a ferroelectric film and an upper electrode stacked in an order recited;
forming a first capacitor protective film of aluminum oxide, the first capacitor protective film covering the ferroelectric capacitor;
forming a seventh insulating film of silicon oxide having a thickness equal to or thicker than 300 nm over the first capacitor protective film by plasma enhanced chemical vapor deposition using tetraethoxysilane-containing gas as source gas; and
forming a first insulating film of silicon oxide over the seventh insulating film by chemical vapor deposition using high density plasma.
According to still another aspect of the invention, there is provided a manufacture method for a semiconductor device including:
forming a ferroelectric capacitor over a semiconductor substrate, the ferroelectric capacitor including a lower electrode, a ferroelectric film and an upper electrode stacked in an order recited;
forming a first capacitor protective film of aluminum oxide, the first capacitor protective film covering the ferroelectric capacitor; and
forming a first insulating film of silicon oxide over the first capacitor protective film by chemical vapor deposition using high density plasma,
wherein a thickness of the first capacitor protective film is equal to or thicker than a lower limit thickness, the lower limit thickness being defined through a process comprising:
preparing samples, each of the samples comprising a substrate, a Ti film on the substrate, an aluminum oxide film on the Ti film, and a silicon oxide film on the aluminum oxide film, the aluminum oxide film being formed in a same way as the first capacitor protective film, the silicon oxide film being formed in a same way as the first insulating film, thicknesses of the aluminum oxide films of the samples being different from one another;
performing thermal desorption spectroscopy for the samples to obtain hydrogen desorption spectrums;
extracting some samples as first samples from the samples, each of the first samples having no peak of the hydrogen desorption spectrum in a temperature range equal to or lower than 700° C. and having a peak of the hydrogen desorption spectrum in a temperature range higher than 700° C.; and
adopting, as the lower limit thickness, a thickness of the aluminum oxide film of one sample whose aluminum oxide film is thinnest among the aluminum oxide films of the first samples.
According to another aspect of the invention, there is provided a manufacture method for a semiconductor device including:
forming a ferroelectric capacitor over a semiconductor substrate, the ferroelectric capacitor including a lower electrode, a ferroelectric film and an upper electrode stacked in an order recited;
forming a first capacitor protective film of aluminum oxide, the first capacitor protective film covering the ferroelectric capacitor;
forming a seventh insulating film of silicon oxide over the first capacitor protective film by plasma enhanced chemical vapor deposition using tetraethoxysilane-containing gas as source gas; and
forming a first insulating film of silicon oxide over the seventh insulating film by chemical vapor deposition using high density plasma,
wherein a thickness of the seventh insulating film is equal to or thicker than a lower limit thickness, the lower limit thickness being defined through a process comprising:
preparing samples, each of the samples comprising a substrate, a Ti film on the substrate, an aluminum oxide film having a thickness of 20 nm on the Ti film, a first silicon oxide film on the aluminum oxide film, and a second silicon oxide film on the first silicon oxide film, the aluminum oxide film being formed in a same way as the first capacitor protective film, the first silicon oxide film being formed in a same way as the seventh insulating film, the second silicon oxide film being formed in a same way as the first insulating film, thicknesses of the first silicon oxide films of the samples being different from one another;
performing thermal desorption spectroscopy for the samples to obtain hydrogen desorption spectrums;
extracting some samples as first samples from the samples, each of the first samples having no peak of the hydrogen desorption spectrum in a temperature range equal to or lower than 700° C. and having a peak of the hydrogen desorption spectrum in a temperature range higher than 700° C.; and
adopting, as the lower limit thickness, a thickness of the first silicon oxide film of one sample whose first silicon oxide film is thinnest among the first silicon oxide films of the first samples.
The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed.
As ferroelectric memories are miniaturized, a gap between adjacent ferroelectric capacitors is narrowed. As a silicon oxide film is formed by plasma enhanced chemical vapor deposition (PE-CVD) using tetraethoxysilane (TEOS), void is likely to be formed in the narrowed gap between adjacent ferroelectric capacitors. As void is formed, the insulating film covering the side walls of the ferroelectric capacitor becomes thin, and a crack is formed starting from the void because of thermal expansion or the like of the upper and lower electrodes. Generation of a crack leads to a lowered reliability of wirings disposed on the insulating film.
Adopting chemical vapor deposition utilizing high density plasma generated by inductive coupling (HDP-CVD) is able to reduce generation of voids. By applying a large bias voltage to a substrate while a silicon oxide film is formed by HDP-CVD, sputtering by Ar ions and deposition of a silicon oxide film by SiH4 and O2 are concurrently able to occur. It is therefore possible to fill the narrow gap between ferroelectric capacitors with the insulating film. A silicon oxide film formed by HDP-CVD is represented by “HDP-SIO”. Similarly, also in a multi layer wiring forming process, an HDP-SIO film having excellent burying performance is effective for an interlayer insulating film.
However, HDP-CVD induces Ar ions in the substrate and at the same time enters hydrogen ions into the substrate. When a silicon oxide film is formed on a ferroelectric capacitor by HDP-CVD, it is necessary to cover the ferroelectric capacitor with a hydrogen barrier film in order not to allow hydrogen ions to invade into the ferroelectric film. An ALO film formed by ALD is effective for a hydrogen barrier film.
It has been found, however, that as an HDP-SIO film is formed on an ALO film, the ALO film is damaged and hydrogen barrier performance is degraded. In the result, hydrogen is captured in the ferroelectric film of the ferroelectric capacitor covered with the ALO film, and the electrical characteristics of the capacitor are degraded.
Prior to describing the semiconductor device manufacture methods of embodiments, description will be made on first to tenth evaluation experiments made by the present inventor.
Substrate temperature 150° C.
DC power 1400 W
Ar gas flow rate 50 sccm
A silicon oxide (HDP-SIO) film 22 having a thickness of 500 nm was formed on the Ti film 21 by HDP-CVD.
An HDP-SIO film 22 is formed by depositing an HDP-SIO film 22A having a thickness of 50 nm without supplying a bias power (in an unbiased state), and thereafter depositing an HDP-SIO film 22B having a thickness of 450 nm by supplying a bias power of 2400 W. Since a diameter of the substrate used is about 200 mm, a bias power per unit area is about 7.6 W/cm2. The other film forming conditions are as follows:
Substrate temperature 250° C.
High frequency power for inductively coupled plasma 3500 W
SiH4:Ar:O2 flow rates 70 sccm:420 sccm:525 sccm
Pressure 2.0 Pa (15 mTorr)
As illustrated in
A peak of the hydrogen desorption spectrum was not observed for the sample illustrated in
Substrate temperature room temperature
RF power 2000 W
Ar gas flow rate 20 sccm
In forming a film by ALD, TMA of liquid at a normal temperature was used as Al source material. Since TMA has a relatively high vapor pressure, TMA is heated to 40° C. and introduced into an ALD film forming chamber in a state that TMA is gasified by vapor pressure. For ALD film formation, a deposition process in which TMA is supplied and an oxidation process in which O2 and O3 are supplied were alternately executed by inserting a vacuum purge process between the deposition process and the oxidation process, with repetition of 200 cycles.
The conditions of the deposition process by ALD are as follows:
Substrate temperature 250° C.
Gas pressure 40 Pa
TMA gas flow rate 100 sccm
O2+O3 gas flow rate 0 slm
Time 5 sec
The conditions of the oxidation process by ALD are as follows:
Substrate temperature 250° C.
Gas pressure 133 Pa
TMA gas flow rate 0 sccm
O2+O3 gas flow rate 10 slm
Time 15 sec
An HDP-SIO film 22 having a thickness of 500 nm was formed on the ALO film 23 in the same way as that of the sample illustrated in
As illustrated in
However, temperatures of spectrum peaks of the hydrogen desorption for all the samples illustrated in
From comparison between the hydrogen desorption spectra of two samples whose ALO films 23 illustrated in
It can be seen from the analysis results illustrated in
However, the analysis results illustrated in
This evaluation result suggests that even an ALO film having a thickness of 20 nm is disposed between the PZT film and HDP-SIO film when the HDP-SIO film is formed on the PZT film, substantial amount of hydrogen is invaded into the PZT film.
The silicon oxide film 24 is formed by plasma enhanced CVD using capacitively coupled plasma of TEOS and O2. The film was formed without supplying a bias power to the susceptor holding the substrate. Silicon oxide formed by plasma enhanced CVD using capacitively coupled plasma of TEOS and O2 is represented by “TEOS-SIO”. The conditions of forming the TEOS-SIO film 24 are as follows:
Substrate temperature 390° C.
RF power 700 W
Pressure 1.2×103 Pa (9 Torr)
TEOS supply amount 690 ring/min
O2 flow rate 2980 sccm
The sample illustrated in
The ALO film 23 having a thickness of 20 nm maintains a sufficient hydrogen diffusion preventive function. This indicates that the ALO film 23 is not damaged while the TEOS-SIO film 24 is formed.
The samples whose TEOS-SIO films 24 have thicknesses of 50 nm and 100 nm had peaks of the hydrogen desorption spectra at a temperature adjacent to 630° C. In contrast, the samples whose TEOS-SIO films 24 have thicknesses of 300 nm and 500 nm had no peak of the hydrogen desorption spectra in the temperature range equal to or lower than 700° C., and had a peak at a temperature adjacent to 720° C. This means that in the samples whose TEOS-SIO films 24 have thicknesses of 50 nm and 100 nm, the ALO films 23 are damaged and the hydrogen diffusion preventive function is lost, whereas in the samples whose TEOS-SIO films 24 have thicknesses of 300 nm and 500 nm, the ALO film 23 maintains a sufficient hydrogen diffusion preventive function.
It is considered that the ALO film 23 having a thickness of 20 nm maintains a sufficient hydrogen diffusion preventive function because the TEOS-SIO film 24 serves as a protective film for the ALO film 23 while the HDP-SIO films 22A and 22B are formed.
As understood from the analysis results, in order to maintain the hydrogen diffusion preventive function of the ALO film 23 under the HDP-SIO film after the HDP-SIO film is formed, it is preferable to set a thickness of the TEOS-SIO film serving as a protective film to be formed on the ALO film equal to or thicker than 300 nm.
Substrate temperature 370° C.
High frequency power for inductively coupled plasma 3100 W
SiH4:Ar:O2 flow rate 60 sccm:110 sccm:105 sccm
The film forming conditions of the HDP-SIO film 22B are a bias power of 3250 W in addition to the above-described conditions.
The sample illustrated in
The hydrogen desorption spectrum of the sample illustrated in
In the samples illustrated in
It is found that if a thickness of the TEOS-SIO film 24 is set equal to or thicker than 100 nm, it is possible to protect the ALO film 23 sufficiently in the case of using the high density plasma system used for forming the HDP-SIO film of the samples illustrated in
A plurality of samples are manufactured having the lamination structure illustrated in
Substrate temperature 370° C.
High frequency power for inductively coupled plasma 3100 W
Bias power 3250 W
SiH4:Ar:O2 flow rate 60 sccm:110 sccm:105 sccm
This evaluation results indicate that it is possible to maintain the hydrogen diffusion preventive function of the ALO film 23 by setting a thickness of the ALO film equal to or thicker than 30 nm, even if the HDP-SIO film is formed on the ALO film. Also in the evaluation experiment illustrated in
It is considered in a precise sense that a preferred thickness of the ALO film changes with a film forming system, film forming conditions and the like of the HDP-SIO film to be formed on the ALO film. It is however considered that if a thickness of the ALO film is set equal to or thicker than 30 nm under the generally used film forming conditions, the hydrogen diffusion preventive function of the ALO film is able to be maintained. In the above-described evaluation experiment, although the ALO film was formed by sputtering, the thickness is preferably set equal to or thicker than 30 nm also when the film is formed by CVD or ALD.
Depending upon the film forming conditions of the HDP-SIO film to be formed on the ALO film, the hydrogen diffusion preventive function may be maintained even if a thickness of the ALO film is set thinner than 30 nm. In the following, description will be made on a method of determining a lower limit value of a preferable thickness of the ALO film.
A plurality of samples are manufactured having the same lamination structure as illustrated in
Next, with reference to
As illustrated in
A cover insulating film 60 of SiON is formed on the substrate 50 to cover the MOS transistors 53 and 54. An interlayer insulating film 61 of silicon oxide is formed on the cover insulating film 60, and the surface of the interlayer insulating film 61 is planarized. Via holes 62 are formed through the interlayer insulating film 61 and the cover insulating film 60, reaching the impurity diffusion regions 55a, 55b and 55c, respectively. The inner surfaces of these via holes 62 are covered with a glue film 63, and conductive plugs 64 of tungsten are embedded in the via holes 62. The glue film 63 has a two-layer structure of, e.g., a Ti film having a thickness of 30 nm and a TiN film having a thickness of 50 nm.
The glue films 63 and conductive plugs 64 are formed by a film forming process and a chemical mechanical polishing (CMP) process. The Ti film and TiN film constituting the glue film 63 may be formed by sputtering. The W film embedded in the via hole may be formed by chemical vapor deposition (CVD).
As illustrated in
As illustrated in
Substrate temperature 650° C.
Nitrogen flow rate 10 slm (standard liter/min)
Process time 120 sec
Since crystallinity of the Ti film 70 before nitriding is good, crystallinity of the TiN film 71 obtained by nitriding the Ti film 70 is also good. The crystal structure of TiN is a rock salt structure. As a <001> oriented Ti film is nitrided, a <111> oriented TiN film is obtained.
As illustrated in
The crystal structure of the TiAlN film 73 is a rock salt structure, and is <111> oriented inheriting orientation of the underlying TiN film 71. The crystal structure of the Ir film 74 is a face-centered cubic lattice structure, and is <111> oriented inheriting orientation of the underlying TiAlN film 73.
In the following, a method of forming the ferroelectric film 75 will be described. First, a PZT film having a thickness of 5 nm is formed by metal organic chemical vapor deposition (MOCVD). Thereafter, by raising an oxygen partial pressure, a PZT film having a thickness of 115 nm is formed by MOCVD. Film forming conditions are a substrate temperature of 620° C. and a pressure of 667 Pa (5 Torr).
It is possible to improve crystallinity of the PZT film by setting an oxygen partial pressure during an initial growth relatively low. However, as the oxygen partial pressure is lowered, oxygen defect increases and thereby leak current increases. By raising the oxygen partial pressure after the PZT film having a thickness of 5 nm is formed, it is possible to inherit good crystallinity and prevent an increase in leak current.
The ferroelectric film 75 of PZT inherits orientation of the Ir film 74, and is <111> oriented. By improving orientation (crystallinity) of the TiN film 71, it is possible to improve orientation (crystallinity) of the ferroelectric film 75.
The ferroelectric film 75 may be made of PZT based material such as PLZT, Bi layer-structured compound such as SBT, SBTN, and the like other than PZT.
Processes up to the structure illustrated in
By using the resist pattern as a mask, the TEOS-SIO film serving as the hard mask is patterned by dry etching using mixture gas of C4F8, Ar and CF4. Further, the TiN film serving as the hard mask is patterned by dry etching using mixture gas of BCl3 and Cl2, or using Cl2 gas. After the TiN film is pattered, the resist pattern is removed by ashing. In consequence, the hard mask having the two-layer structure of the TiN film and the TEOS-SIO film remains.
By using the hard mask as an etching mask, each layer from the upper Ir film 77 to the lower Ir film 74 is etched in an inductively coupled plasma (ICP) type etching system. The Ir films 77 and 74 are etched using HBr, O2 and C4F8. The IrO film 76 is etched using HBr and O2. The ferroelectric film 75 is etched using Cl2 and Ar.
Thereafter, the TEOS-SIO film used as the hard mask is removed by reactive ion etching using mixture gas of C4F8, Ar and O2. Next, the TiN film used as the hard mask, TiAlN film 73 and TiN film 71 are removed using mixture liquid of hydrogen peroxide aqueous solution and ammonia aqueous solution.
A ferroelectric capacitor 85 is constituted of: a lower electrode 81 consisting of three layers of the TiN film 71, TiAlN film 73 and Ir film 74; an upper electrode 83 consisting of two layers of the IrO film 76 and Ir film 77; and the ferroelectric film 75 disposed between the upper and lower electrodes 83, 81. Since the layers from the upper electrode 83 to the lower electrode 81 of the ferroelectric capacitor 85 are patterned by one etching process (using the same etching mask), it is not necessary to ensure a position alignment margin for these patterns. Therefore, the above-described patterning method with one etching process is suitable for miniaturizing ferroelectric capacitors.
The lower electrode 81 of the ferroelectric capacitor 85 is connected to one impurity diffusion region 55a of the MOS transistor 53 via the underlying conductive plug 64. The lower electrode 81 of another ferroelectric capacitor 85 is connected to one impurity diffusion region 55c of another MOS transistor 54 via another underlying conductive plug 64.
As illustrated in
An ALO film having a thickness of 2 nm is formed by ALD alternately supplying O2+O3 and trimethylalminum (TMA). Thereafter, oxygen recovery anneal is performed for 60 minutes at 600° C. This anneal recovers oxygen defect in the ferroelectric film 75. After the oxygen recovery anneal, an ALO film having a thickness of 38 nm is formed by ALD. In this manner, the ALO film 90 having a thickness of 40 nm is formed.
After the ALO film having a thickness of 40 nm is formed, it is difficult to recover the oxygen defect in the ferroelectric film 75 even if the oxygen recovery anneal is performed, because the ALO film serves as an oxygen barrier. By performing the oxygen recovery anneal at an intermediate stage of forming the ALO film, it is possible to recover sufficiently the oxygen defect in the ferroelectric film 75.
Since the capacitor protective film 90 is formed by ALD, it is possible to form the capacitor protective film 90 having better step coverage than the capacitor protective film is formed by sputtering.
As illustrated in
Thereafter, the interlayer insulating film 91 is subjected to CMP to planarize the surface thereof. A remaining film thickness in the region where the ferroelectric capacitor 85 is disposed is 300 nm after CMP. The interlayer insulating film 91 is exposed to N2O plasma to perform a dehydration process.
As illustrated in
An interlayer insulating film 94 having a thickness of 300 nm is formed on the flat capacitor protective film 93 by plasma CVD using TEOS and O2. By disposing the interlayer insulating film 94 of silicon oxide, it is possible to improve reliability of wirings to be formed on the interlayer insulating film 94.
As illustrated in
As illustrated in
As illustrated in
As illustrated in
Some of the wirings 115 are connected to the upper electrodes 83 of the ferroelectric capacitors 85 via the conductive plugs 101. One of the wirings 115 is connected to the impurity diffusion region 55b via the conductive plug 101 and underlying conductive plug 64.
As illustrated in
Therefore, the interlayer insulating film 94 of TEOS-SIO serves as a protective film for the flat capacitor protective film 93 when the interlayer insulating film 121 of HDP-SIO is formed. By setting a thickness of the interlayer insulating film 94 of TEOS-SIO sufficiently thick, e.g., equal to or thicker than 300 nm, it is possible to maintain the hydrogen diffusion preventive function of the flat capacitor protective film 93.
As illustrated in
As illustrated in
The capacitor protective film 90 and the flat capacitor protective film 93 prevent hydrogen diffusion while the interlayer insulating film 137 and interlayer insulating films used for multi wirings over the interlayer insulating film 137 are formed. It is therefore possible to prevent reduction of the ferroelectric film 75 constituting the ferroelectric capacitor 85. In the result, it is possible to prevent the performance of the ferroelectric capacitor 85 from being degraded.
In the first embodiment, a thickness of the flat capacitor protective film 93 of ALO is set to 20 nm and a thickness of the interlayer insulating film 94 of TEOS-SIO formed on the flat capacitor protective film 93 is set to 300 nm, whereas in the second embodiment, a thickness of a flat capacitor protective film 93A is set equal to or thicker than 30 nm. An interlayer insulating film 94A of TEOS-SIO formed on the flat capacitor protective film 93A may be thinner than 300 nm or may be omitted.
The ALO film 23 and the HDP-SIO film 22 of the evaluation samples illustrated in
With reference to
As illustrated in
As illustrated in
As illustrated in
In the third embodiment, the interlayer insulating film 123 of TEOS-SIO formed on the capacitor protective film 120 of ALO has a function of protecting the capacitor protective film while the interlayer insulating film 121 of HDP-SIO is formed. By properly setting a thickness of the interlayer insulating film 123, it is possible to maintain the hydrogen diffusion preventive function of the capacitor protective film 120. The capacitor protective film 120 prevents hydrogen from reaching the ferroelectric capacitor 85 during processes of forming the interlayer insulating films 121 and 137 on the capacitor protective film 120. The flat capacitor protective film 93 of ALO may be omitted. In this case, the capacitor protective film 120 of ALO serves as the second protective film.
In the third embodiment, a thickness of the flat capacitor protective film 120 formed on the wirings 115 is set to 20 nm, whereas in the fourth embodiment, a capacitor protective film 120A of ALO having a thickness of 30 nm is formed on the wirings 115. The interlayer insulating film 123 of TEOS-SIO of the third embodiment is not formed in the fourth embodiment.
Since the thickness of the capacitor protective film 120A is set to 30 nm, the hydrogen diffusion preventive function of the capacitor protective film 120A is able to be maintained even if the interlayer insulating film 121 of HDP-SIO is formed on the capacitor protective film 120A.
With reference to
As illustrated in
As illustrated in
As illustrated in
It is possible to consider that the flat capacitor protective film 140 of ALO and the interlayer insulating film 137 of HDP-SIO correspond to the ALO film 23 and the HDP-SIO film 22 illustrated in
In the fifth embodiment, a thickness of the flat capacitor protective film 140 is set equal to or thicker than 30 nm to maintain the hydrogen diffusion preventive function thereof. In the sixth embodiment, a flat capacitor protective film 140A of ALO having a thickness of 20 nm is disposed in place of the flat capacitor protective film 140. In the fifth embodiment, a thickness of the interlayer insulating film 141 of TEOS-SIO on the flat capacitor protective film 140 is arbitrary, whereas in the sixth embodiment, a thickness of an interlayer insulating film 141A of TEOS-SIO disposed on the flat capacitor protective film 140A is set to a thickness sufficient for protecting the flat capacitor protective film 140A, e.g., 300 nm or thicker than 300 nm.
While the interlayer insulating film 137 of HDP-SIO is formed on the interlayer insulating film 141A, the interlayer insulating film 141A protects the flat capacitor protective film 140A so that it is possible to maintain the hydrogen diffusion preventive function of the flat capacitor protective film 140A.
In the first embodiment, the capacitor protective film 90 covering the ferroelectric capacitor 85 is made thick, e.g., equal to or thicker than 30 nm, to maintain the hydrogen diffusion preventive function thereof. In the seventh embodiment, a thickness of a capacitor protective film 90A covering the ferroelectric capacitor 85 is set to 20 nm. In order to maintain the hydrogen diffusion preventive function of the thin capacitor protective film 90A, an interlayer insulating film 92 of TEOS-SIO is disposed between the capacitor protective film 90A and the interlayer insulating film 91 of HDP-SIO. The interlayer insulating film 92 of TEOS-SIO has a thickness sufficient for protecting the underlying capacitor protective film 90A.
While the interlayer insulating film 91 of HDP-SIO is formed, the interlayer insulating film 92 of TEOS-SIO protects the capacitor protective film 90A so that it is possible to maintain the hydrogen diffusion preventive function of the capacitor protective film 90A.
As described above, in each embodiment, in order to maintain the hydrogen diffusion preventive function of the capacitor protective film of ALO, the capacitor protective film itself is made thick (hereinafter called “structure A”) or an insulating film of TEOS-SIO having a sufficient thickness is disposed on the capacitor protective film (hereinafter called “structure B”).
The TEOS-SIO film has the embedding characteristics inferior to those of the HDP-SIO film. Therefore, if fine steps are formed on a surface just below a capacitor protective film of ALO and high embedding characteristics are required for the insulating film to be formed thereon, it is effective for adopting the structure A unnecessary for forming the TEOS-SIO film.
Further, since it is more difficult to etch the ALO film than etching the TEOS-SIO film and the HDP-SIO film, if the ALO film is made thick, a burden on an etching process increases. Therefore, if it is desired to prevent a burden on an etching process from being increased, it is effective for adopting the structure B capable of thinning the ALO film.
All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although the embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.
Claims
1. A manufacture method for a semiconductor device comprising:
- forming a ferroelectric capacitor over a semiconductor substrate, the ferroelectric capacitor comprising a lower electrode, a ferroelectric film and an upper electrode stacked in an order recited;
- forming a first capacitor protective film of aluminum oxide, the first capacitor protective film covering the ferroelectric capacitor;
- forming a seventh insulating film of silicon oxide having a thickness equal to or thicker than 300 nm over the first capacitor protective film by plasma enhanced chemical vapor deposition using tetraethoxysilane-containing gas as source gas; and
- forming a first insulating film of silicon oxide over the seventh insulating film by chemical vapor deposition using high density plasma.
2. The manufacture method for a semiconductor device according to claim 1, further comprising:
- planarizing a surface of the first insulating film;
- forming a second capacitor protective film of aluminum oxide over the planarized first insulating film;
- forming a second insulating film of silicon oxide having a thickness equal to or thicker than 300 nm over the second capacitor protective film by plasma enhanced chemical vapor deposition using tetraethoxysilane-containing gas as source gas;
- forming a first wiring of conductive material over the second insulating film; and
- forming a third insulating film of silicon oxide over the second insulating film by chemical vapor deposition using high density plasma, the third insulating film covering the first wiring.
3. The manufacture method for a semiconductor device according to claim 1, further comprising:
- planarizing a surface of the first insulating film;
- forming a second capacitor protective film of aluminum oxide having a thickness equal to or thicker than 30 nm over the planarized first insulating film;
- forming a first wiring of conductive material over the second insulating film; and
- forming a third insulating film of silicon oxide over the second capacitor protective film by chemical vapor deposition using high density plasma, the third insulating film covering the first wiring.
4. The manufacture method for a semiconductor device according to claim 1, further comprising:
- forming a first wiring of conductive material over the first insulating film;
- forming a third capacitor protective film of aluminum oxide over the first insulating film, the third capacitor protective film covering the first wiring;
- forming a fourth insulating film of silicon oxide having a thickness equal to or thicker than 300 nm over the third capacitor protective film by plasma enhanced chemical vapor deposition using tetraethoxysilane-containing gas as source gas; and
- forming a third insulating film of silicon oxide over the fourth insulating film by chemical vapor deposition using high density plasma.
5. The manufacture method for a semiconductor device according to claim 1, further comprising:
- forming a first wiring of conductive material over the first insulating film;
- forming a third capacitor protective film of aluminum oxide having a thickness equal to or thicker than 30 nm over the first insulating film, the third capacitor protective film covering the first wiring; and
- forming a third insulating film of silicon oxide over the third capacitor protective film by chemical vapor deposition using high density plasma.
6. The manufacture method for a semiconductor device according to claim 1, further comprising:
- forming a first wiring of conductive material over the first insulating film;
- forming a third insulating film of silicon oxide over the first insulating film, the third insulating film covering the first wiring;
- planarizing a surface of the third insulating film;
- forming a fourth capacitor protective film of aluminum oxide having a thickness equal to or thicker than 30 nm over the planarized third insulating film;
- forming a second wiring of conductive material over the fourth capacitor protective film; and
- forming a fifth insulating film of silicon oxide over the fourth capacitor protective film by chemical vapor deposition using high density plasma, the fifth insulating film covering the second wiring.
7. The manufacture method for a semiconductor device according to claim 1, further comprising:
- forming a first wiring of conductive material over the first insulating film;
- forming a third insulating film of silicon oxide, the third insulating film covering the first wiring;
- planarizing a surface of the third insulating film;
- forming a fourth capacitor protective film of aluminum oxide over the planarized third insulating film;
- forming a sixth insulating film of silicon oxide having a thickness equal to or thicker than 300 nm over the fourth capacitor protective film by plasma enhanced chemical vapor deposition using tetraethoxysilane-containing gas as source gas;
- forming a second wiring of conductive material over the sixth insulating film; and
- forming a fifth insulating film of silicon oxide over the sixth insulating film by chemical vapor deposition using high density plasma, the fifth insulating film covering the second wiring.
8. The manufacture method for a semiconductor device according to claim 1, wherein the first capacitor protective film is formed by chemical vapor deposition.
9. The manufacture method for a semiconductor device according to claim 8, wherein the first capacitor protective film is formed by atomic layer deposition for alternately supplying ozone and trimethylaluminum.
10. A manufacture method for a semiconductor device comprising:
- forming a ferroelectric capacitor over a semiconductor substrate, the ferroelectric capacitor comprising a lower electrode, a ferroelectric film and an upper electrode stacked in an order recited;
- forming a first capacitor protective film of aluminum oxide, the first capacitor protective film covering the ferroelectric capacitor;
- forming a seventh insulating film of silicon oxide over the first capacitor protective film by plasma enhanced chemical vapor deposition using tetraethoxysilane-containing gas as source gas; and
- forming a first insulating film of silicon oxide over the seventh insulating film by chemical vapor deposition using high density plasma,
- wherein a thickness of the seventh insulating film is equal to or thicker than a lower limit thickness, the lower limit thickness being defined through a process comprising:
- preparing samples, each of the samples comprising a substrate, a Ti film on the substrate, an aluminum oxide film having a thickness of 20 nm on the Ti film, a first silicon oxide film on the aluminum oxide film, and a second silicon oxide film on the first silicon oxide film, the aluminum oxide film being formed in a same way as the first capacitor protective film, the first silicon oxide film being formed in a same way as the seventh insulating film, the second silicon oxide film being formed in a same way as the first insulating film, thicknesses of the first silicon oxide films of the samples being different from one another;
- performing thermal desorption spectroscopy for the samples to obtain hydrogen desorption spectrums;
- extracting some samples as first samples from the samples, each of the first samples having no peak of the hydrogen desorption spectrum in a temperature range equal to or lower than 700° C. and having a peak of the hydrogen desorption spectrum in a temperature range higher than 700° C.; and
- adopting, as the lower limit thickness, a thickness of the first silicon oxide film of one sample whose first silicon oxide film is thinnest among the first silicon oxide films of the first samples.
Type: Application
Filed: Mar 15, 2013
Publication Date: Aug 15, 2013
Applicant: FUJITSU SEMICONDUCTOR LIMITED (Yokohama-shi, Kanagawa)
Inventor: FUJITSU SEMICONDUCTOR LIMITED
Application Number: 13/839,327
International Classification: H01L 49/02 (20060101);