MIPI SIGNAL RECEIVING APPARATUS AND METHOD
A signal receiving apparatus and method adapted for receiving a MIPI signal are disclosed. The signal receiving apparatus includes a signal receiver, a selector, a decoding apparatus and a byte boundary searcher. The signal receiver receives a clock signal, and obtains an input data stream according to the clock signal. The selector outputs the input data stream to a first or second output terminal according to a decoding error signal. The byte boundary searcher operates a boundary searching operation on the input data stream for generating a byte tuning information, wherein, the signal receiver adjusts the clock according to the byte tuning information for adjusting the input data stream.
This application claims the priority benefit of Taiwan application serial no. 102103180, filed on Jan. 28, 2013. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
BACKGROUND1. Field of the Invention
The present invention is directed to a signal receiving apparatus and a signal receiving method and more particularly, to a signal receiving apparatus and a signal receiving method of a mobile industry processor interface (MIPI) signal.
2. Description of Related Art
In the technical field of the related art, a high-speed transmission interface which performs transmission by using packets in serial has advantages of having a high transmission rate and a low transmission pin count. In order to enhance the reliability of data transmission, a differential signal may be further used for transmission so as to mitigate the influence caused by the electromagnetic interference (EMI).
Referring to
In order to solve the aforementioned issues, the MIPI of the related art typically avoids the error of the data packets by periodically transmitting the SOT signal. However, the repeatedly transmitted SOT signal occupies the transmission bandwidth of the data packets and results in the limitation to the transmission efficiency of the MIPI.
SUMMARYThe present invention is directed to an apparatus and a method of receiving a mobile industry processor interface (MIPI) signal capable of effectively improving the accuracy of received signals.
The present invention is directed to a signal receiving apparatus adapted to receive a MIPI signal, which includes a signal receiver, a selector, a decoding apparatus and a byte boundary searcher. The signal receiver receives a clock signal and receives an original input data stream according to the clock signal so as to obtain an input data stream. The selector has a first and a second output terminals. The selector is coupled to the signal receiver and selects to transmit the input data stream to the first output terminal or the second output terminal according to a decoding error signal. The decoding apparatus is coupled to the first output terminal of the selector and performs a decoding operation on the input data stream received by the first output terminal of the selector so as to generate the decoding error signal. The byte boundary searcher is coupled to the second output terminal of the selector and performs a boundary searching operation on the input data stream received by the second output terminal of the selector so as to generate byte tuning information. The signal receiver adjusts the clock signal according to the byte tuning information so as to adjust the correspondingly received input data stream.
The present invention is further directed to a method of receiving a MIPI signal including receiving a clock signal and receiving an original input data stream according to the clock signal so as to obtain an input data stream, selecting to transmitting the input data stream to a decoding apparatus or a byte boundary searcher according to a decoding error signal, performing a decoding operation on the input data stream by using the decoding apparatus so as to generate the decoding error signal, performing a boundary searching operation on the input data stream by using the byte boundary searcher so as to generate byte tuning information and adjusting the clock signal according to the byte tuning information so as to adjust the correspondingly received input data stream.
Accordingly, in the present invention, when a failure of the decoding operation occurs, the generated byte tuning information is searched for by performing the boundary searching operation and the clock signal is adjusted according to the byte tuning information so as to adjust the correspondingly received input data stream.
In order to make the aforementioned and other features and advantages of the present invention more comprehensible, several embodiments accompanied with figures are described in detail below.
The accompanying drawings are included to provide a further understanding of the present invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present invention and, together with the description, serve to explain the principles of the present invention.
Referring to
Certainly, the relationship between whether the decoding operation is successful and the logic level of the decoding error signal DER as described above is only an example, and constructs no limitations to the present invention.
The byte boundary searcher 230 is coupled to the second output terminal OT2 of the selector 220. The byte boundary searcher 230 performs a boundary searching operation on the input data stream DS received by the second output terminal OT2 of the selector 220 so as to generate byte tuning information STI. Therein, the byte tuning information STI is transmitted to the signal receiver 210, and the signal receiver 210 adjusts the clock signal CKIN according to the byte tuning information STI so as to adjust the correspondingly received input data stream DS. In particular, the byte boundary searcher 230 performs a diction operation on the input data stream DS so as to detect a byte shift amount generated by each data byte of the input data stream DS and generates the byte tuning information STI according to the detected byte shift amount generated by each data byte of the input data stream DS. Upon receiving byte tuning information STI, the signal receiver 210 is aware of byte numbers for reversely shifting the data bytes of the input data stream DS so as to adjust the input data stream DS as correct data packets.
Referring to
The stream receiver 312 is coupled to the boundary selector 311 to receive the clock signal CKIN of original or adjusted by the boundary selector 311 and receive an original input data stream ODS according to the clock signal CKIN. The latches 313˜316 are coupled to the stream receiver 312 and respectively configured to temporarily store original input data stream ODS received in different time so as to obtain different channel data streams. The compensation circuit 317 is coupled to the latches 313˜316 and performs a compensation operation on the channel data streams stored in the latches 313˜316. The multiplexer 318 is coupled to the compensation circuit 317 and selects to output one of the channel data streams so as to generate an input data stream DS.
In the present embodiment, the selector 320 is a switch SW. The switch SW is controlled by the decoding error signal DER to transmit the input data stream DS to the byte boundary searcher 330 or the decoding apparatus 340. The decoding apparatus 340 includes a decoder 341, a control circuit 342 and a watch dog counter 343. The decoder 341 is coupled to the selector 320 and the byte boundary searcher 330. The decoder 341 receives the input data stream DS through the selector 320 for performing the decoding operation to generate a decoded packet. The control circuit 342 is coupled to the decoder 341 and determines whether the decoder 341 is normally operated according to the decoded packet so as to generate a timing start signal TS. The watch dog counter 343 is coupled to the control circuit 342 and receives the timing start signal TS to start a counting operation according thereto.
To be specific, the control circuit 342 receives decoded packet generated by the decoder 341 to determine whether the decoding operation of the decoder 341 is normal and when determining that the decoding operation of the decoder 341 is abnormal, provides the timing start signal TS to start the counting operation of the watch dog counter 343. Meanwhile, when an overflow occurs during the counting operation of the watch dog counter 343, the watch dog counter 343 provides the decoding error signal DER to the selector 320. After receiving the decoding error signal DER, the selector 320 correspondingly transmits the input data stream DS to the byte boundary searcher 330 to perform the boundary searching operation. The byte boundary searcher 330 generates the byte tuning information STI by performing the boundary searching operation on the input data stream DS.
Please refer to both
When the byte boundary searcher 330 performs the boundary searching operation on the input data stream DS, it indicates that an error occurs in the input data stream DS if the byte boundary of the input data stream DS is not identical to the byte data of the correct byte boundary. For instance, when the byte boundaries of the input data stream DS are 0, 0, 48 and E4, the byte data of the byte boundaries in the row field R3 and the line fields C1˜C4 in the error status lookup table 400 may be corresponding to. Thus, the byte boundary searcher 330 may be aware that during the process of receiving the input data stream DS, surplus pluses are generated in the corresponding clock signal CKIN due to interference. On the other hand, when the byte boundaries of the input data stream DS are 8, 0, 80 and 44, the byte data of the boundaries in the row field R5 and the line fields C1˜C4 in the error status lookup table 400 may be corresponding to. Thus, the byte boundary searcher 330 may be aware that during the process of receiving the input data stream DS, pulses which are supposed to be generated in the corresponding clock signal CKIN are deducted due to interference.
Based on the above description, the byte boundary searcher 330 may generate the byte tuning information STI according to the fields corresponding to the byte boundaries of the input data stream DS, such that the boundary selector 311 may insert or deduct a plurality of pulses in or from the clock signal CKIN according to the byte tuning information STI to adjust the clock signal CKIN and further generate the correct input data stream DS.
Additionally, when completely generating the byte tuning information STI, the byte boundary searcher 330 may correspondingly generates a timing stop signal TP and transmit the same to the watch dog counter 343 to stop and reset the counting operation of the watch dog counter 343.
Referring to
Based on the above, in the present invention, the boundary searching operation is performed on the input data stream by using the byte boundary searcher so as to generate the byte tuning information, and the clock signal configured as the basis for receiving the original input data stream is adjusted by using the byte tuning information. As such, the input data stream having a byte shift error due to interference may be effectively corrected so as to improve the data accuracy.
Although the invention has been described with reference to the above embodiments, it will be apparent to one of the ordinary skill in the art that modifications to the described embodiment may be made without departing from the spirit of the invention. Accordingly, the scope of the invention will be defined by the attached claims not by the above detailed descriptions.
Claims
1. A signal receiving apparatus, adapted to receiving a mobile industry processor interface (MIPI) signal, comprising:
- a signal receiver, receiving a clock signal and receiving an original input data stream according to the clock signal to obtain an input data stream;
- a selector, having a first and a second output terminals, coupled to the signal receiver, and selecting to transmit the input data stream to the first output terminal or the second output terminal according to a decoding error signal;
- a decoding apparatus, coupled to the first output terminal of the selector and performing a decoding operation on the input data stream received by the first output terminal of the selector so as to generate the decoding error signal; and
- a byte boundary searcher, coupled to the second output terminal of the selector and performing a boundary searching operation on the input data stream received by the second output terminal of the selector to generate byte tuning information,
- wherein, the signal receiver adjusts the clock signal according to the byte tuning information to adjust the correspondingly received input data stream.
2. The signal receiving apparatus according to claim 1, wherein the byte boundary searcher comprises:
- an error status lookup table, configured to record byte data of a plurality of byte boundaries, wherein the byte boundary searcher generates the byte tuning information by comparing the input data stream with the byte data of each of the byte boundaries.
3. The signal receiving apparatus according to claim 2, wherein the byte data of the byte boundaries is formed by performing byte shifts of different shift amounts on the byte data of a correct byte boundary.
4. The signal receiving apparatus according to claim 1, wherein the decoding apparatus comprises:
- a decoder, coupled to the selector and the byte boundary searcher, receiving and decoding the input data stream to generate a decoded packet;
- a control circuit, coupled to the decoder and determining whether the decoder is normal according to the decoded packet so as to generate a timing start signal; and
- a watch dog counter, coupled to the control circuit, receiving the timing start signal and starting a counting operation according to the timing start signal.
5. The signal receiving apparatus according to claim 4, wherein the watch dog counter is further coupled to the selector and generates the decoding error signal when an overflow occurs during the counting operation.
6. The signal receiving apparatus according to claim 4, wherein the byte boundary searcher is further coupled to the watch dog counter, the byte boundary searcher further generates a timing stop signal when generating the byte tuning information, the timing stop signal is transmitted to the watch dog counter to stop and reset the counting operation of the watch dog counter.
7. The signal receiving apparatus according to claim 1, wherein the signal receiver comprises:
- a boundary selector, coupled to the byte boundary searcher and receiving the byte tuning information to insert or deduct a plurality of pluses in or from the clock signal according to the byte tuning information.
8. The signal receiving apparatus according to claim 6, wherein the signal receiver further comprises:
- a stream receiver, coupled to the boundary selector to receive the clock signal and receiving the original input data stream according to the clock signal;
- a plurality of latches, coupled to the stream receiver and temporarily storing the original input data stream received in different time so as to obtain a plurality of channel data streams;
- a compensation circuit, coupled to the plurality of latches and performing a compensation operation on the plurality of channel data streams; and
- a multiplexer, coupled to the compensation circuit and selecting to output one of the plurality of channel data streams so as to generate the input data stream.
9. A method of receiving a mobile industry processor interface (MIPI) signal, comprising:
- receiving a clock signal and receiving an original input data stream according to the clock signal so as to obtain an input data stream;
- selecting to transmitting the input data stream to a decoding apparatus or a byte boundary searcher according to a decoding error signal;
- performing a decoding operation on the input data stream by using the decoding apparatus so as to generate the decoding error signal;
- performing a boundary searching operation on the input data stream by using the byte boundary searcher so as to generate byte tuning information; and
- adjusting the clock signal according to the byte tuning information so as to adjust the correspondingly received input data stream.
10. The method according to claim 9, wherein the step of performing the boundary searching operation on the input data stream by using the byte boundary searcher so as to generate the byte tuning information comprises:
- recording byte data of a plurality of byte boundaries; and
- comparing the input data stream with the byte data of each of the byte boundaries by using the byte boundary searcher so as to generate the byte tuning information.
11. The method according to claim 10, wherein the byte data of the byte boundaries is formed by performing byte shifts of different shift amounts on the byte data of a correct byte boundary.
12. The method according to claim 9, wherein the step of performing the decoding operation on the input data stream by using the decoding apparatus so as to generate the decoding error signal comprises:
- receiving and decoding the input data stream so as to generate a decoded packet;
- determining whether the decoder is normal according to the decoded packet so as to generate a timing start signal; and
- receiving the timing start signal and starting a counting operation of a watch dog counter according to the timing start signal and generates the decoding error signal when an overflow occurs during the counting operation of the watch dog counter.
13. The method according to claim 9, wherein the step of adjusting the clock signal according to the byte tuning information so as to adjust the correspondingly received input data stream comprises:
- receiving the byte tuning information to insert or deduct a plurality of pluses in or from the clock signal according to the byte tuning information.
Type: Application
Filed: Jul 16, 2013
Publication Date: Jul 31, 2014
Patent Grant number: 9077505
Inventors: Chih-Chao Yang (Hsinchu City), Wei-Ying Tu (Hsinchu City), Yu-Hsun Peng (Hsinchu County), Feng-Jung Kuo (Hsinchu County), Chien-Yu Chen (Hsinchu County)
Application Number: 13/942,723
International Classification: H04L 7/00 (20060101);