OPTOELECTRONIC SEMICONDUCTOR DEVICE
An optoelectronic semiconductor device comprising: a semiconductor system comprises an upper surface, an interfacial layer comprises a upper interfacial layer on the upper surface of the semiconductor system, and the upper interfacial layer comprises a first wavelength converting material; and a void region in the upper interfacial layer, and a material different from that of the upper interfacial layer fills in the void region.
This application is a continuation application of U.S. patent application Ser. No. 14/512,095, entitled “OPTOELECTRONIC SEMICONDUCTOR DEVICE”, filed on Oct. 10, 2014, which is a continuation application of U.S. patent application Ser. No. 12/984,169, entitled “OPTOELECTRONIC SEMICONDUCTOR DEVICE”, filed on Jan. 4, 2011, which is a continuation application of U.S. patent application Ser. No. 12/230,203, entitled “OPTOELECTRONIC SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF”, filed on Aug. 26, 2008 claiming the right of priority based on Taiwan application Ser. No. 096131956, filed Aug. 27, 2007; the contents of which are incorporated herein by reference in their entirety.
TECHNICAL FIELDThe invention relates to an optoelectronic semiconductor device, and more particularly to an optoelectronic semiconductor device having a plurality of electrical connectors extending into a conductive layer.
DESCRIPTION OF BACKGROUND ARTA well known structure of light-emitting diodes includes a growth substrate, n-type semiconductor layer, p-type semiconductor layer, and a light-emitting layer between the two semiconductor layers. A reflector for reflecting light from the light-emitting layer is also optionally formed in the structure. In some cases, to improve at least one of optical, electrical, and mechanical characteristics of the light-emitting diode, a well-selected material is used to replace the growth substrate and as a carrier to support the remaining structure without the growth substrate. For example, metal or silicon is used to replace sapphire substrate on which nitride is grown. The growth substrate is removed by etching, lapping, laser removal, etc. In addition, a transparent oxide can be adopted into the light-emitting diode to improve the current spreading.
There are several approaches to form an ohmic contact between the replacing carrier and the growth substrate. One of related materials can be referred to E. Fred Schubert, “Light-Emitting Diodes” chapter 9 (2006). Furthermore, the light-emitting diode finished products are made after being diced from a wafer; therefore, a suitable means used to protect semiconductor layers during the dicing process also becomes a notable issue. A usual protection means is a passivation layer formed on side walls of the semiconductor layer before dicing, but a careful control must be carried in each relevant step to avoid negative impact of forming the passivation layer.
SUMMARY OF THE DISCLOSUREAn optoelectronic semiconductor device comprising: a semiconductor system comprises an upper surface, an interfacial layer comprises a upper interfacial layer on the upper surface of the semiconductor system, and the upper interfacial layer comprises a first wavelength converting material; and a void region in the upper interfacial layer, and a material different from that of the upper interfacial layer fills in the void region.
The embodiments are described hereinafter in accompany with drawings.
As shown in
An exemplary light-emitting diode has a structure including at least two semiconductor layers having different electric properties, polarities, or dopants, and a light-emitting layer (or called “active layer”) between the two semiconductor layers. A light-emitting spectrum of the light-emitting diode can be adjusted by modifying the composition of the constructed material. The common available material includes AlGaInP series, AlGaInN series, and ZnO series. In addition, the light-emitting layer can be formed in a structure such as single heterostructure (SH), double heterostructure (DH), double-side double heterostructure (DDH), or multi-quantum well (MQW). The light-emitting wavelength can be further modified by changing the pair number of the multi-quantum well. The temporary substrate 11 is used to grow or support semiconductor system 12. The suitable material of the temporary substrate 11 includes but not limited to Ge, GaAs, InP, sapphire, SiC, Si, LiAlO2, ZnO, GaN, glass, composite, diamond, CVD diamond, and diamond-like carbon (DLC).
After the semiconductor system 12 is formed on the temporary substrate 11, a reflector 13 can be optionally formed to reflect light directly or indirectly form the light-emitting layer towards a specific direction. The reflector 13 is constructed by using metal such as Ag, Al, Au, Cu, and Ti, or distributed Bragg reflector (DBR). The reflector 13 can be formed on all or part of surfaces of the semiconductor system 12.
A first coupling layer 14 is formed to couple with the following device or structure after the reflector 13 is completed. The material adopted into the first coupling layer 14 depends on the selected technology. With metal bonding technology, the first coupling layer 14 can be formed by material such as In, Pd, Au, Cr, or alloy thereof. With glue bonding technology, the first coupling layer 14 can be formed by material such as epoxy, benzocyclobutene (BCB), or SU-8 photo resistor. With eutectic bonding technology, the first coupling layer 14 is formed by material including but not limited to Au, Sn, In, Ge, Zn, Be, and Si.
The semiconductor system 12 and the layers covering thereon are then etched by inductively coupled plasma (ICP) or other suitable dry etching technology until a part of the temporary substrate 11 is exposed. For example, the semiconductor system 12 and the covering layers like the reflector 13 and the first coupling layer 14 are removed to form a rim, as shown in
An electrical conductor 16 is provided to have a second coupling layer 17 and electrical connectors 18 disposed thereon. The electrical conductor 16 is used to carry the semiconductor system 12, functions as a current channel, and is robust enough to form a stable structure. The electrical conductor 16 is formed by conductive material such as Ge, GaAs, InP, SiC, Si, LiAlO2, ZnO, GaN, Cu, and Al. The electrical conductor 16 can be a separate structure as shown in
The material of the second coupling layer 17 can refer to the first coupling layer 14 mentioned in the above description. Moreover, the material of the second coupling layer 17 can be different from or the same as that of the first coupling layer 14. Other than the embodiments in each drawing, the first coupling layer 14 and the second coupling layer 17 can be used alternatively. The material of the electrical connector 18 is such as In, Sn, Al, Ag, Au/Be, Au/Ge, Au/Zn, Ni, Pd, Pb/Sn, Pd, Pt, Zn, Ge, Ti, Cu, or Cr. Besides, provided one kind of material or structure can meet the required specifications of three or any two of the electrical connector 16, the second coupling layer 17, and the electrical connector 18, the corresponding parts can be integrated into one unit.
The interfacial layer 15 and the second coupling layer 17 are brought to connect when the aforementioned preparations are finished. In the case, the electrical connectors 18 are pressed into the interfacial layer 15, and at least part of the electrical connectors 18 passes through the interfacial layer 15 and electrically connects to the first coupling layer 14, as shown in
The temporary substrate 11 is then removed by wet etching, dry etching, mechanical polishing, or laser removal. After that, an upper electrode 22 and a lower electrode 23 are formed on the semiconductor system 12 and the electrical conductor 16 respectively. In addition, the lower electrode 23 can be formed on electrical conductor 16 before the semiconductor system 12 and the electrical conductor 16 are coupled together. Furthermore, the electrical conductor 16 can also function as an electrode provided it has necessary characteristics of an electrode. Therefore, it is not necessary to form the lower electrode 23 on the device 10. If the optoelectronic device 10 is provided as a “wafer” level, the wafer has to be cut in order to bring the optoelectronic device 10 into a single dice level. The structure out of the foregoing processes is shown in
The interfacial layer 15 is interposed between and integrates the first coupling layer 14 and the second coupling layer 17, and further covers on the side surface of the semiconductor system 12 to protect the system 12 from being damaged during the following manufacturing processes. In addition, if the refraction index of the interfacial layer 15 is between the semiconductor system 12 and the environmental medium, light from the semiconductor system 12 is not easily total-reflected in a presence of a great change among the refractive indices.
In another embodiment, the electrical connector 18 even penetrates into the first coupling layer 14 by means of elongating the electrical connector 18 or compressing the interfacial layer 15 to reduce the thickness thereof. As shown in
As shown in
As shown in
Another embodiment is shown in
In the foregoing embodiments, the reflector 13 may be omitted from the device 10 if the first coupling layer 14 is made of a reflective material such as Au or Ag. In the case, the reflecting and coupling functions are unified into a single structure like the first coupling layer 14.
One consideration of arranging the electrical connector 18 is how to form a uniform current density among the semiconductor system 12. In a common circumstance, current is injected into the semiconductor system 12 from the electrode 22 and left through the electrode 23 along the shortest electrical passage. Therefore, the area of the semiconductor system 12 beneath the electrode 22 usually has higher current density, which is called “current crowding” effect. In other words, more photons are created in the area beneath the electrode 22. However, those photons are often absorbed, reflected, or scattered by the electrode 22, and become useless. Under the electrode 22, instead of the electrical connector 18, an insulating region 19A is therefore formed on the semiconductor system 10 as shown in
Furthermore, in another embodiment of present invention, as shown in
In
In another embodiment of present invention, an insulating region 19B is further formed between the reflector 13 over the insulating region 19A, and the semiconductor system 12 for a better current spreading result. The insulating region 19B is identical to or different from the interfacial layer 15, or can even constructed by a structure as long as it is able to obstruct or decrease current flowing through the region, rather than a structure entirely made by insulating material. The insulating region 19A of present embodiment does not necessarily coexist with the insulating region 19B, that is, the electrical connector 18 can be still formed under the insulating region 19B. Moreover, the top surface of the insulating region 19B is formed in a geometric pattern including but not limited to flat plane, rough surface, textured surface, and even ridged surface as shown in the drawing. Provided the ridged surface is reflective, light from the semiconductor system 12 is reflected outwardly by the ridged surface, and light is consequently absorbed by the electrode 22 with lower probability.
The other embodiments of present invention are shown in
As shown in
The upper interfacial layer 15A of the optoelectronic semiconductor device 10 of
Another embodiment of present invention is illustrated in
The optoelectronic semiconductor device 10 in accordance with another embodiment is illustrated in
The foregoing description has been directed to the specific embodiments of this invention. It will be apparent; however, that other alternatives and modifications may be made to the embodiments without escaping the spirit and scope of the invention.
Claims
1. An optoelectronic semiconductor device, comprising:
- a semiconductor system comprises an upper surface,
- an interfacial layer comprises a upper interfacial layer on the upper surface of the semiconductor system, and the upper interfacial layer comprises a first wavelength converting material; and
- a void region in the upper interfacial layer, and a material different from that of the upper interfacial layer fills in the void region.
2. The optoelectronic semiconductor device of claim 1, further comprises a plurality of electrical connectors dispose on a bottom surface of the semiconductor system which is opposite to the upper surface, and the plurality of electrical connectors electrically connect to the semiconductor system.
3. The optoelectronic semiconductor device of claim 1, wherein the material filled in the void region comprises a second wavelength converting material different from the first wavelength converting material.
4. The optoelectronic semiconductor device of claim 1, wherein the semiconductor system comprises a side surface connecting to the upper surface, and the interfacial layer comprises a side interfacial layer connecting to the upper interfacial layer, wherein the side interfacial layer covers the side surface of the semiconductor system.
5. The optoelectronic semiconductor device of claim 4, wherein the side interfacial layer comprises a third wavelength converting material different from the first wavelength converting material.
6. The optoelectronic semiconductor device of claim 1, wherein the material fills in the void region comprises air, insulating material, or indium tin oxide.
7. The optoelectronic semiconductor device of claim 1, wherein the upper interfacial layer is patterned to set a distribution boundary of the first wavelength converting material.
8. The optoelectronic semiconductor device of claim 1, further comprises a reflector disposes on a bottom surface of the semiconductor system which is opposite to the upper surface.
9. The optoelectronic semiconductor device of claim 1, wherein the upper interfacial layer comprises an insulating material, and the first wavelength converting material disperses in the insulating material.
10. The optoelectronic semiconductor device of claim 1, further comprises a upper electrode on the upper surface of the semiconductor system, and a transparent conductive material filled in the void region physically connects to the upper electrode.
11. An optoelectronic semiconductor device, comprising:
- a semiconductor system comprises a upper surface and side surface connecting to the upper surface,
- an upper interfacial layer on the upper surface of the semiconductor system, and the upper interfacial layer comprises a first wavelength converting material; and
- a side interfacial layer on the side surface of the semiconductor system, and the side interfacial layer comprises a second wavelength converting material different from the first wavelength converting material.
12. The optoelectronic semiconductor device of claim 11, further comprises a void region in the upper interfacial layer, and a material different from that of the upper interfacial layer fills in the void region.
13. The optoelectronic semiconductor device of claim 11, further comprises a plurality of electrical connectors dispose on a bottom surface of the semiconductor system which is opposite to the upper surface, and the plurality of electrical connectors electrically connect to the semiconductor system.
14. The optoelectronic semiconductor device of claim 12, wherein the material filled in the void region comprises a third wavelength converting material different with the first wavelength converting material.
15. The optoelectronic semiconductor device of claim 12, wherein the material fills in the void region comprises air, insulating material, or indium tin oxide.
16. The optoelectronic semiconductor device of claim 11, wherein the upper interfacial layer is patterned to set a distribution boundary of the first wavelength converting material.
17. The optoelectronic semiconductor device of claim 11, further comprises a reflector disposes on a bottom surface of the semiconductor system which is opposite to the upper surface.
18. The optoelectronic semiconductor device of claim 12, wherein the upper interfacial layer comprises an insulating material, and the first wavelength converting material disperses in the insulating material.
19. The optoelectronic semiconductor device of claim 12, further comprises a upper electrode on the upper surface of the semiconductor system, and a transparent conductive material filled in the void region physically connects to the upper electrode.
20. The optoelectronic semiconductor device of claim 11, wherein the semiconductor system further comprises a bottom surface of the semiconductor system which is opposite to the upper surface, and a bottom interfacial layer comprising the second wavelength converting material locates on the bottom surface.
Type: Application
Filed: Nov 23, 2016
Publication Date: Mar 16, 2017
Inventors: Chih-Chiang LU (Hsinchu), Wei-Chih PENG (Hsinchu), Shiau-Huei SAN (Hsinchu), Min-Hsun HSIEH (Hsinchu)
Application Number: 15/360,177