METHODS OF MAKING SEMICONDUCTOR DEVICE MODULES WITH INCREASED YIELD
Methods of making semiconductor device modules may involve forming holes in a sacrificial material and placing an electrically conductive material in the holes. The sacrificial material may be removed to expose posts of the electrically conductive material. A stack of semiconductor dice may be placed between at least two of the posts after removing the sacrificial material, one of the semiconductor dice of the stack including an active surface facing in a direction opposite a direction in which another active surface of another of the semiconductor dice of the stack. The posts and the stack of semiconductor dice may be at least laterally encapsulated in an encapsulant. Bond pads of the one of the semiconductor dice may be electrically connected to corresponding posts after at least laterally encapsulating the posts and the stack of semiconductor dice.
This disclosure relates generally to semiconductor device modules and methods of making semiconductor device modules. More specifically, disclosed embodiments relate to methods of making semiconductor device modules that may increase yield, reduce warpage, and improve reliability.
While this disclosure concludes with claims particularly pointing out and distinctly claiming specific embodiments, various features and advantages of embodiments within the scope of this disclosure may be more readily ascertained from the following description when read in conjunction with the accompanying drawings, in which:
The illustrations presented in this disclosure are not meant to be actual views of any particular semiconductor device, semiconductor device module, component thereof, or act in a process of making a semiconductor device module, but are merely idealized representations employed to describe illustrative embodiments. Thus, the drawings are not necessarily to scale.
Disclosed embodiments relate generally to methods of making semiconductor device modules that may increase yield, reduce warpage, and improve module reliability. More specifically, disclosed are embodiments of methods of making semiconductor device modules that may involve the formation of electrically conductive posts that are subsequently exposed and connected to a semiconductor device.
Referring to
The support substrate 104 may be sized and shaped to structurally reinforce the sacrificial material 102. The support substrate 104 may include, for example, a material with sufficient rigidity to support the overlying sacrificial material 102. More specifically, the support substrate 104 may include, for example, a semiconductor material or a ceramic material. As a specific, nonlimiting example, the support substrate 104 may include a glass material.
The sacrificial material 102 may be secured to the support substrate 104 by a temporary bonding material 108. The temporary bonding material 108 may include at least a first material 110 configured to temporarily secure the sacrificial material 102 to the support substrate 104. The first material 110 may include, for example, a polymeric material. More specifically, the first material 110 may include, for example, an adhesive material. As a specific, nonlimiting example, the first material 110 may include, for example, an ultraviolet-light-curable or a heat-curable adhesive material. The first material 110 of the temporary bonding material 108 may be interposed between the sacrificial material 102 and the support substrate 104. For example, the first material 110 may be in direct contact with the upper surface 106 of the support substrate 104 facing the sacrificial material 102.
In some embodiments, such as that shown in
The intermediate product 100 may be formed by, for example, placing the temporary bonding material 108 on the upper surface 106 of the support substrate 104 and forming the sacrificial material 102 on the preformed and already-placed temporary bonding material 108. As another example, the intermediate product 100 may be formed by forming the temporary bonding material 108 on the upper surface 106 of the support substrate 104 and placing the lower surface 114 of a preformed mass of the sacrificial material 102 in contact with the temporary bonding material 108.
The intermediate product 100 may be scalable. For example, the intermediate product 100 may initiate a process for forming a single semiconductor device module, multiple semiconductor device modules in a line, or multiple semiconductor device modules in an array.
A height H of each hole 118 may be, for example, between about 10 microns and about 200 microns. More specifically, the height H of each hole 118 may be, for example, between about 50 microns and about 200 microns. As a specific, nonlimiting example, the height H of each hole 118 may be, for example, between about 100 microns and about 200 microns (e.g., about 150 microns). A width W of each hole 118 may be, for example, between about 10 microns and about 90 microns. More specifically, the width W of each hole 118 may be, for example, between about 20 microns and about 50 microns.
The holes 118 may be formed by, for example, applying a mask to the upper surface 120 of the sacrificial material 102 and removing material from exposed portions of the sacrificial material 102 not covered by the mask by exposure to light of a predetermined wavelength (e.g., ultraviolet light) or by etching. As additional examples, the holes 118 may be formed by drilling (e.g., laser drilling) or via exposure to a solvent.
In embodiments in which the temporary bonding material 108 includes the second material 112, the electrically conductive material 124 may contact and be temporarily secured to at least the second material 112 of the temporary bonding material 108. For example, the electrically conductive material 124 may bond with the second material 112.
The electrically conductive material 124 may be positioned in the holes 118 by, for example, electroplating, electroless plating, sputtering, or other process. Positioning the electrically conductive material 124 in the holes 118 may occur before any electrical connections intended to be present in the semiconductor device module have been formed, which may reduce the likelihood that that conditions under which the electrically conductive material 124 is positioned in the holes 118 would weaken, damage, or disconnect such connections. As a result, a greater quantity of the resulting semiconductor device modules may be operational, increasing yield.
Each stack 134 may include at least two semiconductor dice 136 and 138. For example, each stack 134 may include a first semiconductor die 136 located proximate the support substrate 104 and a second semiconductor die 138 located on a side of the first semiconductor die 136 opposite the support substrate 104. A first active surface 140 of the first semiconductor die 136 may face the support substrate 104, and be in contact with the temporary bonding material 108. A second active surface 142 of the second semiconductor die 138 may face in a direction opposite the direction in which the first active surface 140 faces. For example, the second active surface 142 of the second semiconductor die 138 may be located on a side of the second semiconductor die 138 opposite the first semiconductor die 136. The first semiconductor die 136 may be secured to the second semiconductor die 138 by a bonding material 145 located between the first semiconductor die 136 and the second semiconductor die 138. More specifically, the bonding material 145 may be, for example, located between, and in direct contact with, a first inactive surface 141 of the first semiconductor die 136 and a second inactive surface 143 of the second semiconductor die 138. Each of the first active surface 140 and the second active surface 142 may include bond pads 144 configured to form electrical and operative connections. The first active surface 140 of the first semiconductor die 136 and the second active surface 142 of the second semiconductor die 138 may include integrated circuitry embedded therein, the integrated circuitry being electrically and operatively connected to the bond pads 144. For example, the first semiconductor die 136, the second semiconductor die 138, or both the first semiconductor die 136 and the second semiconductor die 138 may be configured as a logic chip or a memory chip.
Placement of the stacks 134 of semiconductor dice 136 and 138 may be performed using, for example, a pick-and-place operation as is known in the art.
Electrically connecting the second semiconductor die 138 via the posts 130 and electrical connectors 160 may be less costly and more reliable than conventional methods of electrically connecting similarly configured semiconductor dice to underlying structures. For example, each of forming through-silicon vias and forming wire bonds takes more time and expends more resources without producing a significantly lower failure rate than the methods disclosed herein. As a result, the disclosed methods may save time and resources while maintaining or improving the reliability of electrical connections, increasing yield.
In some embodiments, a dielectric protective material 162, which may also be characterized as a passivation material, may be placed over at least the electrical connectors 160. For example, the protective material 162 may extend from a location located over the encapsulant 148 located laterally adjacent to a post 130 at a periphery of what will eventually form a given semiconductor device module, over the post 130 and its associated electrical connector 160, over the second active surface 138 of the second semiconductor die 130, over another electrical connector 160 and associated post 130, to at least another portion of the encapsulant 148 located laterally adjacent to the other post 130. More specifically, the protective material 162 may extend from a location located over the encapsulant 148 located laterally adjacent to a post 130 at a periphery of what will eventually form a given semiconductor device module, over the post 130 and its associated electrical connector 160, over each stack 134 of semiconductor dice 136 and 138 to be included in the semiconductor device module, over another electrical connector 160 and associated post 130 at an opposite periphery of what will eventually form the given semiconductor device module, to at least another portion of the encapsulant 148 located laterally adjacent to another post 130 on a side of what will eventually form the given semiconductor device module opposite where the protective material 162 started. The protective material 162 may include, for example, a polymer material.
After placing the other encapsulant 166, the ninth stage may further involve removing the support substrate 104 (see
In addition, the ninth stage may involve securing another support substrate 168 to the other encapsulant 166 on a side of the other encapsulant 166 opposite the stacks 134 of semiconductor dice 136 and 138. For example, another temporary bonding material 170 may be positioned over the other encapsulant 166 on a side of the other encapsulant 166 opposite the protective material 162, and the other support substrate 168 may be placed in contact with the other temporary bonding material 170 to secure the other support substrate 168 to the other encapsulant 166. The other support substrate 168 and the other temporary bonding material 170 may be selected from the materials described previously in connection with the first support substrate 104 and temporary bonding material 108, and may include the same materials as, or different materials from, the actual materials used for the first support substrate 104 and temporary bonding material 108. The assembly may then be inverted, supported by the other support substrate 168, for further processing.
Also during the tenth stage, bumps 184 of electrically conductive material may be placed on the bond pads 182 to enable the stacks 134 of semiconductor dice 136 and 138 to be operatively connected to another device or structure, for example higher-level packaging. For example, the bumps 184 may be configured as balls, posts, pillars, columns, studs, slugs, or other masses of electrically conductive material secured to the bond pads 182. As a specific, nonlimiting example, the bumps 184 may comprise a ball grid array of solder balls.
The resulting semiconductor device module 186 may include a redistribution layer 174 including bond pads 182 electrically connected to bumps 184 of electrically conductive material on a first side of the redistribution layer 174 and contacts 176 and 178 of electrically conductive material on a second, opposite side of the redistribution layer. Bumps 184 of electrically conductive material may be secured to the bond pads 182. A first set of the contacts 176 may be secured to bond pads 144 of a first semiconductor die 136 of each stack 134 of semiconductor dice 136 and 138 in the semiconductor device module 186. A second set of the contacts 178 may be secured to posts 130 extending at least partially through an encapsulant 148 laterally surrounding the stacks 134 of semiconductor dice 136 and 138, the posts 130 extending in a direction at least substantially perpendicular to a first active surface 140 of the first semiconductor die 136. Respective posts 130 may be electrically connected to bond pads 144 of a second semiconductor die 138 of the stack 134 via electrical connectors 160 extending laterally over the encapsulant 148. A second active surface 142 of the second semiconductor die 138 may face in a direction opposite a direction in which the first active surface 140 faces. The electrical connectors 160 may be covered by a protective material 162, which may, in turn, be covered by another encapsulant 166. The semiconductor device module 186 may be operatively connected to another device by contacting the bumps 184 to corresponding bond pads and reflowing the bumps 184 to form an electrical connection.
Semiconductor device modules in accordance with this disclosure may enable better control over the height and width of systems into which they are incorporated. In addition, such semiconductor device modules may reduce process variation. Semiconductor device modules in accordance with this disclosure may further reduce or eliminate the necessity of forming through-silicon-vias and wirebonds to form electrical connections across semiconductor devices. Moreover, the posts described herein may increase throughput and maintain better signal quality that through-silicon-vias and wirebonds. Finally, the modules may enable better quality control through both the processing required to generate them and the ability to test complete modules before they are integrated with a system.
As an illustrative summary, methods of making semiconductor device modules may involve forming holes in a sacrificial material and placing an electrically conductive material in the holes. The sacrificial material may be removed to expose posts of the electrically conductive material. A stack of semiconductor dice may be placed between at least two of the posts after removing the sacrificial material, one of the semiconductor dice of the stack including an active surface facing in a direction opposite a direction in which another active surface of another of the semiconductor dice of the stack. The posts and the stack of semiconductor dice may be at least laterally encapsulated in an encapsulant. Bond pads of the one of the semiconductor dice may be electrically connected to corresponding posts after at least laterally encapsulating the posts and the stack of semiconductor dice.
As another illustrative summary, methods of making semiconductor device modules may involve forming holes in a sacrificial material and forming posts of an electrically conductive material in the holes. The sacrificial material may be removed to expose the posts of the electrically conductive material. Stacks of semiconductor dice may be placed between respective sets of corresponding posts after removing the sacrificial material, each stack comprising two semiconductor dice having active surfaces facing away from one another. The posts and the stacks of semiconductor dice may be at least laterally encapsulated in an encapsulant. Material of at least the encapsulant may be removed to a predetermined thickness. Bond pads of one of the semiconductor dice of each stack may be electrically connected to the corresponding posts of the respective set after removing material of at least the encapsulant to the predetermined thickness.
As yet another illustrative summary, semiconductor device modules may include a redistribution layer and a first semiconductor die located on the redistribution layer, a first active surface of the first semiconductor die facing the redistribution layer. A second semiconductor die may be located on the first semiconductor die, a second active surface of the second semiconductor die facing away from the first semiconductor die. Posts may be located laterally adjacent to the first semiconductor die and the second semiconductor die, the posts extending from the redistribution layer to at least a location coplanar with the second active surface. A first encapsulant may at least laterally surround the first semiconductor die, the second semiconductor die, and the posts. Electrical connectors may extend laterally from the posts, over the first encapsulant, to bond pads on the second active surface of the second semiconductor die. A second encapsulant may be located over the electrical connectors. Conductive bumps may be connected to the redistribution layer on a side of the redistribution layer opposite the first semiconductor die.
As still another illustrative summary, systems may include a processor configured to receive input and generate output and a semiconductor device module operatively connected to the processor. The semiconductor device module may include a first semiconductor die located on the redistribution layer, a first active surface of the first semiconductor die facing the redistribution layer. A second semiconductor die may be located on the first semiconductor die, a second active surface of the second semiconductor die facing away from the first semiconductor die. Posts may be located laterally adjacent to the first semiconductor die and the second semiconductor die, the posts extending from the redistribution layer to at least a location coplanar with the second active surface. A first encapsulant may at least laterally surround the first semiconductor die, the second semiconductor die, and the posts. Electrical connectors may extend laterally from the posts, over the first encapsulant, to bond pads on the second active surface of the second semiconductor die. A second encapsulant may be located over the electrical connectors. Conductive bumps may be connected to the redistribution layer on a side of the redistribution layer opposite the first semiconductor die, the conductive bumps operatively connecting the semiconductor device module to the processor.
While certain illustrative embodiments have been described in connection with the figures, those of ordinary skill in the art will recognize and appreciate that the scope of this disclosure is not limited to those embodiments explicitly shown and described in this disclosure. Rather, many additions, deletions, and modifications to the embodiments described in this disclosure may be made to produce embodiments within the scope of this disclosure, such as those specifically claimed, including legal equivalents. In addition, features from one disclosed embodiment may be combined with features of another disclosed embodiment while still being within the scope of this disclosure, as contemplated by the inventors.
Claims
1. A method of making a semiconductor device module, comprising:
- forming holes in a sacrificial material;
- placing an electrically conductive material in the holes;
- removing the sacrificial material to expose posts of the electrically conductive material;
- placing a stack of semiconductor dice between at least two of the posts after removing the sacrificial material, one of the semiconductor dice of the stack including an active surface facing in a direction opposite a direction in which another active surface of another of the semiconductor dice of the stack;
- at least laterally encapsulating the posts and the stack of semiconductor dice in an encapsulant; and
- electrically connecting bond pads of the one of the semiconductor dice to corresponding posts after at least laterally encapsulating the posts and the stack of semiconductor dice.
2. The method of claim 1, further comprising placing a redistribution layer in electrical communication with bond pads of the other of the semiconductor dice of the stack after at least laterally encapsulating the posts and the stack of semiconductor dice in the encapsulant.
3. The method of claim 1, wherein placing the stack of semiconductor dice between the corresponding posts after removing the sacrificial material comprises placing the stack of semiconductor dice on a redistribution layer and electrically connecting bond pads of the other of the semiconductor dice of the stack with conductors of the redistribution layer before at least laterally encapsulating the posts and the stack of semiconductor dice in the encapsulant.
4. The method of claim 1, further comprising removing material of at least the encapsulant to expose the bond pads before electrically connecting the bond pads to the corresponding the posts.
5. The method of claim 1, further comprising placing a protective material over electrical connectors extending between the bond pads and the corresponding posts.
6. The method of claim 1, further comprising encapsulating the protective material in another encapsulant.
7. The method of claim 1, further comprising temporarily securing the sacrificial material to a support substrate before forming the holes in the sacrificial material.
8. The method of claim 7, wherein temporarily securing the sacrificial material to the support substrate comprises placing the sacrificial material over an adhesive material comprising a metal or metal alloy material and located on the support substrate.
9. The method of claim 8, wherein placing the electrically conductive material in the holes comprises placing the electrically conductive material in contact with at least the metal or metal alloy material.
10. The method of claim 7, further comprising removing the support substrate after at least laterally encapsulating the posts and the stack of semiconductor dice.
11. The method of claim 1, further comprising temporarily securing the sacrificial material to a redistribution layer before forming the holes in the sacrificial material.
12. The method of claim 11, wherein forming the holes in the sacrificial material comprises exposing electrical conductors of the redistribution layer within the holes and wherein placing the electrically conductive material in the holes comprises electrically connecting the electrically conductive material to the electrical conductors in the holes.
13. The method of claim 12, wherein removing the sacrificial material comprises exposing additional electrical conductors of the redistribution layer and wherein placing the stack of semiconductor dice between the corresponding posts comprises electrically connecting other bond pads of the other of the semiconductor dice of the stack to the additional electrical conductors.
14. The method of claim 11, further comprising removing the support substrate after electrically connecting the bond pads of the one of the semiconductor dice to the corresponding posts.
15. A method of making a semiconductor device module, comprising:
- forming holes in a sacrificial material;
- forming posts of an electrically conductive material in the holes;
- removing the sacrificial material to expose the posts of the electrically conductive material;
- placing stacks of semiconductor dice between respective sets of corresponding posts after removing the sacrificial material, each stack comprising two semiconductor dice having active surfaces facing away from one another;
- at least laterally encapsulating the posts and the stacks of semiconductor dice in an encapsulant;
- removing material of at least the encapsulant to a predetermined thickness; and
- electrically connecting bond pads of one of the semiconductor dice of each stack to the corresponding posts of the respective set after removing material of at least the encapsulant to the predetermined thickness.
16. The method of claim 15, further comprising placing conductors of a redistribution layer in electrical communication with bond pads of the other of the semiconductor dice of at least two of the stacks after at least laterally encapsulating the posts and the stacks of semiconductor dice in the encapsulant.
17. The method of claim 15, wherein placing the stacks of semiconductor dice between the respective sets of the corresponding posts after removing the sacrificial material comprises placing at least two stacks of semiconductor dice on a redistribution layer and electrically connecting bond pads of the other of the semiconductor dice of the at least two of the stacks with the conductors of the redistribution layer before at least laterally encapsulating the posts and the stacks of semiconductor dice in the encapsulant.
18. The method of claim 15, further comprising temporarily securing the sacrificial material to a support substrate before forming the holes in the sacrificial material.
19. The method of claim 15, further comprising temporarily securing the sacrificial material to a redistribution layer before forming the holes in the sacrificial material.
20. The method of claim 19, wherein forming the holes in the sacrificial material comprises exposing electrical conductors of the redistribution layer within the holes and wherein forming posts of the electrically conductive material in the holes comprises electrically connecting the posts to the electrical conductors.
21-22. (canceled)
Type: Application
Filed: Jul 26, 2017
Publication Date: Jan 31, 2019
Inventors: Ashok Pachamuthu (Boise, ID), Chan H. Yoo (Boise, ID), Szu-Ying Ho (Irvine, CA), John F. Kaeding (Boise, ID)
Application Number: 15/660,442