ELECTRONIC DEVICE IMAGE SENSOR
An electronic device includes a substrate semiconductor wafer with semiconductor portions separated from one another by through-passages. Electronic circuits and a dielectric layer with a network of electrical connections are formed at a front face of the substrate semiconductor wafer. Electrically conductive fillings are contained within the through-passages and are connected to the network of electrical connections. Interior dielectric layers for anti-diffusion protection are provided in the through-passages between the electrically conductive fillings and the semiconductor portions. Back side dielectric layers are joined to the interior dielectric layers.
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This application claims the priority benefit of French Application for Patent No. 1761836, filed on Dec. 8, 2017, the content of which is hereby incorporated by reference in its entirety to the maximum extent allowable by law.
TECHNICAL FIELDVarious embodiments relate to the field of electronic devices and, in particular, to image sensors.
BACKGROUNDCurrently, such devices are obtained by fabricating electronic circuits and a dielectric layer including a network of electrical connections on a front face of a substrate wafer and by subsequently forming trenches in the substrate wafer starting from the back face of the latter, these trenches then being filled with a metal.
SUMMARYAccording to one embodiment, an electronic device, image sensor, is provided which comprises: a semiconductor substrate wafer having a front face and a back face and comprising portions separated from one another forming through-passages; electronic circuits and a dielectric layer including a network of electrical connections that is situated on top of the front face of the substrate wafer; electrically conductive fillings connected to the network of electrical connections that are contained within the through-passages and running toward the back from the front face; and dielectric layers for anti-diffusion of the metal of the fillings into the semiconductor substrate wafer, these anti-diffusion layers comprising interior layers that are situated between the sides of the portions of the semiconductor substrate wafer and the fillings and back layers joined to the interior layers.
The dielectric anti-diffusion layers may comprise back layers covering the back faces of the portions of the substrate wafer and attached to the interior layers.
The dielectric anti-diffusion layers may comprise back layers within the through-passages which are attached to the interior layers.
The back layers may have local back cavities containing local additional layers of a metal.
The local additional layers of metal contained within the cavities may be attached to the tungsten layers of the fillings.
The local additional layers of metal contained within the cavities may have portions aligned with the through-passages and may be separated from metal layers of the fillings by local additional insulating layers in back portions of the through-passages.
The fillings may comprise front layers of polysilicon and back layers of a metal.
The fillings may comprise back parts made of tungsten.
The fillings of the through-passages may comprise front parts made of doped polysilicon.
The fillings may comprise back parts made of doped polysilicon.
The dielectric anti-diffusion layers may be of silicon oxide.
A method is also provided for fabrication of an electronic device, which comprises: forming deep main grooves in a thick bulk substrate wafer, starting from a front face of this wafer, these deep main grooves running in longitudinal and transverse directions and intersecting one another; forming dielectric anti-diffusion layers against the sides and bases of the deep grooves and temporary fillings within secondary grooves formed in these dielectric layers; fabricating electronic circuits and a dielectric layer, including a network of electrical connections, on top of the front face of the substrate wafer, this network being electrically connected to the temporary fillings; thinning the thick substrate wafer starting from its back face down to the back faces of the temporary fillings, removing the back parts of the dielectric layers, so as to obtain the interior anti-diffusion layers and the portions of the substrate wafer; removing the temporary fillings;
and forming the back anti-diffusion layers.
The method may comprise the following steps: after obtaining the interior layers, continue with the thinning of the thick substrate wafer until the portions of the substrate wafer are obtained; and forming the back layers of the dielectric anti-diffusion layers on the back faces of the portions of the substrate wafer, attached to the interior layers.
The method may comprise the following step: replacing back parts of the temporary fillings with back anti-diffusion layers in the through-passages.
The method may comprise the following step: forming back cavities in the back layers and filling these cavities with a metal.
Electronic devices, image sensors, and modes of fabrication will now be described by way of non-limiting examples, illustrated by the drawings in which:
According to one embodiment illustrated in
The substrate wafer 2 comprises a plurality of semiconductor portions 5 separated from one another by main through-passages 6 which pass through the substrate wafer 2 from one face to the other and which run in a longitudinal and transverse direction intersecting one another. The portions 5 are at equal distances from one another in such a manner that the portions 5 have a disposition in the form of a square, rectangular, hexagonal, or more complex mosaic.
The sides 7 of the portions 5, situated within the main through-passages 6, and the back faces 8 of the portions 5, situated on the back side 4, are respectively covered by interior dielectric anti-diffusion layers 9 and by back dielectric anti-diffusion layers 10 which are joined together. The interior layers 9 respectively go around the portions 5. Secondary through-passages 11 pass through the substrate wafer 2, between the interior layers 9 respectively of the portions 5 and run in a longitudinal and transverse direction intersecting one another. The interior dielectric layers 9 and the back dielectric layers 10 are for example made of silicon oxide.
The secondary through-passages 11 are filled with a filling 12 that is made of at least one electrically conductive material. The conductive fillings 12 run in the form of longitudinal and transverse bars intersecting one another.
The front faces 13 of the interior dielectric layers 9 and the front face 14 of the conductive fillings 12 are co-planar with the front faces 15 of the portions 5, situated on the front side 3 of the substrate wafer 2. The back face 16 of the conductive fillings 12 is co-planar with the back faces 17 of the back dielectric layers 10.
Advantageously, the conductive fillings 12 comprise front parts 12a, forming electrically conductive front plugs, for example made of a doped polysilicon and back parts 12b made of metal, for example of tungsten. Nevertheless, the back parts 12b could be of copper or of another metal.
Locally, on the front side 3 of the substrate wafer 2, the electronic device 1 comprises electronic integrated circuits 18 situated and formed only on and in the front faces 15 of the portions 5, these electronic circuits 18 including transistors and photodiodes. The electronic circuits 18 do not extend over the local longitudinal and transverse regions, including the main through-passages 6.
Over the entirety of the front side 3 of the substrate wafer 2, the electronic device 1 comprises a front layer 19 of a dielectric material including a network of electrical connections 20 which comprises several metal levels selectively connected together.
The network 20 is selectively connected to the electronic circuits 18 and is connected to the conductive fillings 12, more particularly to the front face of the front part 12a. On the front external face 21 of the front layer 19, front lugs 22 are provided with a view to making external electrical connections to the device 1.
The electronic device 1 which has just been described forms an image sensor designed to sense the light reaching its back face, which include the associated electronic circuits 18 as well as vertical MOS capacitors which are defined in the main through-passages 6, forming pixels intended to define a matrix digital image.
By virtue of the dispositions of the electronic device 1 described hereinabove, a passivation of the internal interfaces and a mutual isolation between the pixels are obtained.
Furthermore, the back parts 12b of the conductive fillings 12 and the portions 5 of the substrate wafer 2 do not both at the same time have exposed surfaces or regions, in such a manner that the metal (for example, tungsten) forming the back parts 12b of the conductive fillings 12 cannot contaminate the semiconductor material (for example, silicon) forming the portions 5 of the substrate wafer 2 owing to the existence of the interior dielectric layers 9 and of the back dielectric layers 10 which form diffusion barriers. Furthermore, the back parts 12b form screens against the light.
The electronic device 1 may be fabricated in the following manner.
As illustrated in
Starting from its front side 3 and using a front reference for a front position, main longitudinal and transverse blind grooves 6A intersecting one another have been formed in the substrate wafer 2A, placed at the locations of the main through-passages 6 to be obtained and deeper than the thickness of the portions 5 to be obtained.
Inside the main grooves 6A, interior dielectric layers 9A are formed, which cover the sides and the base of the main grooves 6A, forming secondary longitudinal and transverse blind grooves 11A whose depth is greater than the thickness of the portions 5 to be obtained. Within the secondary grooves 11A, starting from the base and up to the front side 3, parts 12B made of a temporary material, for example a nitride of silicon, and parts 12a made of doped polysilicon are formed. According to another example, the parts 12B may be made of germanium.
The electronic circuits 18 and the front layer 19 including the network of electrical connections 20 are fabricated.
This having been done, as illustrated in
Then, starting from the device 1A, thinning of the silicon substrate wafer 2A is carried out, removing a thickness from its back part and the base of the interior dielectric layers 9A, until the back faces 16 of the parts 12B made of silicon nitride are reached, forming thick portions 5 of the substrate wafer 2 and the dielectric layers 9. This operation has been carried out by chemical-mechanical polishing.
Then, as illustrated in
Then, as illustrated in
Then, as illustrated in
Then, as illustrated in
Then, as illustrated in
Then, in order to obtain the electronic device 1 of
The bonding is definitive and the reinforcement constituted by the support plate 23, thus bonded, will serve as the mechanical support needed for the thinning step, then dicing, assembly and packaging.
According to another embodiment illustrated in
The back dielectric layers 10 do not exist, the back faces of the portions 5 of the substrate silicon wafer 2 being exposed.
The interior dielectric layers 9 have back faces 102 in the plane of the back faces 8 of the portions 5 of the substrate silicon wafer 2.
The tungsten back parts 12b of the conductive fillings 12 have back faces 103 that are recessed towards the front with respect to the back faces 8 of the portions 5 of the substrate wafer 2.
The back spaces of the secondary through-passages 11, behind the back faces 103, are filled with back dielectric anti-diffusion layers 104, for example of silicon oxide, which meet the interior dielectric layers 9 and which have back faces 105 situated in the plane of the back faces 8 of the portions 5 of the substrate silicon wafer 2. The back dielectric anti-diffusion layers 104 form back plugs within the secondary through-passages 11, behind the tungsten back parts 12b of the conductive fillings 12.
In a similar manner to the electronic device 1 described with reference to
The electronic device 101 may be fabricated in the following manner.
As illustrated in
Then, as illustrated in
Then, in order to obtain the electronic device 101 of
According to one variant embodiment, the back dielectric layers 104, forming back plugs in back portions of the secondary through-passages, could be of doped polysilicon.
According to another embodiment illustrated in
The back dielectric layers 10 have local back cavities 202 which are filled with back additional layers 203 of tungsten.
The local back cavities 202, and therefore the back additional layers 203, may have different dispositions.
According to the example shown, the local back cavities 202 extend behind the portions 8 of the substrate wafer 2, for example over an area corresponding to large parts of these portions 5. Since the local cavities 202 are separated from the secondary through-passages 11, the back additional layers 203 of tungsten are separated from the tungsten back parts 12b of the conductive fillings 12, in such a manner that the back additional layers 203 and the back parts 12b are electrically isolated.
According to another example (not shown), local back cavities 202 may extend as far as some of the secondary through-passages 11 such that the back additional layers 203 of tungsten meet tungsten back parts 12b of the conductive fillings 12, on one side or on either side, such that the back additional layers 203 and the back parts 12b are electrically connected. The back local additional layers 203 can then be electrically connected to other parts of the electronic device.
The back local additional layers 203, formed within the local back cavities 202, constitute a local optical masking. This optical masking is necessary in order to protect certain active regions (memory region of a pixel, single-shot pixel for example) from any undesirable illumination.
The electronic device 201 may be fabricated in the following manner.
As illustrated in
Then, as illustrated in
Then, as illustrated in
Then, in order to obtain the electronic device 201 of
According to another embodiment illustrated in
The back dielectric layers 10 have local back cavities 302 which are filled with back additional layers 303 of tungsten, in such a manner that these back local additional layers 303 have portions which extend behind and are aligned with the secondary through-passages 11. In a manner equivalent to what has been mentioned previously, these back additional layers 303 form back optical maskings.
Furthermore, the layers 12b of tungsten have back local faces 304 which are situated at a distance from back local additional layers 303 of tungsten.
Dielectric local layers 305, for example of silicon oxide, fill the gaps between the back local additional layers 303 and the back local faces 304, forming local plugs in local back portions 306 of the secondary through-passages 11, behind the back parts 12a of the conductive fillings 12.
Thus, the conductive fillings 12 and the back local additional layers 303 of tungsten, forming back optical maskings, are electrically isolated.
The electronic device 301 may be fabricated in the following manner.
As illustrated in
Then, as illustrated in
Then, in order to obtain the electronic device 301 of
According to other embodiments, electronic devices may comprise combinations of the dispositions of the electronic devices previously described.
Claims
1. An electronic device image sensor, comprising:
- a semiconductor wafer substrate having a front face and a back face and comprising semiconductor portions separated from one another by through-passages;
- electronic circuits located at the semiconductor portions and including electronic circuits and photodiodes;
- a dielectric layer including a network of electrical connections connected to said electronic circuits, the dielectric layer situated at a front face of the semiconductor wafer substrate and passing over said through-passages;
- electrically conductive fillings located within the through-passages, said electrically conductive fillings extending towards a back face of the semiconductor wafer substrate from the front face and connected to the network of electrical connections; and
- dielectric layers configured to provide for anti-diffusion of a metal material of the electrically conductive fillings into the semiconductor portions of the semiconductor wafer substrate, said dielectric layers comprising interior dielectric layers that are situated between sides of the semiconductor portions and the electrically conductive fillings and back dielectric layers that are joined to the interior dielectric layers.
2. The device according to claim 1, wherein the back dielectric layers cover back faces of the semiconductor portions of the semiconductor wafer substrate.
3. The device according to claim 1, wherein the back dielectric layers extend into the through-passages.
4. The device according to claim 1, further including local back cavities in the back layers, and local additional layers of metal in the local back cavities.
5. The device according to claim 4, wherein the local additional layers of metal contained within the local back cavities are attached to the electrically conductive fillings.
6. The device according to claim 4, wherein the local additional layers of metal contained within the local back cavities have portions aligned with the through-passages and are separated from the electrically conductive fillings by local additional insulating layers in back portions of the through-passages.
7. The device according to claim 1, wherein which the electrically conductive fillings comprise front layers of polysilicon and back layers of a metal.
8. The device according to claim 1, wherein which the electrically conductive fillings comprise back parts made of tungsten.
9. The device according to claim 1, wherein the electrically conductive fillings comprise front parts made of doped polysilicon.
10. The device according to claim 1, wherein the electrically conductive fillings comprise back parts made of a material selected from the group consisting of silicon oxide and doped polysilicon.
11. The device according to claim 1, wherein which the dielectric layers are of silicon oxide.
12. A method for fabrication of an electronic device, comprising:
- forming blind main grooves in a thick semiconductor substrate wafer, said blind main grooves extending from a front face of the thick semiconductor substrate wafer and running in a longitudinal and transverse direction and intersecting one another;
- forming dielectric anti-diffusion layers against sides and bottoms of the blind main grooves to define secondary grooves;
- filling the secondary grooves with a temporary material;
- fabricating electronic circuits at the thick semiconductor substrate wafer;
- forming a dielectric layer which includes a network of electrical connections over the front face of the thick semiconductor substrate wafer;
- thinning the thick semiconductor substrate wafer starting from a back face of the thick semiconductor substrate wafer down to back faces of the filling made of temporary material so as to obtain a plurality of semiconductor portions separated from one another by through-passages;
- removing back parts of the dielectric anti-diffusion layers so as to obtain interior anti-diffusion layers at sides of the plurality of semiconductor portions;
- replacing the filling of temporary material with an electrically conductive fill that is in contact with the network of electrical connections; and
- forming back dielectric anti-diffusion layers.
13. The method according to claim 12, further comprising:
- after obtaining the interior anti-diffusion layers, further thinning of the thick semiconductor substrate wafer; and
- forming the back dielectric layers on back faces of the plurality of semiconductor portions, said back dielectric layers being attached to the interior dielectric layers.
14. The method according to claim 12, further comprising:
- replacing back parts of the electrically conductive fill with back anti-diffusion layers within the through-passages.
15. The method according to claim 12, further comprising:
- forming back cavities in the back anti-diffusion layers; and
- filling the back cavities with a metal material.
Type: Application
Filed: Dec 7, 2018
Publication Date: Jun 13, 2019
Patent Grant number: 10910428
Applicant: STMicroelectronics (Crolles 2) SAS (Crolles)
Inventors: Francois ROY (Seyssins), Sonarith CHHUN (Pontcharra)
Application Number: 16/212,790