PRINTING COMPONENT ARRAYS WITH DIFFERENT ORIENTATIONS
A method of micro-transfer printing comprises providing a component source wafer and components disposed in, on, or over the component source wafer. A destination substrate and a stamp for transferring the components from the component source wafer to the destination substrate is provided. The component source wafer has an attribute or structure that varies across the component source wafer that affects the structure, operation, appearance, or performance of the components. A first array of components is transferred from the component source wafer to the destination substrate with a first orientation. A second array of components is transferred from the component source wafer to the destination substrate with a second orientation different from the first orientation. Components can be transferred by micro-transfer printing and different orientations can be a different rotation, overlap, interlacing, or offset.
The present disclosure relates generally to structures and methods for transferring (e.g., micro-transfer printing) multiple arrays of micro-components onto a substrate.
BACKGROUNDSubstrates with electronically active components distributed over the extent of the substrate may be used in a variety of electronic systems, for example, in flat-panel display devices such as flat-panel liquid crystal or organic light emitting diode (OLED) displays, in imaging sensors, and in flat-panel solar cells. The electronically active components are typically either assembled on the substrate, for example using individually packaged surface-mount integrated-circuit devices and pick-and-place tools, or by sputtering or spin coating a layer of semiconductor material on the substrate and then photolithographically processing the semiconductor material to form thin-film circuits on the substrate. Individually packaged integrated-circuit devices typically have smaller transistors with higher performance than thin-film circuits but the packages are larger than can be desired for highly integrated systems.
Methods for transferring active components from one substrate to another are described in U.S. Pat. No. 7,943,491. In examples of these approaches, small integrated circuits are formed on a native semiconductor source wafer. The small unpackaged integrated circuits, or chiplets, are released from the native source wafer by etching a layer formed beneath the circuits. A PDMS stamp is pressed against the native source wafer and the process side of the chiplets is adhered to individual stamp posts. The chiplets are pressed against a destination substrate or backplane with the stamp and adhered to the destination substrate. In other examples, U.S. Pat. No. 8,722,458 entitled Optical Systems Fabricated by Printing-Based Assembly teaches transferring light-emitting, light-sensing, or light-collecting semiconductor elements from a wafer substrate to a destination substrate or backplane.
In order to populate a large destination substrate with components from a native source wafer, the stamp repeatedly picks up components from different locations on the native source wafer with stamp posts and prints the components to different locations on the destination substrate. The arrangement of components on the destination substrate is at least partly defined by the arrangement of the components on the native source wafer and the arrangement of posts on the stamp. The location of the stamp with respect to the native source wafer and the destination substrate is controlled by an opto-electro-mechanical control system.
SUMMARYIt has been found that because of variation in materials and photolithographic processes on the native source wafer, the performance or other attributes of components formed on a native source wafer can also vary. This variation in source materials can cause operational non-uniformities in components transferred to the destination substrate. There is a need, therefore, for systems, structures, devices, materials, and methods that reduce variability in arrangements of multiple arrays of micro-transfer-printed micro-components on destination substrates. The present disclosure provides, inter alfa, structures, materials, and methods that provide reduced large-scale component variation on a substrate.
In accordance with certain embodiments of the present disclosure, a method of micro-transfer printing comprises providing a component source wafer and components disposed in, on, or over the component source wafer, providing a destination substrate, and providing a stamp for transferring the components from the component source wafer to the destination substrate, wherein the component source wafer has an attribute or structure that varies across the component source wafer such that different ones of the components in different locations have a different structure, operation, appearance, or performance of the components, transferring a first array of components from the component source wafer to the destination substrate with a first orientation, and transferring a second array of components from the component source wafer to the destination substrate with a second orientation, wherein the second orientation is different from the first orientation.
In some embodiments, methods of the present invention comprise transferring the first array and transferring the second array with micro-transfer printing (e.g., dry contact printing).
In some embodiments of the present invention, the second orientation is rotated relative to the first array to provide different first and second orientations. The second orientation can be rotated 90 degrees, 180 degrees, or 270 degrees with respect to the first orientation.
In some embodiments, methods of the present invention comprise transferring the second array of components adjacent to the first array of components on the destination substrate. In some embodiments, methods of the present invention comprise repeatedly transferring arrays of components from the component source wafer to the destination substrate with adjacent arrays on the destination substrate transferred at different orientations. In some embodiments, methods of the present invention comprise repeatedly transferring arrays of components from the component source wafer to the destination substrate N times in one dimension, where N/2 pairs of adjacent arrays on the destination substrate comprise array i and array (N−1−i) for each i from 0 to (N/2)−1. In some embodiments, methods of the present invention comprise repeatedly transferring arrays of components from the component source wafer to the destination substrate N×M times in two dimensions, where N/2×M/2 two-by-two adjacent component arrays on the destination substrate comprise array (i, j), array (N−1−i, j), array (i, M−1−j), and array (N−1−i, M−1−j) for each i from 0 to (N/2)−1 and each j from 0 to (M/2)−1.
In some embodiments, methods of the present invention comprise interlacing the second array with respect to the first array in at least one dimension to provide different first and second orientations. The interlacing can be in one dimension or in two dimensions. The first array and the second array can each be regular, arrangements of components in one dimension or regular arrangements of components in two dimensions.
In some embodiments, methods of the present invention comprise offsetting the second array with respect to the first array on the destination substrate by an amount that is different from an offset of the first array with respect to the second array on the component source wafer to provide different first and second orientations. The second array can be disposed with respect to the first array on the destination substrate in a different direction than the second array is disposed with respect to the first array on the component source wafer. The first array and second array can be adjacent on the component source wafer before transferring but not adjacent on the destination substrate after transferring.
In some embodiments, methods of the present invention comprise providing a plurality of component source wafers, wherein the plurality of component source wafers comprises the component source wafer, and transferring arrays of components from each of the component source wafers onto the destination substrate with two or more different orientations.
In some embodiments of the present invention, the plurality of component source wafers comprises a first component source wafer and a second component source wafer different from the first component source wafer, and some methods of the present invention comprise interlacing components from the first component source wafer between components from the second component source wafer.
In some embodiments of the present invention, the components are light-emitting components such as inorganic light-emitting diodes.
The foregoing and other objects, aspects, features, and advantages of the present disclosure will become more apparent and better understood by referring to the following description taken in conjunction with the accompanying drawings, in which:
The perspectives shown in
Features and advantages of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings, in which like reference characters identify corresponding elements throughout. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The figures are not necessarily drawn to scale.
DETAILED DESCRIPTION OF CERTAIN EMBODIMENTSCertain embodiments of the present disclosure are directed toward methods of micro-transfer printing arrays of components from a component source wafer to a destination substrate using a stamp, wherein an attribute or structure of the components varies systematically over the component source wafer so that different ones of the components in different locations on the component source wafer have a different structure, operation, appearance, or performance. The attribute variation can, in the absence of structures, devices, systems, and methods of the present disclosure, result in unwanted large-scale non-uniformity in component operation, structure, or appearance on the destination substrate. According to some embodiments of the present disclosure, the large-scale operation can be mitigated by providing components on a destination substrate at different orientations with respect to the attribute variation on a component source wafer. The components can be provided in arrays so that a first array is disposed with a first orientation and a second array is disposed with a second orientation, where the second orientation is different from the first orientation. Different orientations can, for example, comprise different spatial rotations, offsets, interlacings (e.g., interdigitations), or interlacing in one or two directions (dimensions) in which the attribute varies. Arrays of components 20 can be for example regular one-dimensional arrays or regular two-dimensional arrays.
Referring to the sequential cross sections and perspectives of
Referring to
As shown in the
Referring to the perspective of
Referring to
If the process is not completed (done step 170), the process of picking up components 20 from component source wafer 10 is repeated (steps 130 and 140), possibly more than once. However, for at least one of the repetitions, micro-transfer printed components 20 are disposed with an orientation different from the orientation of the first micro-transfer print step 160. The orientation for a component source wafer 10 is taken with respect to the direction in which attribute 12 varies, for example the direction of the arrow in
As used herein, a different orientation can, but does not necessarily, include components 20 micro-transfer printed (step 160) with a different rotation, for example rotated in an array 22 adjacent to a micro-transfer printed array 22 of components 20, for example as shown in
Different orientations for micro-transfer printing can be enabled by moving any one or any combination of component source wafer 10, stamp 30, or destination substrate 40. For example, stamp 30 can be rotated after component 20 pickup from component source wafer 10 and before component 20 printing to destination substrate 40, destination substrate 40 can be rotated in different directions or in different amounts before each micro-transfer print step 160, or component source wafer 10 can be rotated in different directions or in different amounts before each micro-transfer pickup step 140.
Referring next to the perspective of
As shown in the perspective of
Thus, according to some embodiments of the present disclosure, a method of micro-transfer printing comprises providing a component source wafer 10 and components 20 disposed in, on, or over component source wafer 10 (step 100), providing a destination substrate 40 (step 120), and providing a stamp 30 for transferring components 20 from component source wafer 10 to destination substrate 40 (step 110), where component source wafer 10 has an attribute or structure 12 that varies (e.g., monotonically) across component source wafer 10 that affects the structure, operation, appearance, or performance of the components 20. In steps 130, 140, 150, 160, a first array 22 of components 20 is transferred from component source wafer 10 to destination substrate 40 with a first orientation and in step 145, 130, 140, 150, 160 a second array 22 of components 20 is transferred from component source wafer 10 to destination substrate 40 with a second orientation different from the first orientation. Component 20 transfer can be performed using micro-transfer printing (e.g., dry contact printing), for example.
The process of printing components 20 in different orientations is repeated again. Referring to the perspective of
The process of printing components 20 in different orientations is repeated again for remaining components 20. Referring to the perspective of
Components 20 are all micro-transfer printed from component source wafer 10 to destination substrate 40 in various orientations (step 170) and the process is completed (step 180).
Referring to
Without wishing to be bound by any particular theory, such variation can be less objectionable to a human visual system for a particular application (e.g., if components 20 are light-emitting diodes in a display). For example, the array 22 shown in
As shown in
In some embodiments, a method comprises repeatedly transferring arrays 22 of components 20 from component source wafer 10 to destination substrate 40 N times in one dimension, where N/2 pairs of adjacent arrays 22 of components 20 on destination substrate 40 comprise array 22 i and array 22 (N−1−i) for each i from 0 to (N/2)−1.
For example, referring to
In some embodiments, a method of the present disclosure, comprises repeatedly transferring arrays 22 of components 20 from component source wafer 10 to destination substrate 40 N×M times in two dimensions, where N/2×M/2 two-by-two adjacent component arrays 22 on destination substrate 40 comprise array 22 (i, j), array 22 (N−1−i, j), array 22 (i, M−1−j), and array 22 (N−1−i, M−1−j) for each i from 0 to (N/2)−1 and each j from 0 to (M/2)−1. Thus, components 20 in different arrays 22 are interlaced in one or two dimensions. By transferring different arrays 22 of components 20 in such a manner, a variation in attributes 12 may be made less regular, less visible, or less objectionable; arrays 22 of components 20 on destination substrate 40 (after transfer) are mixed up with respect to the corresponding arrays 22 of components 20 on component source wafer 10 (before transfer). The two-dimensional case operates as described above with the one-dimensional case except in two orthogonal directions at the same time.
In some embodiments and as illustrated in
Displays having same and different color arrays 22 of LED components 20 of micro-transfer printed from one or more component source wafers 10 to a destination substrate 40 using multiple orientations have been constructed and visually examined and shown to have less visible variation in color and brightness.
In some embodiments of the present disclosure, the order in which components 20 are printed (e.g., front right components 20 on a stamp 30 versus back left components 20 on a stamp 30) is arbitrary.
According to some embodiments of the present disclosure, micro-transfer printing includes transferring components 20 from a source substrate (e.g., component source wafer 10) to a destination substrate (e.g., destination substrate 40) by contacting components 20 on the source substrate with a stamp 30 to remove components 20 from the source substrate, transferring stamp 30 and contacted components 20 to the destination substrate 40, and contacting components 20 to a surface of the destination substrate 40. Components 20 can be adhered to stamp 30 or the destination substrate 40 by, for example, one or more of van der Waals forces, electrostatic forces, magnetic forces, chemical forces, and adhesive forces (e.g., from an adhesive). In some embodiments of the present disclosure, components 20 are adhered to stamp 30 with separation-rate-dependent adhesion, for example kinetic control of viscoelastic stamp materials such as can be found in elastomeric devices such as a PDMS stamp 30. Stamps 30 can comprise stamp posts 32 having a stamp post area on the distal end of stamp posts 32. Stamp posts 32 can have a length, a width, or both a length and a width, similar or substantially equal to a length, a width, or both a length and a width of component 20. In some embodiments, as discussed further below, stamp posts 32 of a stamp 30 can be smaller than components 20 in one or two orthogonal directions.
In exemplary methods, a stamp 30 (e.g., a viscoelastic elastomer stamp, such as a stamp optionally comprising a plurality of stamp posts 32) is designed and fabricated to retrieve and transfer arrays 22 of components 20 from their native component source wafer 10 onto non-native destination substrates 40. In some embodiments, stamp 30 mounts onto motion-plus-optics machinery (e.g., an opto-mechatronic motion platform) that can precisely control stamp 30 alignment and kinetics with respect to both component source wafers 10 and destination substrates 40. During micro-transfer printing, the motion platform brings stamp 30 into contact with components 20 on component source wafer 10, with optical alignment performed before contact. For example, in some embodiments, light can be transmitted and/or received through stamp 30 (e.g., through one or more stamp posts 32) in order to perform an optical alignment. Rapid upward movement of the print-head fractures component tether(s) 52 forming fractured component tethers 53, transferring component(s) 20 to stamp 30 or stamp posts 32. The populated stamp 30 then travels to destination substrate 40 and one or more components 20 are then aligned (e.g., in a manner similar to for pick-up) to destination substrate 40 and printed.
A component source wafer 10 can be any source wafer or substrate with micro-transfer printable components 20 that can be transferred with a stamp 30. For example, a component source wafer 10 can be or include a semiconductor (e.g., silicon) in a crystalline or non-crystalline form, a compound semiconductor (e.g., comprising GaN or GaAs), or a glass, polymer, sapphire, or quartz wafer. Sacrificial portions 14 can be formed of a patterned oxide (e.g., silicon dioxide) or nitride (e.g., silicon nitride) layer or can be an anisotropically etchable portion of sacrificial layer 11 of component source wafer 10. Typically, but not necessarily, component source wafers 10 are smaller than destination substrates 40.
Exemplary components 20 include active, passive, and active and passive components 20. Exemplary components 20 include, but are not limited to, any one or more of integrated devices, integrated circuits (such as CMOS circuits), light-emitting diodes, photodiodes, sensors, electrical or electronic devices, optical devices, opto-electronic devices, magnetic devices, magneto-optic devices, magneto-electronic devices, and piezo-electric device, materials or structures. Components 20 can comprise electronic component circuits that operate component 20. Components 20 can be responsive to electrical energy, to optical energy, to electromagnetic energy, to mechanical energy, or to a combination thereof. In some embodiments, a component 20 is a light-emitting diode (LED).
Components 20 formed or disposed in or on component source wafers 10 can be constructed using, for example, one or more of integrated circuit, micro-electro-mechanical, and photolithographic methods. Components 20 can comprise one or more different component materials, for example, non-crystalline or crystalline semiconductor materials such as silicon or compound semiconductor materials or non-crystalline or crystalline piezo-electric materials.
In some embodiments of the present disclosure, components 20 can be native to and formed on sacrificial portions 14 of component source wafers 10 and can include one or more seed layers used for constructing crystalline layers on or in component source wafers 10. In some examples, components 20, sacrificial portions 14, anchors 50, and component tethers 52 can be constructed using photolithographic processes. Components 20 can be micro-devices having at least one of a length and width no more than 200 microns(e.g., no more than 100 microns, no more than 50 microns, no more than 25 microns, no more than 15 microns, no more than 10 microns, or no more than five microns), and, optionally, a thickness of no more than 50 microns (e.g., no more than 25 microns, no more than 15 microns, no more than 10 microns, no more than five microns, no more than two microns, or no more than one micron). In some embodiments, components 20 can be unpackaged dice (each an unpackaged die) transferred directly from native component source wafers 10 on or in which components 20 are constructed to destination substrate 40 (without wafer dicing).
Anchors 50 and component tethers 52 can be or can comprise portions of component source wafer 10 that are not sacrificial portions 14 and can include layers formed on component source wafers 10, for example dielectric or metal layers and for example layers formed as a part of photolithographic processes used to construct or encapsulate components 20.
Destination substrate 40 can be any destination substrate or target substrate to which components 20 are transferred (e.g., micro-transfer printed), for example flat-panel display substrates, printed circuit boards, or similar substrates. Destination substrates 40 can be, for example substrates comprising glass, polymer, quartz, ceramics, metal, or sapphire. Destination substrates 40 can be semiconductor substrates (for example silicon) or compound semiconductor substrates and can have multiple layers.
In some embodiments of the present disclosure, a layer of adhesive, such as a layer of resin, polymer, or epoxy, either curable or non-curable, adheres components 20 onto destination substrate 40 and can be disposed, for example by coating or lamination. In some embodiments, the layer of adhesive is disposed in a pattern, for example using inkjet, screening, or photolithographic techniques. In some embodiments, a layer of adhesive is coated, for example with a spray or slot coater, and then patterned, for example using photolithographic techniques.
Patterned electrical conductors (e.g., wires, traces, or electrical contact pads such as those found on printed circuit boards, flat-panel display substrates, and in thin-film circuits) can be formed on any one or combination of one or more components 20 and destination substrate 40. One or more electrical contact pads can be in or on destination substrate 40 and/or in or on one or more components 20 to electrically connect components 20. Such patterned electrical conductors and contact pads can comprise, for example metal, transparent conductive oxides, or cured conductive inks and can be constructed using photolithographic methods and materials, for example metals such as aluminum, gold, or silver deposited by evaporation and patterned using pattern-wise exposed, cured, and etched photoresists, or constructed using imprinting methods and materials or inkjet printers and materials, for example comprising cured conductive inks deposited on a surface or provided in micro-channels in or on destination substrate 40.
Micro-transfer printing processes suitable for disposing components 20 onto destination substrates 40 are described in Inorganic light-emitting diode displays using micro-transfer printing (Journal of the Society for Information Display, 2017, DOI # 10.1002/jsid.610, 1071-0922/17/2510-0610, pages 589-609), U.S. Pat. 8,722,458 entitled Optical Systems Fabricated by Printing-Based Assembly, U.S. patent application Ser. No. 15/461,703 entitled Pressure Activated Electrical Interconnection by Micro-Transfer Printing, U.S. Pat. No. 8,889,485 entitled Methods for Surface Attachment of Flipped Active Components, U.S. patent application Ser. No. 14/822,864 entitled Chiplets with Connection Posts, U.S. patent application Ser. No. 14/743,788 entitled Micro-Assembled LED Displays and Lighting Elements, and U.S. patent application Ser. No. 15/373,865, entitled Micro-Transfer Printable LED Component, the disclosure of each of which is incorporated herein by reference in its entirety.
For a discussion of micro-transfer printing techniques, see also U.S. Pat. Nos. 7,622,367 and 8,506,867, each of which is hereby incorporated by reference in its entirety. Micro-transfer printing using compound micro-assembly structures and methods can also be used with the present disclosure, for example, as described in U.S. patent application Ser. No. 14/822,868, filed Aug. 10, 2015, entitled Compound Micro-Assembly Strategies and Devices, which is hereby also incorporated by reference in its entirety. Accordingly, in some embodiments, printed structure 99 is a compound micro-assembled structure.
According to various embodiments of the present disclosure, component source wafer 10 can be provided with components 20, patterned sacrificial portions 14, component tethers 52, and anchors 50 already formed, or they can be constructed as part of a method. Component source wafer 10, components 20, stamp 30, and destination substrate 40 can be made separately and at different times or in different temporal orders or locations and provided in various process states.
The spatial distribution of components 20 on a component source wafer 10 or printed structures 99 is a matter of design choice for the end product desired. In some embodiments of the present disclosure, all components 20 in an array 22 on a component source wafer 10 are transferred to a stamp 30. In some embodiments, a subset of components 20 in an array 22 on a component source wafer 10 is transferred. By varying the number and arrangement of stamp posts 32 on transfer stamps 30, the distribution of components 20 on stamp posts 32 of the transfer stamp 30 can be likewise varied, as can the distribution of components 20 on destination substrate 40.
Because components 20, in certain embodiments, can be made using integrated circuit photolithographic techniques having a relatively high resolution and cost and destination substrate 40, for example a printed circuit board, can be made using printed circuit board techniques having a relatively low resolution and cost, electrical conductors and substrate contact pads on destination substrate 40 can be much larger than electrical contacts or component electrodes on component 20, thereby reducing manufacturing costs. For example, in certain embodiments, micro-transfer printable component 20 has at least one of a width, length, and height from 0.5 μm to 200 μm (e.g., 0.5 to 2 μm, 2 to 5 μm, 5 to 10 μm, 10 to 20 μm, 20 to 50 μm, 50 to 100 μm, or 100 to 200 μm).
In certain embodiments, destination substrate 40 is or comprises a member selected from the group consisting of polymer, plastic, resin, polyimide, PEN, PET, metal, metal foil, glass, a semiconductor, and sapphire. In certain embodiments, destination substrate 40 has a thickness from 5 microns to 20 mm (e.g., 5 to 10 microns, 10 to 50 microns, 50 to 100 microns, 100 to 200 microns, 200 to 500 microns, 500 microns to 0.5 mm, 0.5 to 1 mm, 1 mm to 5 mm, 5 mm to 10 mm, or 10 mm to 20 mm).
Components 20, in certain embodiments, can be constructed using foundry fabrication processes used in the art. Layers of materials can be used, including materials such as metals, oxides, nitrides and other materials used in the integrated-circuit art. Each component 20 can be or include a complete semiconductor integrated circuit and can include, for example, transistors, diodes, light-emitting diodes, or sensors. Components 20 can have different sizes, for example, each having an area of 100 square microns or larger, 1000 square microns or larger or 10,000 square microns or larger, 100,000 square microns or larger, or 1 square mm or larger. Components 20 can have variable aspect ratios, for example between 1:1 and 10:1 (e.g., 1:1, 2:1, 5:1, or 10:1). Components 20 can be rectangular or can have other shapes.
Various embodiments of structures and methods are described herein. Structures and methods were variously described as transferring components 20, printing components 20, or micro-transfer printing components 20 as examples and the particular word used should be understood to be non-limiting as to the methods that may be used to implement the described embodiments. In some embodiments, micro-transfer-printing includes using a stamp 30 (e.g., an elastomeric stamp 30, such as a PDMS stamp 30) to transfer a component 20 using controlled adhesion. For example, an exemplary stamp 30 can use kinetic or shear-assisted control of adhesion between the stamp 30 and a component 20. It is contemplated that, in certain embodiments, where a method is described as including printing (e.g., micro-transfer-printing) a component 20, other analogous embodiments exist using a different transfer method. As used herein, transferring a component 20 (e.g., from a component source wafer 10 or wafer to a destination substrate 40) can be accomplished using any one or more of a variety of known techniques. For example, in certain embodiments, a pick-and-place method can be used. As another example, in certain embodiments, a flip-chip method can be used (e.g., involving an intermediate, handle or carrier substrate). In methods according to certain embodiments, a stamp 30 is a vacuum tool or other transfer device used to transfer components 20. In some embodiments, a stamp 30 uses one or more of electrostatic forces, magnetic forces, and vacuum forces to transfer components 20 (e.g., applied to individual components 20 by individual stamp posts 32).
As is understood by those skilled in the art, the terms “over” and “under” are relative terms and can be interchanged in reference to different orientations of the layers, elements, and substrates included in the present disclosure. Furthermore, a first layer “on” a second layer is a relative orientation of the first layer to the second layer that does not preclude additional layers being disposed therebetween. For example, a first layer on a second layer, in some implementations, means a first layer directly on and in contact with a second layer. In other implementations, a first layer on a second layer includes a first layer and a second layer with another layer therebetween (e.g., an in mutual contact).
Having described certain implementations of embodiments, it will now become apparent to one of skill in the art that other implementations incorporating the concepts of the disclosure may be used. Therefore, the disclosure should not be limited to certain implementations, but rather should be limited only by the spirit and scope of the following claims.
Throughout the description, where apparatus and systems are described as having, including, or comprising specific elements, or where processes and methods are described as having, including, or comprising specific steps, it is contemplated that, additionally, there are apparatus and systems of the disclosed technology that consist essentially of, or consist of, the recited elements, and that there are processes and methods according to the disclosed technology that consist essentially of, or consist of, the recited processing steps.
It should be understood that the order of steps or order for performing certain action is immaterial so long as the disclosed technology remains operable. Moreover, two or more steps or actions in some circumstances can be conducted simultaneously. The disclosure has been described in detail with particular reference to certain embodiments thereof, but it will be understood that variations and modifications can be effected within the spirit and scope of the disclosure.
PARTS LIST
- A cross section line
- 10 component source wafer
- 11 sacrificial layer
- 12 attribute/structure/epitaxial (epi) layer
- 14 sacrificial portions
- 16 gap
- 20 component
- 20a-20j component
- 22 array
- 30 stamp
- 32 stamp post
- 40 destination substrate
- 50 anchor
- 52 component tether
- 53 fractured component tether
- 54 dielectric layer
- 99 printed structure
- 100 provide component source wafer step
- 110 provide stamp step
- 120 provide destination substrate step
- 130 move stamp to component source wafer step
- 131 move stamp to second component source wafer step
- 140 pick up components from component source wafer with stamp step
- 141 pick up components from second component source wafer with stamp step
- 145 rotate source wafer
- 150 move stamp to destination substrate location step
- 160 print components to destination substrate with stamp step
- 161 print components with different orientation to destination substrate with stamp step
- 170 done step
- 180 complete step
Claims
1. A method of micro-transfer printing, comprising:
- providing a component source wafer and components disposed in, on, or over the component source wafer, providing a destination substrate, and providing a stamp for transferring the components from the component source wafer to the destination substrate, wherein the component source wafer has an attribute or structure that varies across the component source wafer such that different ones of the components in different locations have a different structure, operation, appearance, or performance;
- transferring a first array of components from the component source wafer to the destination substrate with a first orientation; and
- transferring a second array of components from the component source wafer to the destination substrate with a second orientation, wherein the second orientation is different from the first orientation.
2. The method of claim 1, comprising transferring the first array and transferring the second array using micro-transfer printing.
3. The method of claim 1, wherein the second orientation is rotated relative to the first array to provide different first and second orientations.
4. The method of claim 3, wherein the second orientation is rotated 90 degrees or 270 degrees with respect to the first orientation.
5. The method of claim 3, wherein the second orientation is rotated 180 degrees with respect to the first orientation.
6. The method of claim 1, comprising transferring the second array of components adjacent to the first array of components on the destination substrate.
7. The method of claim 1, comprising repeatedly transferring arrays of components from the component source wafer to the destination substrate with adjacent arrays on the destination substrate transferred at different orientations.
8. The method of claim 7, comprising repeatedly transferring arrays of components from the component source wafer to the destination substrate N times in one dimension, where N/2 pairs of adjacent arrays on the destination substrate comprise array i and array (N−1−i) for each i from 0 to (N/2)−1.
9. The method of claim 7, comprising repeatedly transferring arrays of components from the component source wafer to the destination substrate N×M times in two dimensions, where N/2×M/2 two-by-two adjacent component arrays on the destination substrate comprise array (i, j), array (N−1−i, j), array (i, M−1−j), and array (N−1−i, M−1−j) for each i from 0 to (N/2)−1 and each j from 0 to (M/2)−1.
10. The method of claim 1, comprising interlacing the second array with respect to the first array in at least one dimension to provide different first and second orientations.
11. The method of claim 1, wherein the interlacing is in two dimensions.
12. The method of claim 1, wherein the first array and the second array are each regular, arrangements of components in one dimension.
13. The method of claim 1, wherein the first array and the second array are each regular arrangements of components in two dimensions.
14. The method of claim 1, comprising offsetting the second array with respect to the first array on the destination substrate by an amount that is different from an offset of the first array with respect to the second array on the component source wafer to provide different first and second orientations.
15. The method of claim 14, wherein the second array is disposed with respect to the first array on the destination substrate in a different direction than the second array is disposed with respect to the first array on the component source wafer.
16. The method of claim 14, wherein the first array and second array are adjacent on the component source wafer before transferring but are not adjacent on the destination substrate after transferring.
17. The method of claim 1, comprising:
- providing a plurality of component source wafers, wherein the plurality of component source wafers comprises the component source wafer; and
- comprising transferring arrays of components from each of the component source wafers onto the destination substrate with two or more different orientations.
18. The method of claim 17, wherein the plurality of component source wafers comprises a first component source wafer and a second component source wafer different from the first component source wafer, and the method comprises interlacing components from the first component source wafer between components from the second component source wafer.
19. The method of claim 1, wherein the components are light-emitting components.
20. The method of claim 1, wherein the components are inorganic light-emitting diodes.
Type: Application
Filed: Feb 13, 2019
Publication Date: Aug 13, 2020
Inventors: Andrew Tyler Pearson (Durham, NC), Erich Radauscher (Raleigh, NC), Christopher Michael Verreen (Raleigh, NC), Matthew Alexander Meitl (Durham, NC), Christopher Andrew Bower (Raleigh, NC), Ronald S. Cok (Rochester, NY)
Application Number: 16/274,969