Low noise current buffer circuit and I-V converter
A low noise current buffer circuit includes a first transistor, for receiving an input current, a second transistor, for draining a first current from a drain of the second transistor according to the input current received by the first transistor, a third transistor, for outputting first current, a fourth transistor, for outputting a second current to an output resistor, to generate an output voltage, and a feedback capacitor, for eliminating impacts of noise of a system voltage on the output voltage.
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1. Field of the Invention
The present invention relates to a low noise current buffer circuit and current voltage (I-V) converter, and more particularly, to a low noise current buffer circuit and current voltage converter capable of reducing impact of noise of a system voltage on an output voltage.
2. Description of the Prior Art
A current voltage converter, such as a bandgap reference circuit, utilizes a current source to output an input current to an output resistor to generate a required output voltage. In such a conventional structure, since the current source likely experiences interference from noise of a system voltage, the output voltage is affected and can not stay within a stable range.
Please refer to
For example, when the system voltage VDD rises rapidly due to noise, the transistors 102, 104 output corresponding greater input currents Iin, Iin′, which increases the output voltages Vout, Vout′, such that the output voltages Vout, Vout′ are greater than the stable range. Thus, there is a need for improvement of the prior art.
SUMMARY OF THE INVENTIONIt is therefore an objective of the present invention to provide a low noise current buffer circuit and current voltage converter.
The present invention discloses a low noise current buffer circuit for reducing impacts of noise of a system voltage on an output voltage in a current voltage converter. The low noise current buffer circuit includes a first current mirror, a second current mirror and a feedback capacitor. The first current mirror includes a first transistor, including a gate, a drain and a source, the gate coupled to the drain, and the drain receiving an input current, and a second transistor, including a gate, a drain and a source, the gate coupled to the gate of the first transistor, for draining a first current from the drain according to the input current received by the first transistor. The second current mirror includes a third transistor, including a gate, a drain and a source, the gate coupled to the drain, and the drain coupled to the drain of the second transistor, for outputting the first current, and a fourth transistor, including a gate, a drain and a source, the gate coupled to the gate of the third transistor, for outputting a second current to an output resistor according to the first current outputted by the third transistor, to generate the output voltage. The feedback capacitor includes a terminal coupled between the drain of the second transistor and the drain of the third transistor, and another terminal coupled between the drain of the fourth transistor and the output resistor, for forming a negative feedback loop, to eliminate the impacts of the noise of the system voltage on the output voltage.
The present invention further discloses a current voltage converter capable of reducing impacts of noise of a system voltage on an output voltage. The current-to-voltage converter includes a current source, for generating an input current, an output resistor, for generating an output voltage according to a second current, and a low noise current buffer circuit, coupled between the current source and the output resistor. The low noise current buffer circuit includes a first current mirror, a second current mirror and a feedback capacitor. The first current mirror includes a first transistor, including a gate, a drain and a source, the gate coupled to the drain, and the drain receiving an input current, and a second transistor, including a gate, a drain and a source, the gate coupled to the gate of the first transistor, for draining a first current from the drain according to the input current received by the first transistor. The second current mirror includes a third transistor, including a gate, a drain and a source, the gate coupled to the drain, and the drain coupled to the drain of the second transistor, for outputting the first current, and a fourth transistor, including a gate, a drain and a source, the gate coupled to the gate of the third transistor, for outputting the second current to the output resistor according to the first current outputted by the third transistor, to generate the output voltage, The feedback capacitor includes a terminal coupled between the drain of the second transistor and the drain of the third transistor, and another terminal coupled between the drain of the fourth transistor and the output resistor, for forming a negative feedback loop, to eliminate the impacts of the noise of the system voltage on the output voltage.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
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In short, the transistors MNR1, MN1 and the transistors MP1, MP2 form current mirrors, respectively. The feedback capacitor CM1 can form a negative feedback loop FB to eliminate the impact of the noise of the system voltage VDD on the output voltage Vout′. The transistors MN2, MN3, MP3 form a cascade stage to reduce the channel-length-modulation and provide better current matching of the transistors MN1, MP2. The feedback capacitor CM2 can perform Miller compensation to prevent the noise of the system voltage VDD from generating feed-forward noise to the output voltage Vout′ along a feed-forward path FFP1 through the feedback capacitor CM1. The transistors MNR2, MNR3, MPR1 correspond to the transistors MN2, MN3, MP3 of the cascade stage, respectively.
In detail, the transistor MNR1 receives the input current Iin3′, such that the transistor MN1 drains a current I1 from the drain of the transistor MN1 according to the input current Iin3′. Since the transistor MP1 and the transistor MN1 are cascaded, a current of the transistor MN1 is substantially the same with the current I1, such that the transistor MP2 can output current I2 to the output resistor Ro′ according to the current I1 to generate the output voltage Vout′. The feedback capacitor CM1 forms the negative feedback loop FB to eliminate the impact of the noise of the system voltage VDD on the output voltage Vout′, such that the output voltage Vout′ can stay within a stable range. For example, as shown in
However, if the low noise current buffer circuit 214 only includes the transistors MNR1, MN1, MP1, MP2 and the feedback capacitor CM1, the noise of the system voltage VDD will generate feed-forward noise to the output voltage Vout′ along a feed-forward path FFP2 through the feedback capacitor CM1 as shown in
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On the other hand, please refer to
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In
such that the noise of the system voltage VDD affects the output voltage Vout′ via the feed-forward path FFP1. At this moment, the feedback capacitor CM2 performs Miller compensation to eliminate the impact of the noise of the system voltage VDD on the output voltage Vout'. If the noise of the system voltage VDD is high frequency noise, the noise of the system voltage VDD generates feed-forward noise along the feed-forward path FFP3 through the feedback capacitor CM2, but the feed-forward noise along the feed-forward path FFP3 is in phase with the negative feedback signal in the negative feedback loop FB formed by the feedback capacitor CM1. Therefore, the feed-forward noise can strengthen negative feedback, so as to facilitate eliminating the impact of the noise of the system voltage VDD on the output voltage Vout′, such that the output voltage Vout′ can stay within a stable range.
Furthermore, an open loop transfer function Aopen*f can be derived from the negative feedback loop FB shown in
And a frequency response of feedback transfer function f can be denoted as:
Then, the whole open loop transfer function Aopen*f can be derived as follows:
In addition, in order to prevent the transistors MNR1, MN1, MP1, MP2 forming the current mirrors from generating the currents I1, I2 with too much variation due to process mismatch, sizes of the transistors MNR1, MN1, MP1, MP2 are greater than those of the other transistors. Therefore, the feedback capacitor CM1 in the negative feedback loop FB forms a dominant pole, and a parasitic capacitor CGR2 of the transistor MP2 is greater than those of other transistors and thus forms a second pole. As a result, the open loop transfer function Aopen*f of the low noise current buffer circuit 214 is shown in
Noticeably, the spirit of the present invention is to utilize the low noise current buffer circuit 214 to receive the noisy input current of the current source, and then to output the current I2 to the output resistor Ro′ after reducing the impact of the noise of the input current and system voltage VDD by negative feedback, so as to generate the output voltage Vout′ unaffected by the noise of the input current and system voltage VDD, such that the output voltage can stay within a stable range. Those skilled in the art should make modifications or alterations accordingly. For example, the present invention is not limited to being applied in a bandgap reference circuit, and can be applied in any current voltage converter utilizing a current source to generate an output voltage. Besides, the bandgap reference circuit 22 outputs the current I2 to the output resistor Ro′ to generate the output voltage Vout′, but methods for generating an output voltage can be similar to that of the bandgap reference circuit 20, which outputs the current I2 to the output resistor Ro and the diode Q1, or other elements, and are not limited to these. In addition, the low noise current buffer circuit 214 can be as shown in
In the prior art, since a current source is likely to experience interference by noise of a system voltage, an output voltage is affected as well and thus can not stay within a stable range. In comparison, the present invention utilizes the low noise current buffer circuit 214 to receive the input current of the current source, and then to output a current I2 to generate the output voltage unaffected by the noise of the input current and system voltage VDD, such that the output voltage can stay within a stable range.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.
Claims
1. A low noise current buffer circuit for reducing impact of noise of a system voltage on an output voltage in a current-to-voltage converter, comprising:
- a first current mirror, comprising: a first transistor, comprising a gate, a drain and a source, the gate coupled to the drain, and the drain receiving an input current; and a second transistor, comprising a gate, a drain and a source, the gate coupled to the gate of the first transistor, for draining a first current from the drain according to the input current received by the first transistor;
- a second current mirror, comprising: a third transistor, comprising a gate, a drain and a source, the gate coupled to the drain, and the drain coupled to the drain of the second transistor, for outputting the first current; and a fourth transistor, comprising a gate, a drain and a source, the gate coupled to the gate of the third transistor, for outputting a second current to an output resistor according to the first current outputted by the third transistor, to generate the output voltage; and
- a feedback capacitor, comprising a terminal coupled between the drain of the second transistor and the drain of the third transistor, another terminal coupled between the drain of the fourth transistor and the output resistor, for forming a negative feedback loop, to eliminate the impacts of the noise of the input current or system voltage on the output voltage.
2. The low noise current buffer circuit of claim 1 further comprising a cascade stage, comprising a terminal coupled between the drain of the second transistor and the feedback capacitor, and another terminal coupled to the drain of the third transistor, for preventing the noise of the system voltage from generating feed-forward noise to the output voltage through the feedback capacitor.
3. The low noise current buffer circuit of claim 2, wherein the cascade stage comprises:
- a fifth transistor, comprising a gate, a drain and a source, the source coupled between the drain of the second transistor and the feedback capacitor, for preventing the noise of the system voltage from generating feed-forward noise to the output voltage through the feedback capacitor; and
- a second feedback capacitor, coupled between the gate and the drain of the fifth transistor, for performing Miller compensation to prevent the noise of the system voltage from generating feed-forward noise to the output voltage through the gate of the fifth transistor and the feedback capacitor.
4. The low noise current buffer circuit of claim 3 further comprising a sixth transistor, comprising a gate, a drain and a source, the source coupled to the drain of the fourth transistor, and the drain coupled between the feedback capacitor and the output resistor, wherein the cascade stage further comprises a seventh transistor comprising a gate, a drain and a source, the source coupled to the drain of the fifth transistor, and the drain coupled to the drain of the third transistor.
5. The low noise current buffer circuit of claim 4, wherein the first transistor, the second transistor, the fifth transistor and the seventh transistor are N-type metal oxide semiconductor (MOS) transistors, and the third transistor, the fourth transistor and the sixth transistor are P-type MOS transistors.
6. The low noise current buffer circuit of claim 1, wherein a size of the third transistor, a capacitance of the feedback capacitor and a resistance of the output resistor are related to noise of the system voltage in a specific frequency band.
7. The low noise current buffer circuit of claim 1, wherein a ratio of a size of the fourth transistor to a size of the third transistor are related to the impact of the noise of the system voltage on the output voltage.
8. A current voltage converter capable of reducing impact of noise of a system voltage on an output voltage, comprising:
- a current source, for generating an input current;
- an output resistor, for generating an output voltage according to a second current; and
- a low noise current buffer circuit, coupled between the current source and the output resistor, comprising: a first current mirror, comprising: a first transistor, comprising a gate, a drain and a source, the gate coupled to the drain, and the drain receiving an input current; and a second transistor, comprising a gate, a drain and a source, the gate coupled to the gate of the first transistor, for draining a first current from the drain according to the input current received by the first transistor; a second current mirror, comprising: a third transistor, comprising a gate, a drain and a source, the gate coupled to the drain, and the drain coupled to the drain of the second transistor, for outputting the first current; and a fourth transistor, comprising a gate, a drain and a source, the gate coupled to the gate of the third transistor, for outputting the second current to the output resistor according to the first current outputted by the third transistor to generate the output voltage; and a feedback capacitor, comprising a terminal coupled between the drain of the second transistor and the drain of the third transistor, and another terminal coupled between the drain of the fourth transistor and the output resistor, for forming a negative feedback loop to eliminate the impact of the noise of the system voltage on the output voltage.
9. The current voltage converter of claim 8, wherein the low noise current buffer circuit further comprises a cascade stage, comprising a terminal coupled between the drain of the second transistor and the feedback capacitor, and another terminal coupled to the drain of the third transistor, for preventing the noise of the system voltage from generating feed-forward noise to the output voltage through the feedback capacitor.
10. The current voltage converter of claim 9, wherein the cascade stage comprises:
- a fifth transistor, comprising a gate, a drain and a source, the source coupled between the drain of the second transistor and the feedback capacitor, for preventing the noise of the system voltage from generating feed-forward noise to the output voltage through the feedback capacitor; and
- a second feedback capacitor, coupled between the gate and the drain of the fifth transistor, for performing Miller compensation to prevent the noise of the system voltage from generating feed-forward noise to the output voltage through the gate of the fifth transistor and the feedback capacitor.
11. The current voltage converter of claim 10, wherein the low noise current buffer circuit further comprises a sixth transistor, comprising a gate, a drain and a source, the source coupled to the drain of the fourth transistor, and the drain coupled between the feedback capacitor and the output resistor, wherein the cascade stage further comprises a seventh transistor, comprising a gate, a drain and a source, the source coupled to the drain of the fifth transistor, and the drain coupled to the drain of the third transistor.
12. The current voltage converter of claim 11, wherein the first transistor, the second transistor, the fifth transistor and the seventh transistor are N-type metal oxide semiconductor (MOS) transistors, and the third transistor, the fourth transistor and the sixth transistor are P-type MOS transistors.
13. The current voltage converter of claim 8, wherein a size of the third transistor, a capacitance of the feedback capacitor and a resistance of the output resistor are related to noise of the system voltage in a specific frequency band.
14. The current voltage converter of claim 8, wherein a ratio of a size of the fourth transistor to a size of the third transistor are related to the impact of the noise of the system voltage on the output voltage.
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Type: Grant
Filed: Oct 24, 2011
Date of Patent: Jun 10, 2014
Patent Publication Number: 20120098506
Assignee: NOVATEK Microelectronics Corp. (Hsinchu Science Park, Hsin-Chu)
Inventors: Min-Hung Hu (Hsinchu), Zhen-Guo Ding (Tainan)
Primary Examiner: Jeffrey Sterrett
Application Number: 13/280,318
International Classification: G05F 3/26 (20060101);