Manifold cover for use in a semiconductor wafer heat processing apparatus

- Tokyo Electron Limited
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Description

FIG. 1 a perspective view of a cover manifold cover for use in a semiconductor wafer heat processing apparatus;

FIG. 2 a front elevational view thereof;

FIG. 3 a rear elevational view thereof;

FIG. 4 a top plan view thereof;

FIG. 5 a bottom plan view thereof;

FIG. 6 a right side view thereof;

FIG. 7 a left side view thereof; and,

FIG. 8 a cross-sectional view taken along line VIII-VIII in FIG. 2.

Referenced Cited
U.S. Patent Documents
4857689 August 15, 1989 Lee
5314574 May 24, 1994 Takahashi
5320218 June 14, 1994 Yamashita et al.
5752796 May 19, 1998 Muka
Patent History
Patent number: D404369
Type: Grant
Filed: Feb 2, 1998
Date of Patent: Jan 19, 1999
Assignee: Tokyo Electron Limited (Tokyo-to)
Inventor: Satoshi Kawachi (Shiroyama-machi)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/82,981
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;