Fin for use in a semiconductor wafer heat processing apparatus
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Description
FIG. 1 a perspective view of a fin for use in a semiconductor wafer heat processing apparatus;
FIG. 2 a front elevational view thereof;
FIG. 3 a right side view thereof;
FIG. 4 a top plan view thereof;
FIG. 5 a bottom plan view therof;
FIG. 6 a cross-sectional view taken along line VI-VI in FIG. 2; and,
FIG. 7 a cross-sectional view taken alone line VII-VII in FIG. 4.
Referenced Cited
Patent History
Patent number: D404373
Type: Grant
Filed: Feb 12, 1998
Date of Patent: Jan 19, 1999
Assignee: Tokyo Electron Limited (Tokyo-To)
Inventor: Norifumi Kimura (Shiroyama-machi)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/83,716
Type: Grant
Filed: Feb 12, 1998
Date of Patent: Jan 19, 1999
Assignee: Tokyo Electron Limited (Tokyo-To)
Inventor: Norifumi Kimura (Shiroyama-machi)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/83,716
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;
International Classification: 1303;