Circuit tester

- Kaise Kabushiki Kaisha
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Description

FIG. 1 is a perspective view of a circuit tester showing my new design;

FIG. 2 is a perspective view thereof with the cover thereof closed;

FIG. 3 is a perspective view thereof with the test leads thereof pulled out;

FIG. 4 is a front elevational view thereof;

FIG. 5 is a rear elevational view thereof;

FIG. 6 is a top plan view thereof;

FIG. 7 is a bottom plan view thereof;

FIG. 8 is a left side elevational view thereof;

FIG. 9 is a right side elevational view thereof;

FIG. 10 is a front elevational view thereof with the cover thereof closed;

FIG. 11 is a rear elevational view thereof with the cover thereof closed;

FIG. 12 is a top plan view thereof with the cover thereof closed;

FIG. 13 is a bottom plan view thereof with the cover thereof closed;

FIG. 14 is a left side elevational view thereof with the cover thereof closed;

FIG. 15 is a right side elevational view thereof with the cover thereof closed;

FIG. 16 is a front elevational view thereof in which the cover is turned until reaching a rear face of a body proper; and,

FIG. 17 is a bottom plan view thereof in which the cover is turned until reaching the rear face of the body proper.

Referenced Cited
U.S. Patent Documents
D351185 October 4, 1994 Matsuda et al.
D352009 November 1, 1994 Elkins
D374699 October 15, 1996 Futo
D395834 July 7, 1998 Kumai et al.
D397049 August 18, 1998 Mohammadian et al.
D397050 August 18, 1998 Mohammadian et al.
Patent History
Patent number: D412294
Type: Grant
Filed: Sep 10, 1998
Date of Patent: Jul 27, 1999
Assignee: Kaise Kabushiki Kaisha (Nagano-ken)
Inventors: Hideo Kaise (Ueda), Masazo Murase (Ueda)
Primary Examiner: Antoine Duval Davis
Law Firm: Jordan and Hamburg LLP
Application Number: 0/93,423
Classifications
Current U.S. Class: Provided With Handle, Or Hand-held (D10/78)
International Classification: 1004;