Hybrid integrated circuit device

- Taiyo Yuden Co., Ltd.
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Description

FIG. 1 is a perspective view of a hybrid integrated circuit device showing an embodiment of our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a right side elevational view thereof;

FIG. 6 is a top plan view thereof; and,

FIG. 7 is a bottom plan view thereof.

Claims

The ornamental design for a hybrid integrated circuit device, as shown and described.

Referenced Cited
U.S. Patent Documents
D357671 April 25, 1995 Terasawa et al.
5742480 April 21, 1998 Sawada et al.
D396450 July 28, 1998 Nishiura et al.
5838546 November 17, 1998 Miyoshi
5905639 May 18, 1999 Warren
6028773 February 22, 2000 Hundt
6201701 March 13, 2001 Linden et al.
Patent History
Patent number: D459706
Type: Grant
Filed: Jul 26, 2001
Date of Patent: Jul 2, 2002
Assignee: Taiyo Yuden Co., Ltd. (Tokyo)
Inventors: Hitoshi Ebihara (Tokyo), Naoki Tomaru (Tokyo), Yoshiyuki Wasada (Tokyo), Tetsuya Ito (Tokyo), Hideki Kato (Tokyo), Tomohiro Igarashi (Tokyo), Hideki Yoda (Tokyo)
Primary Examiner: Ted Shooman
Assistant Examiner: Daniel Bui
Attorney, Agent or Law Firm: Bacon & Thomas
Application Number: 29/145,538
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;