Semiconductor device

- Kabushiki Kaisha Toshiba
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Description

FIG. 1 is a front, top and right side perspective view of a semiconductor device, showing my new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a bottom plan view thereof;

FIG. 6 is a left side elevational view thereof; and,

FIG. 7 is a right side elevational view thereof.

Claims

The ornamental design for a semiconductor device, as shown and described.

Referenced Cited
U.S. Patent Documents
5563441 October 8, 1996 Kato
D420983 February 22, 2000 Choi
6404065 June 11, 2002 Choi
D482666 November 25, 2003 Kamada
D489695 May 11, 2004 Komoto
D497879 November 2, 2004 Kawamura et al.
Foreign Patent Documents
751629 December 1988 JP
865628 April 1993 JP
Other references
  • Extract of Denpa Shimbun (newspaper) showing an insulated gate transistor, Oct. 13, 1998.
Patent History
Patent number: D515520
Type: Grant
Filed: Sep 30, 2002
Date of Patent: Feb 21, 2006
Assignee: Kabushiki Kaisha Toshiba (Tokyo)
Inventor: Satoshi Komoto (Tokyo)
Primary Examiner: Stella Reid
Assistant Examiner: Selina Sikder
Attorney: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 29/168,222