Socket for semiconductor device
Latest Yamaichi Electronics Co., Ltd. Patents:
Description
FIG. 1 is a left-perspective view of a socket for semiconductor device showing my new design;
FIG. 2 is a front elevational view of my new design, the rear elevational view being a mirror image thereof;
FIG. 3 is a top plan view of my new design;
FIG. 4 is a bottom plan view of my new design;
FIG. 5 is a right-side view of my new design, the left-side view being a mirror image thereof;
FIG. 6 a bottom plan view of my new design with the cross section indicated at 7—7; and,
FIG. 7 is a cross sectional view of my new design taken along line 7—7 in FIG. 6.
Claims
The ornamental design for a socket for semiconductor device, as shown and described.
Referenced Cited
U.S. Patent Documents
D395423 | June 23, 1998 | Koyama et al. |
20030032322 | February 13, 2003 | Nakamura et al. |
20040063241 | April 1, 2004 | Nakano et al. |
20040212382 | October 28, 2004 | Cram |
20040248435 | December 9, 2004 | Sato et al. |
20050136721 | June 23, 2005 | Sato |
20050231919 | October 20, 2005 | Ujike et al. |
20050250363 | November 10, 2005 | Suzuki et al. |
Patent History
Patent number: D522977
Type: Grant
Filed: Dec 16, 2004
Date of Patent: Jun 13, 2006
Assignee: Yamaichi Electronics Co., Ltd. (Tokyo)
Inventor: Masaru Sato (Tokyo)
Primary Examiner: Stella Reid
Assistant Examiner: Selina Sikder
Attorney: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
Application Number: 29/219,283
Type: Grant
Filed: Dec 16, 2004
Date of Patent: Jun 13, 2006
Assignee: Yamaichi Electronics Co., Ltd. (Tokyo)
Inventor: Masaru Sato (Tokyo)
Primary Examiner: Stella Reid
Assistant Examiner: Selina Sikder
Attorney: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
Application Number: 29/219,283
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)