Substrate for a semiconductor device
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Description
FIG. 1 is a top plan view of a substrate for a semiconductor device, showing my new design; the opposite side being a mirror image thereof;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a right side elevational view thereof; the opposite side being a mirror image thereof; and,
FIG. 4 is a rear elevational view thereof.
Claims
The ornamental design for a substrate for a semiconductor device, as shown and described.
Referenced Cited
U.S. Patent Documents
Foreign Patent Documents
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D473198 | April 15, 2003 | Ozawa et al. |
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Patent History
Patent number: D523403
Type: Grant
Filed: Nov 19, 2004
Date of Patent: Jun 20, 2006
Assignee: Kabushiki Kaisha Toshiba
Inventor: Yukiko Mizukoshi (Kita-ku)
Primary Examiner: Stella Reid
Assistant Examiner: Selina Sikder
Attorney: Banner & Witcoff, Ltd.
Application Number: 29/217,556
Type: Grant
Filed: Nov 19, 2004
Date of Patent: Jun 20, 2006
Assignee: Kabushiki Kaisha Toshiba
Inventor: Yukiko Mizukoshi (Kita-ku)
Primary Examiner: Stella Reid
Assistant Examiner: Selina Sikder
Attorney: Banner & Witcoff, Ltd.
Application Number: 29/217,556
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)