Semiconductor device

- Kabushiki Kaisha Toshiba
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Description

FIG. 1 is a top plan view of a semiconductor device, showing our new design; a bottom plan view being a mirror image thereof;

FIG. 2 is a right side elevational view thereof; a left side elevational view being a mirror image thereof;

FIG. 3 is a front elevational view thereof; and,

FIG. 4 is a rear elevational view thereof.

Claims

The ornamental design for a semiconductor device, as shown and described.

Referenced Cited
U.S. Patent Documents
4602271 July 22, 1986 Dougherty, Jr. et al.
D319045 August 13, 1991 Hasegawa et al.
D319629 September 3, 1991 Hasegawa et al.
D319814 September 10, 1991 Hasegawa et al.
D442150 May 15, 2001 Kang
6300685 October 9, 2001 Hasegawa et al.
6307269 October 23, 2001 Akiyama et al.
D457146 May 14, 2002 Yamamoto et al.
Foreign Patent Documents
900345-5 August 1996 JP
Other references
  • Extract of Denpa Shimbun (newspaper) showing a flash memory (LE8BU166) of Sanyo Denki Jul. 8, 1999.
Patent History
Patent number: D473198
Type: Grant
Filed: Apr 26, 2002
Date of Patent: Apr 15, 2003
Assignee: Kabushiki Kaisha Toshiba (Tokyo)
Inventors: Isao Ozawa (Chigasaki), Toshitsune Iijima (Tama)
Primary Examiner: Ted Shooman
Assistant Examiner: Selina Sikder
Attorney, Agent or Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 29/159,669
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;