Processing chamber for manufacturing semiconductors

- Tokyo Electron Limited
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Description

FIG. 1 is a bottom and left front perspective view of a processing chamber for manufacturing semiconductors or the like, showing my new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a right side elevational view thereof, the left side elevational view being a mirror image of the side view shown;

FIG. 5 is a top plan view thereof;

FIG. 6 is a bottom plan view thereof;

FIG. 7 is a cross-sectional view thereof taken in the direction of the arrows on line 7—7 of FIG. 2; and,

FIG. 8 is a bottom and left front perspective view thereof in the state of use.

The broken line showing in the figures is for illustrative purposes only and forms no part of the claimed design.

Claims

The ornamental design for a processing chamber for manufacturing semiconductors or the like, as shown and described.

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Patent History
Patent number: D593969
Type: Grant
Filed: Apr 10, 2007
Date of Patent: Jun 9, 2009
Assignee: Tokyo Electron Limited (Tokyo)
Inventor: Yicheng Li (Narashino)
Primary Examiner: Selina Sikder
Attorney: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 29/278,809