Set-top box
- Intel
Latest Intel Patents:
- TRACKING CRC (CYCLIC REDUNDANCY CHECK) ERRORS PER MEMORY WRITE TRANSACTION
- LOW-COMPLEXITY ENHANCMENT VIDEO CODING USING TILE-LEVEL QUANTIZATION PARAMETERS
- MEMORY MODULES AND SOCKETS
- VIA STRUCTURES FOR HYBRID BONDING ARCHITECTURES
- METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO GENERATE HARDWARE-AWARE MACHINE LEARNING MODEL ARCHITECTURES FOR MULTIPLE DOMAINS WITHOUT TRAINING
Description
The broken lines depict portions of the set top box that form no part of the claimed design. The broken lines and the unshaded regions bounded by broken lines illustrate boundaries and, therefore, form no part of the claimed design. Non-oblique line shading is meant to show contour and not surface ornamentation.
Claims
The ornamental design for a set-top box, as shown and described.
Referenced Cited
Patent History
Patent number: D741825
Type: Grant
Filed: Dec 28, 2013
Date of Patent: Oct 27, 2015
Assignee: Intel Corporation (Santa Clara, CA)
Inventors: Gregory A. James (Phoenix, AZ), Edward O. Clapper (Tempe, AZ), Nicholas Long (Santa Clara, CA), Michael J. Castillo (Hillsboro, OR), Fraser Stirling (Santa Clara, CA), Simon J. Waterfall (Santa Clara, CA), Gadi Amit (San Francisco, CA), Chadwick Harber (San Francisco, CA), Julien Rouillac (San Francisco, CA)
Primary Examiner: Randall Gholson
Application Number: 29/477,911
Type: Grant
Filed: Dec 28, 2013
Date of Patent: Oct 27, 2015
Assignee: Intel Corporation (Santa Clara, CA)
Inventors: Gregory A. James (Phoenix, AZ), Edward O. Clapper (Tempe, AZ), Nicholas Long (Santa Clara, CA), Michael J. Castillo (Hillsboro, OR), Fraser Stirling (Santa Clara, CA), Simon J. Waterfall (Santa Clara, CA), Gadi Amit (San Francisco, CA), Chadwick Harber (San Francisco, CA), Julien Rouillac (San Francisco, CA)
Primary Examiner: Randall Gholson
Application Number: 29/477,911
Classifications
Current U.S. Class:
Video (D14/125)