Formation of thin-film resistors on silicon substrates

The formation of thin-film resistors by the ion implantation of a metallic conductive layer in the surface of a layer of phosphosilicate glass or borophosphosilicate glass which is deposited on a silicon substrate. The metallic conductive layer materials comprise one of the group consisting of tantalum, ruthenium, rhodium, platinum and chromium silicide. The resistor is formed and annealed prior to deposition of metal, e.g. aluminum, on the substrate.

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Description
BRIEF DESCRIPTION OF THE DRAWING

The sole FIGURE is a top view of a pair of thin-film resistors which were formed by ion implantation on a silicon substrate.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Silicon integrated circuits frequently use doped polysilicon as a load resistor. Typically, the polysilicon layer is obtained by low-pressure chemical vapor deposition, and the doping is obtained by ion implantation of phosphorus or arsenic.

For radiation-hardened integrated circuit applications, a resistor layer with a sheet resistivity on the order of 10.sup.5 ohms per square is desired. Ideally the resistor should have a low temperature coefficient of resistance, and should not significantly change in resistivity as a result of total dose radiation such as 10.sup.6 rads (Si). Both of these requirements are very difficult to achieve in conventional lightly-doped polysilicon resistors.

Referring now to the sole FIGURE, there is shown the typical resistor geometry for a pair of thin-film resistors 10a, 10b. The thin-film resistors 10a, 10b are formed on and in the substrate 12 which may comprise any of the available silicon-based substrates. For the present example, the resistor layer for a radiation-hardened integrated circuit may be formed using a thin-film metallic conductor layer which is deposited by ion implantation on the surface of a substrate, such as fused phosphosilicate glass (PSG) or borophosphosilicate glass (BPSG). The ion implantation of the resistor geometry occurs prior to the steps of the aluminum (Al) metal (or alloy) deposition, patterning, alloying, passivation layer deposition, and the bond pad opening. The thin-film resistor layer would thus be subjected to a temperature on the order of 450.degree. C. which is utilized for the aluminum (Al) alloying step. The sintered aluminum (Al) contacts to the resistor layer would be formed during this step also.

The resistor layer would be implanted at an energy level which provides sufficient penetration to insure good adhesion. This energy level is on the order of 20-180 kilovolts. The annealing process of the resistor may be performed at temperatures up to 700.degree. C. without adverse effect. The resistor geometry may be patterned on the substrate either by etching to remove undesired areas, or by implantation over a patterned resist layer, which is followed by the removal of the photo-resist prior to the annealing process or step.

The following are a few examples of the possible metallic conductor materials which may be utilized to form the thin-film resistive layer: tantalum, ruthenium, rhodium, platinum and chromium silicide. However, in the case of tantalum or of chromium silicide resistors, it would be necessary to avoid the process steps, subsequent to the resistor deposition step, which would result in excessive oxidation of the resistor material. The advantages of the use of ion implantation for the formation of thin-film resistors on silicon substrates include very accurate control of dosage, and the good adhesion of the deposited films.

Since the thin-film resistor formation process puts the resistor geometries very close to the substrate surface, the pattern which may be used for the contact cuts. does not provide contacts to the ends of the resistors, but only to underlying single-crystal silicon and polysilicon. After the contact cuts are made, the photo-resist is stripped. A brief etch of the entire wafer surface can be used, immediately prior to metal deposition, to remove oxide which may have formed over the surface of the implanted thin-film resistor or the silicon surfaces in the contact cuts. In wet etch processes, a dip in 50:1 H.sub.2 O: concentrated hydrofluoric acid for 2 seconds could be used.

The required ion implant dosage depends upon the electrical conductivity of the thin-film resistor after sintering. If it is assumed that the resistor will have, for example, a conductivity of 1 percent of that of the pure bulk metal (or compound), then the dosage which is required to achieve a sheet resistance of 100,000 ohms per square, can be estimated from the data on electrical resistivity and the density of bulk metals. On that basis, a dosage of approximately 6.times.10.sup.14 Ru ions per square centimeter would be used for ruthenium resistors.

Although the invention has been described with reference to a particular embodiment, it will be understood to those skilled in the art that the invention is capable of a variety of alternative embodiments within the spirit and scope of the appended claims.

Claims

1. The method of forming thin-film resistors on silicon substrates comprising the steps of:

providing an oxide-covered silicon substrate;
implanting metallic conductor ions at a predetermined energy level into said oxide-covered silicon to form a conductive layer;
depositing a photo-resist layer upon said conductive layer;
placing a patterned mask upon said photo-resistor layer;
exposing said photo-resistor layer;
removing the unexposed photo-resist layer;
etching to remove undesired areas of said conductive layer;
dissolving remaining photo-resist;
applying heat in the temperature range of 450.degree. C. to 700.degree. C. to anneal said conductive layer; and,
forming bonding pad on said conductive layers to form resistive elements.

2. The method of forming thin-film resistors on silicon substrates comprising the steps of:

providing an oxide-covered silcone substrate;
depositing a photo-resist layer upon said oxide-cover silicon substrate;
applying a mask and forming a pattern on said photo-resist layer;
implanting metallic conductor ions at a predetermined energy level into said oxide-covered silicon substrate to form a conductive layer;
dissolving remaining photo-resist layer;
depositing an alloy layer on said oxide-covered silicon substrate and said conductive layer;
patterning said alloy layer;
applying heat in the temperature range of 450.degree. C. to 700.degree. C. to anneal said conductive layer; and,
forming bonding pad on said conductive layers to form resistive elements.

3. The method of forming thin-film resistors of claim 1 wherein said energy level is in the range of 20 to 180 kilovolts.

4. The method of forming thin-film resistors of claim 1 wherein said conductive layer is one of a group comprising: tantalum, ruthenium, rhodium, platinum and chromium silicide.

5. The method of forming thin-film resistors of claim 2 wherein said energy level is in the range of 20 to 180 kilovolts.

6. The method of forming thin-film resistors of claim 2 wherein said conductive layer is one of a group comprising: tantalum, ruthenium, rhodium, platinum and chromium silicide.

Patent History
Patent number: H546
Type: Grant
Filed: Feb 26, 1988
Date of Patent: Nov 1, 1988
Assignee: The United States of America as represented by the Secretary of the Air Force (Washington, DC)
Inventors: George L. Schnable (Montgomery County, PA), Chung P. Wu (Hamilton Township, Mercer County, NJ)
Primary Examiner: Herbert B. Guynn
Assistant Examiner: Eric Jorgensen
Attorneys: William Stepanishen, Donald J. Singer
Application Number: 2/716,089
Classifications
Current U.S. Class: One Or More Components Not Compacted (419/7); 437/63
International Classification: B22F 302;