Stressed substrates for transient electronic systems
A stressed substrate for transient electronic systems (i.e., electronic systems that visually disappear when triggered to do so) that includes one or more stress-engineered layers that store potential energy in the form of a significant internal stress. An associated trigger mechanism is also provided that, when triggered, causes an initial fracture in the stressed substrate, whereby the fracture energy nearly instantaneously travels throughout the stressed substrate, causing the stressed substrate to shatter into multiple small (e.g., micron-sized) pieces that are difficult to detect. The internal stress is incorporated into the stressed substrate through strategies similar to glass tempering (for example through heat or chemical treatment), or by depositing thin-film layers with large amounts of stress. Patterned fracture features are optionally provided to control the final fractured particle size. Electronic systems built on the substrate are entirely destroyed and dispersed during the transience event.
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This invention was made with Government support under Contract No. HR0011-14-C-0013 (G017.3765) awarded by defense Advanced Research Projects Agency. The Government has certain rights in this invention.
This is an application for reissue of U.S. Pat. No. 9,154,138.FIELD OF THE INVENTION
This invention relates to transient electronic systems, and in particular to substrates used in transient electronic systems.BACKGROUND OF THE INVENTION
Large area sensing is critical for a variety of military, ecological and commercial interests and has historically been served through the use of centralized long-range sensors. However, rapid improvements in miniaturization of electronic systems have significantly improved the capabilities of small sensor devices. These micro-sensors have the potential to create “large N” distributed networks with advantages in operational adaptability, non-traditional sensing modalities that are only possible with close proximity, increased sensitivity and knowledge extraction through networked intelligence.
While distributed network systems have remarkable promise, their realistic use is limited by risks associated with their accumulation in the environment, detection and defeat, and exploitation due to inability to maintain positive control (unlike centralized long-range sensors).
The phrase “transient electronics” refers to a relatively new family of electronic devices that disappear (disaggregate and disperse) within a set period of time, making them ideally suited for distributed network systems. Conventional transient electronic systems typically rely on the use of soluble substrates and electronic materials (such as silk). When placed into solvent (typically water), these conventional substrates and electronics slowly dissolve into solution. As such, a distributed network system made up of conventional transient electronic devices can be expected to “disappear” over a relatively short amount of time (e.g., after periodic rainfall).
Although the conventional transient electronic approaches achieve the goal of causing the electronics to “disappear” after use, the long dissolution period required to achieve complete disaggregation and dispersal make the conventional approaches unfit for discrete (e.g., military) applications that require rapid and complete disaggregation upon command. Moreover, the conventional approaches utilize materials that are not compatible with existing integrated circuit fabrication and assembly techniques, requiring the development of new IC fabrication processes at significant cost.
What is needed is a substrate for transient electronics that is compatible with existing IC fabrication techniques, and achieves complete, on-command disaggregation of the electronic circuitry formed thereon.SUMMARY OF THE INVENTION
The present invention is directed to a stressed substrate for transient electronic systems that utilizes one or more stress-engineered layers to store potential energy in the form of residual, self-equilibrating internal stresses, and an associated transient event triggering mechanism that, upon receiving a trigger signal, generates an initial fracture that causes the stressed substrate to suddenly and catastrophically release the stored potential energy in a manner that completely disaggregates (“powderizes”) the stressed substrate into micron-sized particulates (i.e., 100 μm across) using a mechanism similar to that captured in a Prince Rupert's Drop. The stressed substrate is stable enough to support either mounted or fabricated electronics thereon. In one embodiment, the stressed substrate comprises a suitable semiconductor material (e.g., SiO2) that is compatible with existing IC fabrication techniques. The stress-engineered layers include at least one tensile layer and at least one compressive layer that are operably attached together such that release of the potential energy powderizes the stressed substrate and any electronic devices disposed thereon. The transient event triggering system is connected to the stressed substrate, and includes an actuating mechanism that controls release of the potential energy, i.e., by generating an initial fracture in the stressed substrate upon receipt of a trigger signal (e.g., an externally delivered current pulse or a radio frequency signal). The present invention thus facilitates the production of transient electronic systems that reliably disappear (powderize) in a significantly shorter amount of time than is possible using conventional (e.g., soluble substrate) approaches. Moreover, because the stressed substrate is compatible with low-cost existing IC fabrication techniques, the present invention facilitates the production of transient electronic systems having custom-fabricated IC devices and/or the incorporation of high-performance off-the-shelf electronic devices with minimal (or potentially without any) modification to core IC fabrication process.
According to alternative exemplary embodiments, stressed substrates are fabricated either by depositing stress-engineered substrate layers using, for example, plasma vapor deposition techniques in which the deposition parameters (i.e., temperature or pressure) are varied such that the layers collectively contain a significant inbuilt stress gradient, or by post-treating the substrate material using strategies similar to glass tempering (e.g., by way of ion-exchange, heat or chemical treatment). In some cases, the stress-engineered substrate layers are sequentially deposited on top of each other inside a sacrificial mold that is later removed (i.e., such that the stressed substrate is entirely formed by the deposited stress-engineered substrate layers). In other cases, the stress-engineered layers are formed over a central core substrate. In each case, the stressed substrate includes at least one tensile stress layer having a residual tensile stress and at least one compressive stress layer having a residual compressive stress, where the compressive stress layer is operably integrally connected to the tensile stress layer such that residual tensile and compressive stresses are self-equilibrating (i.e., such that the laminated structure is stable), and such that the residual tensile and compressive stresses are sufficient to cause complete powderization of the substrate upon application of a triggering force (i.e., an initial fracture) by way of a suitable trigger mechanism (e.g., one of a resistive heat element, a chemical reaction element, and a mechanical pressure element).
According to an aspect of the present invention, transient electronic systems are fabricated by forming a stressed substrate using the methods mentioned above, and then disposing (i.e., fabricating or mounting) one or more electronic elements and one or more trigger mechanisms on the stressed substrate. According to alternative embodiments, the electronic devices are attached to the stressed substrate using various techniques. In one exemplary embodiment, already-formed microelectronic circuit “chips” are attached to the substrate using a bonding method (such as using sealing glasses or anodic bonding) that allows crack propagation to destroy the adhered chips. That is, during the transience event, not only will the substrate fracture into small difficult to detect particles, but the bonded microelectronic devices will also fracture into small particulates as well. The final particle size after triggering is based upon factors such as the stress profile and substrate thickness. In one embodiment, the IC chip is thinned and/or patterned to provide fracture points (features) that assist in controlling the final fractured particle size (i.e., the fracture features are formed such that, when the substrate is powderized by release of the stored potential energy, the substrate fractures along the patterned fracture features. In another embodiment, standard thin-film fabrication (e.g., photolithographic or inkjet printing) techniques are used to fabricate the electronic devices directly into and/or on the stressed substrate such that, upon triggering, the energy released by the stressed substrate destroys the thin, brittle functional layers and all electronics formed thereon.
These and other features, aspects and advantages of the present invention will become better understood with regard to the following description, appended claims, and accompanying drawings, where:
The present invention relates to an improvement in transient electronic devices. The following description is presented to enable one of ordinary skill in the art to make and use the invention as provided in the context of a particular application and its requirements. As used herein, directional terms such as “upper”, “upward”, “lower”, “downward”, are intended to provide relative positions for purposes of description, and are not intended to designate an absolute frame of reference. Various modifications to the preferred embodiment will be apparent to those with skill in the art, and the general principles defined herein may be applied to other embodiments. Therefore, the present invention is not intended to be limited to the particular embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features herein disclosed.
Referring to device 100(t0) and to the bubble located in the uppermost portion of
Referring to the middle of
Referring to the lower-middle portion of
According to an aspect of the present invention, the mechanism by which transient device 100 is powderized during the above-described transient event is similar to that associated with a Prince Rupert's Drop. A Prince Rupert's Drop is formed by simply dropping a bead of molten glass into water, cooling the surface of the drop much more rapidly than the bulk during solidification. This leads to compressive stress on the surface of the glass and tensile stress within the bulk. The resulting glass is very strong as the surface stress resists cracking, however the tail is thin enough that it can be broken; when this is done the elastic strain energy within the drop is released rapidly (fracture propagation steeps are >1000 ms−1) and the drop is shattered into powder. The disaggregation of stressed substrate 110 in response to a transient event trigger signal TS is similar to that of a Prince Rupert's Drop, and hence the terms “powderize” and “powderization” are defined herein to describe a disaggregation event similar to that associated with a Prince Rupert's Drop.
Referring to the lower portion of
Various methods may be used to generate stressed substrate 110 utilized in transient electronic device 100 (shown in
To achieve reliable powderization yielding fragmentation particulates ≤100 μm in any lateral dimension, the presently preferred methodology for generating stressed substrates involves adapting stress-engineered thin film fabrication techniques with ion-exchange tempering to create optimal stress profiles in glass (SiO2) substrates. The presently preferred stressed substrate fabrication methodologies are set forth in the exemplary embodiments described below with reference to
According to a fourth methodology, a hybrid of the above second and third methods is employed in which diced, thin glass core substrates are ion-exchange tempered, and then multiple layers of SiO2 are deposited on the tempered substrates to further increase the induced stresses. This combined approach has the advantage that much higher central tension values should be attainable by varying the parameters of the ion exchange or the thickness of the layering materials and their relative stress mismatch.
In addition to the localized heating approach described in the previous embodiment, other trigger mechanisms may be utilized to generate the initial fracture required to generate powderization of the stressed substrate. For example, suitable triggering mechanisms may be produced that generate localized fracturing using by initiating a chemical reaction on the surface of the stressed substrate, or by applying a localized mechanical pressure (e.g., using a piezoelectric element) to the stressed stressed substrate.
Although the present invention has been described with respect to certain specific embodiments, it will be clear to those skilled in the art that the inventive features of the present invention are applicable to other embodiments as well, all of which are intended to fall within the scope of the present invention.
1. A transient electronic device comprising:
- a stressed substrate including at least one tensile stress layer having a residual tensile stress and at least one compressive stress layer having a residual compressive stress and being operably integrally connected to the at least one tensile stress layer such that the residual tensile and compressive stresses are self-equilibrating; and
- a trigger mechanism attached to the stressed substrate and including means for generating configured to generate an initial fracture in said stressed substrate,
- wherein said residual tensile and compressive stresses are sufficient to generate secondary fractures in response to said initial fracture that propagate throughout through said stressed substrate, whereby said stressed substrate is powderized.
2. The transient electronic device of claim 1, further comprising a functional layer including one or more electronic elements, wherein the functional layer is bonded to the stressed substrate such that the secondary fractures propagate into said functional layer, whereby said functional layer is powderized substantially simultaneously with said stressed substrate.
3. The transient electronic device of claim 2,
- wherein the functional substrate layer comprises silicon, and
- wherein the one or more electronic elements are integrally fabricated on the functional layer.
4. The transient electronic device of claim 1, wherein said stressed substrate further comprises a central, substantially unstressed layer.
5. The transient electronic device of claim 1, wherein said trigger mechanism comprises one of means for applying resistive heating to is configured to heat said stressed substrate, means for initiating initiate a chemical reaction in said stressed substrate, and means for applying or apply a mechanical pressure to said stressed stressed substrate to generate the initial fracture.
6. The transient electronic device of claim 2, wherein at least one of said functional layer and said substrate comprises a plurality of patterned fracture features formed such that, when said substrate is powderized by release of said potential energy, said substrate fractures along said plurality of patterned fracture features in response to the initial fracture.
7. The transient electronic device of claim 2, wherein said functional layer comprises one or more IC chips attached to the stressed substrate layer such that said IC chips are powderized upon release of the potential energy fracture in response to the initial fracture.
8. The transient electronic device of claim 7, wherein said IC chips are attached to the stressed substrate layer by one of a sealing glass and an anodic bond.
9. The transient electronic device of claim 1, wherein said functional layer comprises one or more thin-film electronic elements disposed directly on said stressed substrate.
10. A method for manufacturing a transient electronic device comprising:
- forming a stressed substrate including at least one tensile stress layer having a residual tensile stress and at least one compressive stress layer having a residual compressive stress and being operably integrally connected to the at least one tensile stress layer such that residual tensile and compressive stresses are self-equilibrating; and
- disposing a trigger mechanism configured to generate an initial fracture in the stressed substrate and one or more electronic elements on the stressed substrate.
11. The method of claim 10, wherein forming stressed substrate comprises depositing one or more substrate materials while varying applied process conditions such that the deposited substrate material forms a plurality of layer portions collectively forming a stress gradient.
12. The method of claim 11, wherein forming the stressed substrate comprises depositing said one or more substrate materials onto a sacrificial structure and then removing said one or more sacrificial structure.
13. The method of claim 11, wherein forming stressed substrate comprises depositing said one or more substrate materials onto a core substrate.
14. The method of claim 10, wherein forming stressed substrate comprises subjecting a core substrate to one of an ion-exchange tempering treatment, a chemical treatment and a thermal treatment.
15. The method of claim 10, wherein disposing said one or more electronic elements comprises fabricating said one or more electronic elements on a functional substrate and then attaching said functional substrate to said stressed substrate.
16. The method of claim 15, wherein fabricating said one or more electronic elements comprises forming said one or more electronic elements using a photolithographic semiconductor fabrication process flow.
17. The method of claim 15, wherein attaching said functional substrate to said stressed substrate comprises using one of a sealing glass and an anodic bond.
18. The method of claim 15, further comprising forming a plurality of patterned fracture features in said functional substrate.
19. The method of claim 10, wherein disposing said one or more electronic elements comprises forming said one or more electronic elements directly on the stressed substrate.
20. The method of claim 19, wherein forming said one or more electronic elements directly on the stressed substrate comprises printing one or more thin film electronic elements on the stressed substrate.
21. A method comprising:
- actuating a trigger mechanism attached to a stressed substrate, the stressed substrate including at least one tensile stress layer having a residual tensile stress and at least one compressive stress layer having a residual compressive stress and being operably integrally connected to the at least one tensile stress layer such that the residual tensile and compressive stresses are self-equilibrating; and
- generating an initial fracture in said stressed substrate in response to actuating the trigger mechanism, wherein the residual tensile and compressive stresses of the stressed substrate are sufficient to generate secondary fractures in response to the initial fracture, the secondary fractures propagating through the stressed substrate.
22. The method of claim 21, further comprising receiving a trigger signal, wherein actuating the trigger mechanism occurs in response to receiving the trigger signal.
23. The method of claim 22, wherein receiving the trigger signal comprises receiving a current pulse or a radio frequency signal.
24. The method of claim 21, wherein generating the initial fracture comprises heating the stressed substrate, initiating a chemical reaction in the stressed substrate, or applying mechanical pressure to the stressed substrate.
25. The method of claim 21, wherein the secondary fractures that propagate through the stressed substrate break a functional layer bonded to the stressed substrate.
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Filed: Oct 6, 2017
Date of Patent: Aug 13, 2019
Assignee: Palo Alto Research Center Incorporated (Palo Alto, CA)
Inventors: Scott J. H. Limb (Palo Alto, CA), Gregory L. Whiting (Boulder, CO), Sean R. Garner (Redwood City, CA), JengPing Lu (Fremont, CA), Dirk De Bruyker (San Jose, CA)
Primary Examiner: Tuan H Nguyen
Application Number: 15/726,944
International Classification: H01L 21/64 (20060101); H01L 21/71 (20060101); H01L 23/14 (20060101); H01L 27/00 (20060101); H03K 19/177 (20060101);