Abstract: A semiconductor device including an input protective circuit. A first transistor has a gate formed on the semiconductor substrate and a first and second conductive region is formed on each side of the first gate. Third and fourth conductive regions are respectively formed between the first and second conductive regions and the gate. The third conductive region has a resistance higher than that of the first conductive region, and the fourth conductive region has a conductivity type opposite to the conductivity type of the remaining regions. A second transistor is formed with a pair of conductive regions at an insulated gate. One of the pair of conductive regions is of the second transistor connected to the first transistor, first or second conductive region.

Abstract: The presence and absence of sidewall spacers are used to provide discontinuous and continuous contacts respectively, between a gate electrode and a source/drain region. In particular, first and second spaced apart gate electrodes are formed on an integrated circuit substrate. A source/drain region is formed in the integrated circuit substrate therebetween. The first electrode includes a first sidewall spacer on a first sidewall thereof facing the second gate electrode. The second gate electrode is free of (i.e. does not include a sidewall spacer on a second sidewall thereof facing the first electrode. A metal silicide layer is formed on the first gate electrode, on the second gate electrode and extending from the second gate electrode onto the second sidewall and onto the source/drain region. The first sidewall spacer is free of the metal silicide layer thereon.

Abstract: An electrical circuit for measuring threshold voltages and also a circuit for controlling threshold value variations, while avoiding a need to significantly modify or alter the circuit layout, are provided. A semiconductor device has a plurality of substrate conductor regions commonly shared by multiple metal insulator semiconductor field effect transistors (MISFETs) of the same conductivity type, wherein each of the plurality of substrate conductor regions is electrically separated or isolated from one another.

Abstract: A field effect transistor (FET) comprising a plurality of drain finger electrodes, source finger electrodes and gate finger electrodes disposed in an active region of a semiconductor substrate; a drain bus disposed outside the active region and electrically connecting the drain finger electrodes to each other; a gate bus disposed outside the active region and electrically connecting the gate finger electrodes to each other; and a source bus disposed outside the active region and electrically connecting the source finger electrodes to each other; wherein the drain fingers are electrically connected to each other via the drain bus without crossing over the source or gate fingers.

Abstract: An AC switch device of the present invention comprises an n− region formed on a p-type semiconductor substrate, first and second p-type regions separately formed in the n− region, a first source region (n+ region) and a first sense region (n+ region) separately formed in the first p-type region, a second source region (n+ region) and a second sense region (n+ region) separately formed in the second p-type region, first and second channel regions formed in upper parts of the first and second p-type regions located between the first source region (n+ region) and the first sense region (n+ region), on the one hand, and the second source region (n+ region) and the second sense region (n+ region), on the other, a first gate electrode formed above the first channel region with a gate insulating film interposed, and a second gate electrode formed above the second channel region with a gate insulating film interposed.

Abstract: The pressure sensor component has a chip carrier carrying a semiconductor chip with an integrated pressure sensor having a pressure-detecting surface exposed to the pressure to be measured. A device encapsulation made from an electrically insulating material surrounds the entire assembly except for protruding electrode terminals. Bond wires connect the electrode terminals with the pressure sensor and/or the electronic circuit of the semiconductor chip. The device encapsulation consists entirely of a homogeneous pressure-transmitting medium comprising an enveloping compound, which transmits the pressure to be measured as free from delay and attenuation as possible but is mechanically resistant and dimensionally stable. The pressure to be measured is transmitted directly by the enveloping compound onto the pressure-detecting surface of the semiconductor chip, and the pressure sensor and/or the pressure sensor component is covered tightly on all sides against mechanical and/or chemical influences.

Abstract: A reference voltage supply circuit is provided with a PNP transistor. The PNP transistor has an N-type well for a base formed at a surface of a P-type semiconductor substrate. The reference voltage supply circuit is further provided with a resistor element connected to an emitter of the PNP transistor. The resistor element has an N-type well for a resistor at the surface of the P-type semiconductor substrate. The well is fabricated at the same time as when the N-type well for a base is fabricated.

Abstract: A high-sheet-resistance polysilicon resistor for integrated circuits is achieved by using a two-layer polysilicon process. After forming FET gate electrodes and capacitor bottom electrodes from a polycide layer, a thin interpolysilicon oxide (IPO) layer is deposited to form the capacitor interelectrode dielectric. A doped polysilicon layer and an undoped polysilicon layer are deposited and patterned to form the resistor. The doped polysilicon layer is in-situ doped to minimize the temperature and voltage coefficients of resistivity. Since the undoped polysilicon layer has a very high resistance (infinite), the resistance is predominantly determined by the doped polysilicon layer.

Abstract: A vertically integrated semiconductor component is provided with component levels disposed on different substrates. The substrates are joined by a connecting layer of benzocyclobutene and an electrical connection is provided between component levels by a vertical contact structure. A low-stress gluing is provided by the benzocyclobutene connecting layer.

Abstract: An integrated circuit includes at least one porous silicon oxycarbide (SiOC) insulator, which provides good mechanical strength and a low dielectric constant (e.g., &egr;R<2) for minimizing parasitic capacitance. The insulator provides IC isolation, such as between circuit elements, between interconnection lines, between circuit elements and interconnection lines, or as a passivation layer overlying both circuit elements and interconnection lines. The low dielectric constant silicon oxycarbide isolation insulator of the present invention reduces the parasitic capacitance between circuit nodes. As a result, the silicon oxycarbide isolation insulator advantageously provides reduced noise and signal crosstalk between circuit nodes, reduced power consumption, faster circuit operation, and minimizes the risk of potential timing faults.

Abstract: A support structure is provided between, preferably approximately midway between, a semiconductor die and the inner ends of the lead fingers of a lead frame. Intermediate portions of bond wires connecting the die to the lead fingers are bonded, or tacked, to an upper surface of the support structure. In this manner, the length of the bond wires can be doubled, and the lead fingers can be commensurately further from the die so that a greater number of lead fingers of a given size and spacing can be provided, while avoiding the problems associated with long bond wires.

Abstract: A resin-sealed power semiconductor device is provided. The thicknesses of a die pad (19) and a lead part (2) are made equal and as great as possible. A thick film substrate (8) is bonded with a bonding layer (20) onto a plurality of supporting inner leads (2AS) among first inner leads (2A1) positioned above the die pad (19). Patterns of a control circuit of power semiconductor elements (1) are formed as thick film patterns (10) on an upper surface of the substrate (8), and a control circuit element (IC) (9) and all electronic components (12) are mounted on the patterns (10) by soldering. The constituents (9, 12, 10, 8, 1, 2A1, 19, 2B1) are sealed in a sealing resin (5). The resin-sealed power semiconductor device improves noise immunity while conventionally effectively dissipating heat generated by the power semiconductor elements, and is designed to be adaptable to increase in functionality thereof.

Abstract: A semiconductor device having one or more semiconductor chips and chip components and a manufacturing method. In the semiconductor device, electrical short of the chip components and the like can be effectively avoided, and break away of the chip components from a substrate can be avoided. The semiconductor device comprises: one or more semiconductor chips each of which is flip chip bonded at a first surface thereof to the substrate; at least one chip components mounted on the substrate and in the proximity of the semiconductor chips; insulating underfill resin which covers the chip components and which fills at least part of a portion between the first surface of each of the semiconductor chips and the substrate; and a lid member which is bonded to a second surface of each of the semiconductor devices opposite to the first surface, via conductive adhesive resin.

Abstract: A semiconductor structure includes flip chips or other semiconductor devices that are mounted on printed circuit boards. The printed circuit boards are stacked to increase the circuit density of the semiconductor structure. The printed circuit boards include cavities or openings to accommodate the flip chips or semiconductor devices and thus reduce the overall size of the semiconductor structure. The flip chips or semiconductor devices from adjacent printed circuit boards may extend into the cavities or openings or simply occupy the cavities or openings from the same printed circuit board.

Abstract: A semiconductor device assembly according to the present invention may comprise a semiconductor die having at least one contact pad thereon and a package substrate having at least one lead pad thereon. The package substrate is sized to receive the semiconductor die so that the contact pad on the semiconductor die is substantially aligned with the lead pad on the package substrate when the semiconductor die is positioned on the package substrate. A coil spring is positioned between the contact pad on the semiconductor die and the lead pad on the package substrate so that the axis of the coil spring is substantially parallel to the contact pad contained on the semiconductor die and the lead pad contained on the package substrate.

Abstract: A chip module has a contact area disposed on its outer side formed of a plurality of essentially flat contact elements of electrically conductive material insulated from one another. At least one semiconductor chip having one or more integrated semiconductor circuits that are electrically connected to the contact elements of the contact area via bonding wires. The contact elements of the chip module are formed by a prefabricated lead frame for supporting the at least one semiconductor chip and have on two opposing sides of the chip module outwardly offset terminals arranged in rows next to one another. The outwardly offset terminals are provided for surface mounting the chip module on the mounting surface of an external printed circuit board or an external circuit board substrate.

Abstract: A hollow package includes a package body composed of an epoxy resin having a low thermal coefficient of linear expansion, wherein the package body includes a recess for receiving an electronic component, and leads, for extracting electrodes of the electronic component, extending from the inner surface of the recess, via the upper surface of the package body, to the peripheral surface, and a transparent sealing plate bonded onto the upper surface of the package body with an ultraviolet-curable resin.

Abstract: A semiconductor apparatus includes a thin film belt-like insulating tape having a plurality of predetermined wire patterns thereon, and a plurality of IC chips that are provided on a surface of the insulating tape at uniform spaces in a lengthwise direction and electrically connected with the wire patterns, and further includes thick film reinforcing tapes with sprocket holes for transport use provided at uniform spaces, the reinforcing tapes being provided on both side portions of the insulating tape, in the lengthwise direction.

Abstract: A dual-dies packaging structure is provided. The dual-dies packaging structure includes a lead frame, which further includes a die pad and several lead legs, in which the die pad includes an upper surface and a lower surface. A first die, having several first bonding pads, is fixed on the upper surface of the die pad by, for example, gluing it. The first bonding pads remain exposed. A second die, having several second bonding pads, is fixed on the lower surface by, for example, gluing it. The second bonding pads remain exposed. A bumping redistribution structure layer is located on the second die so as to redistribute each of the second bonding pads to a pseudo-bonding pad. Each pseudo-bonding pad has its proper location with respect to the first bonding pads. Thus, when several bonding wires are used to bond the first bonding pads and the pseudo-bonding pads to the lead legs, bonding wires can be regularly and simply put on without crossing or entangling to each other.

Abstract: A multichip package includes a substrate including a plurality of conductive traces and flexible leads connected to outer ends of at least some of the conductive traces adjacent the periphery of said flexible substrate, the substrate including conductive terminals accessible at a surface thereof connected to at least some of the traces. The package includes a first microelectronic element having a front face including contacts and a back face, the front face of the first microelectronic element confronting the flexible substrate. The package also includes a second microelectronic element larger than the first microelectronic element, the second microelectronic element having a front face including contacts, the second microelectronic element overlying the first microelectronic element with the front face of the second microelectronic element facing toward the substrate.

Abstract: On a circuit chip on which a processing circuit for sensor outputs is formed, bump electrodes and a sealing bump, which has a shape of rectangular frame and is arranged to surround the bump electrodes, are formed by Sn—Pb solder. On a sensor chip provided with a sensing portion, electrode pads to be bonded to the bump electrode and a joining pad to be bonded to the sealing bump are formed. When the sensor chip is connected onto the circuit chip, an air-tight space containing the sensing portion is formed by the sealing bump and the joining pad.

Abstract: A socket terminal assembly includes a socket body having an end with an opening and an opposite end configured to contact the corresponding connection region of a printed circuit board, a contact spring, disposed at the opening of the socket body, to receive and apply a frictional force sufficient to retain the lower end of a pin within the opening of the socket body; and a resilient member, disposed within a lower end of the opening, to apply, to the pin and in response to a downward force applied to the pin, an upward force sufficient to overcome the frictional force of the contact spring. The pin has an end adapted to contact an electrical contacting area of an integrated circuit package and an opposite end configured to be inserted within the opening of the socket body. An intercoupling component includes a socket support member having holes, each hole receiving a corresponding socket terminal assembly.

Abstract: Methods of forming integrated circuitry lines such as coaxial integrated circuitry interconnect lines, and related integrated circuitry are described. An inner conductive coaxial line component is formed which extends through a substrate. An outer conductive coaxial line component and coaxial dielectric material are formed, with the coaxial dielectric material being formed operably proximate and between the inner and outer conductive coaxial line components. In a preferred implementation, the substrate includes front and back surfaces, and a hole is formed which extends through the substrate and between the front and back surfaces. In one implementation, the outer conductive coaxial line component constitutes doped semiconductive material. In another implementation, such constitutes a layer of metal-comprising material. A layer of dielectric material is formed over and radially inwardly of the outer line component. Conductive material is then formed over and radially inwardly of the dielectric material layer.

Abstract: A low elasticity layer (20) having an opening in an electrode arranging area where element electrodes are disposed is provided on a main surface of a semiconductor substrate (10). On the low elasticity layer (20), lands (32) serving as external electrodes are disposed, and pads (30) on the element electrodes, the lands (32) and metal wires (31) for connecting them are integrally formed as a metal wiring pattern (33). A solder resist film (50) having an opening for exposing a part of each land (32) is formed, and a metal ball (40) is provided on the land (32) in the opening. The low elasticity layer (20) absorbs thermal stress and the like caused in heating or cooling the semiconductor device, so as to prevent disconnection of the metal wires (31).

Abstract: There is provided a function element including a resin layer formed on a surface thereof, the resin layer having adhesive property and sealing property, the resin layer having such a pattern that a resin layer does not exist in at least one of following areas: (a) a first area around an area where device performances are influenced by resin of which the resin layer was composed, (b) a second area around pads or bumps, (c) a third area around an area on which a wiring of a substrate will exist when the function element is coupled to the substrate, and (d) a fourth area around an area on which a passive element mounted on a substrate will exist when the function element is coupled to the substrate. The function element prevents extra resin from adhering to an area of the function element where device performances will be influenced by the resin, when the function element is coupled to a substrate with a resin layer being sandwiched therebetween.

Abstract: To realize an ohmic electrode having practically satisfactory characteristics relative to GaAs semiconductors, first formed on an n+-type GaAs substrate are a Ni thin film with a thickness between 8 nm and 30 nm, an In thin film with a thickness between 2 nm and 6 nm and a Ge thin film with a thickness between 10 nm and 50 nm, sequentially. After that, the n+-type GaAs substrate having formed the Ni thin film, In thin film and Ge thin film is annealed at a temperature between 300 to 600° C. for a few seconds to minutes. As a result, the ohmic electrode has a multi-layered structure including an n++-type re-grown GaAs layer re-grown from the n+-type GaAs substrate, InGaAs layer and NiGe thin film. Alternatively, before the annealing, a thin film of a refractory metal or its compound, such as Nb thin film, with or without another thin film of a wiring metal, such as Au thin film, may be further formed on the Ge thin film.

Abstract: A wiring layer of a semiconductor integrated circuit comprises a first conductive film made of a material containing Al. A material, which reacts with Al at a rate lower than that at which Ti reacts with Al, is provided on the first conductive film. A first barrier metal film is formed, and an interlayer insulating film is formed thereon. An opening is formed in the interlayer insulating film so as to expose the first barrier metal film. The opening is buried to form a second conductive film electrically connected to the first conductive film.

Abstract: A semiconductor device having a multilayered interconnection structure comprises a wiring pattern (15) composed of a main wiring metal (13) having a forward-tapered shape and a subsidiary wiring metal (14) of a high-melting-point metal formed on side surfaces of the main wiring metal (13). The wiring pattern (15) as a whole has a width substantially equal to that of a bottom end of the main wiring metal (13). After a silicon oxide film (16) is deposited, a through hole (160) is formed in the silicon oxide film (16). The width of the through hole (160) at its bottom is greater and smaller than those of the upper surface and the lower surface of the main wiring metal (13), respectively.

Abstract: Provided is a semiconductor device having a multi-layered pad, including a first interlevel insulating layer formed on a semiconductor substrate; a first conductive pad formed on the first interlevel insulating layer, the first conductive pad extending lengthwise along a first edge on a first side of a pad window region; a second interlevel insulating layer formed on the first interlevel insulating layer having a first via hole exposing a defined region of the first conductive pad; a first conductive plug formed in the first via hole; a second conductive pad formed on the second interlevel insulating layer, the second conductive pad extending lengthwise along the first edge on the first side of the pad window region and being electrically coupled to the first conductive plug; a third interlevel insulating layer formed on the second interlevel insulating layer having a second via hole exposing a defined region of the second conductive pad; a second conductive plug formed in the second via hole; and a third con

Abstract: A semiconductor device includes a first dielectric layer, a plurality of conductive interconnections formed in the first dielectric layer, a patterned passivation layer formed above the conductive interconnections, and a second dielectric layer formed above and in contact with the passivation layer and the first dielectric layer. A method for forming a semiconductor device includes providing a base layer, forming a first dielectric layer over the base layer, forming a plurality of conductive interconnections in the first dielectric layer, forming a patterned passivation layer above the conductive interconnections, and forming a second dielectric layer above and in contact with the passivation layer and the first dielectric layer.

Abstract: A semiconductor memory device includes: a capacitor formed on a substrate and including a lower electrode, a dielectric film and an upper electrode; a selection transistor formed at the substrate; an electrically conductive plug for providing electrical connection between the selection transistor and the capacitor; and a diffusion barrier film provided between the electrically conductive plug and the lower electrode of the capacitor. The diffusion barrier film is a TaxSi1−xNy film or a HfxSi1−xNy film (where 0.2<x<1 and 0<y<1). The lower electrode includes an Ir film and an IrO2 film which are sequentially formed.

Abstract: An electrode structure of a semiconductor element comprises a wiring 14 formed on one main surface of a semiconductor chip, an insulating film 15 formed on the wiring 14, at least one pad 3 located at a predetermined position on the insulating film 15 and a via-hole 16 formed in the insulating film 15. The via-hole 16 is filled with a metal material for electrically connecting the wiring 14 to the pad 3 and a contact area between the via-hole 16 and the pad 3 is 3% or more of a surface area of the pad 3 on the side of the via-hole 16. With such structure, it becomes possible to restrict occurrence of breakage and/or crack of the insulating film 15 during a time when a bonding wire 18 is connected to the pad 3 to thereby improve the fabrication yield.

Abstract: A bond pad structure for use in wire bonding applications during the packaging of semiconductor devices with reduced bond pad lift-off problem. The bond pad structure contains: (a) a metal bond pad formed in an open window area surrounded by an edge portion of a dielectric layer; and (b) at least one dendritic sub-structure formed in the edge portion of the dielectric layer. The at least one dendritic sub-structure is formed of a metal material and is in contact with the metal bond pad. The dendritic sub-structure is a generally cross-shaped structure containing a first segment which is generally perpendicular to an edge of the metal bond pad to which the dendritic sub-structure is connected, and a second segment with is generally parallel to the edge. The dendritic sub-structure serves two main purposes.

Abstract: The present invention is directed to a method and apparatus for detecting edges through one or more opaque, planarized layers of material. Exemplary embodiments can take full advantage of decreased size geometries associated, such as 0.25 micron technologies, without suffering inaccuracies due to wafer misalignment during processing (e.g., during a photolithographic process). The invention is applicable to any process where an edge is to be detected through a planarized layer which is opaque to visible light. In an exemplary embodiment, an edge of an alignment mark can be detected using an energy source having a wavelength and angle of incidence specifically selected with respect to the optical characteristics and thickness of particular material layers being processed.

Abstract: A portable generator system includes an interface mounting element for supporting a selected engine, from a plurality of engines, with a vertically oriented output shaft when the generator system is positioned on a substantially horizontal surface. A generator is directly coupled to the output shaft of the engine and rotates therewith about a common axis. The generator is selectable from a plurality of generators having different output power characteristics. A movable support cart supports interface, engine and generator and is formed of a single piece of tubular stock. The tubular stock is bent to form two substantially parallel, displaced, U-shaped regions bounded by a third U-shaped region substantially perpendicular thereto wherein the interface element, the selected engine and the selected generator are supported and protected. The cart supports first and second displaced wheels which rotate about a common axis which extends between the first and second regions, parallel to the third region.

Abstract: Various forms of energy, such as mechanical, electrical, and/or heat energy are produced by an energy conversion mechanism which includes a spool, the spool including a shaft on which a compressor and turbine are mounted. A generator is operably connected to the energy conversion mechanism for converting mechanical energy thereof into electrical energy. Fuel and air are supplied separately to the compressor. A regenerator type heat exchanger has a cold side for conducting compressed air traveling from an outlet of a compressor to an inlet of the microturbine, a hot side for conducting hot waste gas from the energy conversion mechanism, and a rotary core movable sequentially through the cold and hot sides for absorbing heat in the hot side and giving up heat in the cold side. A catalytic combustor combusts the fuel at a location upstream of the turbine. During start-up, the catalytic combustor is preheated independently of the heat exchanger by an electric heater.

Abstract: A hydraulic power generation system is provided for generating power using a pseudo-osmosis process which efficiently exploits the osmotic energy potential between two bodies of water having different salinity concentrations. The method and apparatus of the present invention does not require the use of a semi-permeable membrane or other specially formulated material, nor does it require heating or cooling of the fresh water or salt water solution. Moreover, the device may be used to recover energy from a wide variety of fresh water sources, including treated or untreated river run-off, treated waste-water run-off or effluent, storm-drain run-off, partly contaminated fresh water run-off, and a wide variety of other fresh water sources. The device is well suited to power production in a wide variety of geographic locations and under a wide variety of conditions.

Abstract: A power supply assembly for a vehicle includes a generator connected to an engine of the vehicle; a high-voltage bus to which the output voltage of the generator is supplied and to which a high-voltage load is connected; a low-voltage bus connected to the high-voltage bus via a voltage step-down element and to which a starter motor and a low-voltage load are connected; a high-voltage storage cell which a positive terminal thereof is connected to the high-voltage bus and a negative terminal thereof is grounded via a switch element; a low-voltage storage cell which a positive terminal thereof is connected to the low-voltage bus via a key switch and a negative terminal thereof is grounded; and a controller for controlling the opening and closing of the switch element, wherein the controller is constructed so as to monitor the starting and stopping of the engine based on start and stop signals form the engine, and open the switch element when the stopping of the engine is detected.

Abstract: The present invention relates to a dry control cartridge for providing a plurality of voltage and impedance inputs to an electrochemical analysis instrument for verification of its proper functioning. The dry control cartridge includes a battery and a plurality of electrical circuits for providing a plurality of predetermined voltage and impedance outputs. The dry control cartridge is adapted for insertion into an electrochemical analysis device using probe electrodes to measure microvolt-range potential differences, appropriate to the input ranges inherent in the instrument. By comparing the measured voltage and impedance inputs to the predetermined outputs of the cartridge, verification of the instrument's proper functioning and accuracy may be made.

Abstract: A power switching device includes a switching relay for supplying power to a main circuit by switching between power from a main power supply and power from a supplementary power supply, and a control unit for controlling the switching relay. The control unit includes a voltage detecting unit for detecting a voltage value of the power supplied by either the main power supply or the supplementary power supply. The power switching device includes a first switch assisting unit, composed of semiconductor switching elements, for feeding the power from the main power supply to the main circuit when the voltage detecting unit detects that the voltage value of the power is above a predetermined value, and a second switch assisting unit, composed of semiconductor switching elements, for feeding the power from the supplementary power supply to the main circuit when the voltage detecting unit detects that the voltage value of the power is below the predetermined value.

Abstract: Embodiments of an emergency evacuation system are disclosed which may be installed within the knockouts of a panel of a modular work space system. During normal operation a battery power source within the emergency evacuation system is charged by normal AC power supplied through the modular work space system. In the event of a power outage or fire, the battery power source serves to operate emergency lighting.

Abstract: A coil assembly (14) used with a magnet assembly (12) for a linear or planar electric motor (10) is provided herein. The coil assembly (14) includes a plurality of coils (18) attached to a coil base (16) with a plurality of coil supports (22). The coil supports (22) secure the coils (18) to the coil base (16) with the coils (18) spaced apart from a first surface (23) of the coil base (16). As a result thereof, both sides (32), (34) of each coil (18) are exposed for cooling. Further, the coil supports (22) allow the coils (18) to expand laterally with minimal stress and thermal deformation. The coil assembly (14) can also include a plurality of spaced apart covers (62). Each cover (62) fits over one of the coils (18) and is secured to the coil base (16). A fluid (24) can be directed into a fluid passageway (58) around each coil (18) to cool each coil (18).

Abstract: A magnet array (20) for a shaft type linear motor (10) is provided herein. In one embodiment, the magnet array (20) includes a plurality of magnetic, axial sections (40) and a plurality of magnetic, transverse sections (42) positioned along an array axis (34) of the magnet array (20). Each axial section (40) has an axial polarization (52) relative to the array axis (34) and each transverse section (42) has transverse polarization (54) relative to the array axis (34). The resulting magnet array (20) has improved flux density for a given mass. In another embodiment, each magnetic section (36) of the magnet array (20) includes a first channel (60) and a second channel (62) that extends inward from the sides (44,46) of each section (36). The resulting magnet array (20) has a reduced mass for a given flux density. Importantly, for each embodiment, the magnet array (20) has an improved ratio of flux density to magnet mass. This allows the magnet array (20) and the motor (10) to be more efficient.

Abstract: A multiphase linear motor has an elongated stator with a stack of permanent magnets end-to-end along its length and a coaxial drive coil configuration which is such as to leave a gap permitting mechanical support of the permanent magnets at least at intervals along the length of the stator intermediate its ends. Specifically the drive coils comprise sub-coils with arcuate turns which subtend less than 360° around the motor axis to leave free a gap for the aforementioned mechanical support.

Abstract: A a rotating electromagnetic actuator with limited stroke, including at least 2N poles on the stator, N being a whole number, energized by at least one energizer coil and N magnetized parts on the rotor arranged in an air gap of thickness E wherein each magnetized part is juxtaposed with at least one ferromagnetic part with a thickness e between 0 and E, defining one or two air gaps with a total length of E-e.

Abstract: In a diskette, such as a 3.5″ floppy disk, having adjoiningly a permanent magnet generator and a space for inserting a memory card with a magnetic stripe, the affection of leakage magnetic flux from the generator permanent magnet to the memory card and another floppy disk that may be put in the neighborhood of the diskette is substantially eliminated and the generator output is increased. A magnetic shield is disposed only at the portion corresponding to the magnetic stripe of the memory card on a generator housing or a partition between the generator permanent magnet and the memory card space. A magnetic shield ring with a diameter substantially equal to or larger than the outside diameter of the permanent magnet is fixed or pasted on one side end of the rotor permanent magnet adjacent to one of the ends of the diskette case.

Abstract: A new pole configuration for multi-pole homopolar bearings proposed in this invention reduces rotational losses caused by eddy-currents generated when non-uniform flux distributions exist along the rotor surfaces. The new homopolar magnetic bearing includes a stator with reduced pole-to-pole and exhibits a much more uniform rotor flux than with large pole-to-pole gaps. A pole feature called a pole-link is incorporated into the low-loss poles to provide a uniform pole-to-pole gap and a controlled path for pole-to-pole flux. In order to implement the low-loss pole configuration of magnetic bearings with small pole-to-pole gaps, a new stator configuration was developed to facilitate installation of coil windings. The stator was divided into sector shaped pieces, as many pieces as there are poles. Each sector-shaped pole-piece can be wound on a standard coil winding machine, and it is practical to wind precision layer wound coils.

Abstract: A superconducting electromechanical rotating (SER) device, such as a synchronous AC motor, includes a superconducting field winding and a one-layer stator winding that may be water-cooled. The stator winding is potted to a support such as the inner radial surface of a support structure and, accordingly, lacks hangers or other mechanical fasteners that otherwise would complicate stator assembly and require the provision of an unnecessarily large gap between adjacent stator coil sections. The one-layer winding topology, resulting in the number of coils being equal to half the number of slots or other mounting locations on the support structure, allows one to minimize or eliminate the gap between the inner radial ends of adjacent straight sections of the stator coilswhile maintaining the gap between the coil knuckles equal to at least the coil width, providing sufficient room for electrical and cooling element configurations and connections.

Abstract: An electronic motor (1) of the electronic commutation type provided with a rotor (5) presenting a centre of rotation (C0) and a number of radial teeth (16) located along respective radial directrixes (K) passing through the centre of rotation (C0) and radially limited by a surface (35) presenting a bending centre (C1) located at any point along a radial directrixx (K) with the exception of a part (T1) included between said centre of rotation (C0) and the surface (35) itself excluding the centre of rotation (C0) and the internal surface (35).

Abstract: An electric rotary machine has a concentrated winding stator and a rotor facing the stator with a gap therebetween. The stator has M number of stator magnetic poles extending in the radial direction from an annular yoke, pole pieces each extending in the circumferential direction of the rotor from the tip end of each of the stator magnetic poles, and windings wound around the stator magnetic poles. The rotor having a permanent magnet with P number magnetic poles, wherein P:M=6n−2:6n, or P:M=6n+2:6n, where n is an integer not less than 2, and the figure of each of the pole pieces is so determined that a gap formed between the pole piece and the rotor is increased going toward the both ends of the pole piece.