Patents Issued in April 1, 2003
-
Patent number: 6541848Abstract: A semiconductor device includes a semiconductor chip, a resin package for sealing said semiconductor chip, metal layers provided on a mounting-side surface of said resin package in an exposed manner and connecting members for electrically connecting electrode pads provided on the semiconductor chip and the metal layers. The metal layers are provided with stud bumps on the mounting side, the stud bumps serving as external connection terminals.Type: GrantFiled: October 13, 1998Date of Patent: April 1, 2003Assignee: Fujitsu LimitedInventors: Toshimi Kawahara, Mamoru Suwa, Masanori Onodera, Syuichi Monma, Shinya Nakaseko, Takashi Hozumi
-
Patent number: 6541849Abstract: Memory chips containing memory devices are arranged to be mounted in a memory package with the major axis of the memory chip aligned substantially parallel with the major axis of its memory package. Memory chips include a first power input chip bond pad in each of at least three quadrants of the memory chip. Memory chips include a second power input chip bond pad in each of at least three quadrants of the memory chip. The chip bond pads are interposed between memory banks of the memory device and the sides of the memory chip containing the memory device. Lead-over-chip leadframes for coupling the chip bond pads to the interconnect pins of a memory package contain at least one composite lead for coupling an interconnect pin to chip bond pads in multiple quadrants or on opposite sides of the memory chip. Memory assemblies include memory chips having chip bond pads on both sides of the memory chip shorted to each other by a single lead of the lead-over-chip leadframe.Type: GrantFiled: August 25, 2000Date of Patent: April 1, 2003Assignee: Micron Technology, Inc.Inventor: Frankie F. Roohparvar
-
Patent number: 6541850Abstract: The formation of routing traces on an external surface of a semiconductor device, such as a flip-chip, which has a plurality of ball or bump sites patterned in specific locations, wherein the ball or bump sites are in electrical communication with external communication traces which are used to route signals from the flip-chip integrated circuitry. Such external communication traces generally result in unused space on the exterior surface of the flip-chip. This unused space can be utilized for forming routing traces to connect portions of the internal circuitry of the flip-chip rather than forming such routing traces internally, for forming routing traces to connect two or more semiconductor dice, or for forming routing traces for use as repair mechanisms.Type: GrantFiled: July 27, 2001Date of Patent: April 1, 2003Assignee: Micron Technology, Inc.Inventors: Kevin G. Duesman, Warren M. Farnworth
-
Patent number: 6541851Abstract: In a semiconductor device, a lead frame is adhered to a base substrate for heat dissipation via an insulating layer, and an outward guided terminal portion is formed by perpendicularly upwardly bending an end of the lead frame after the mounting of one or more of power semiconductor elements on the lead frame. A recessed portion is formed beforehand in a portion of the lead frame to be bent, and it is ensured that the lead frame does not adhere to the surface of the base substrate in this recessed portion when the lead frame is adhered to the base substrate via the insulating layer before the bending of the lead frame. By virtue of this structure, manufacturing is simplified and manufacturing costs are reduced.Type: GrantFiled: July 20, 2001Date of Patent: April 1, 2003Assignee: Hitachi, Ltd.Inventors: Yasushi Sasaki, Shogo Tani, Yoshihiro Uchino, Kiyotaka Tomiyama, Yutaka Maeno
-
Patent number: 6541852Abstract: A microelectronic component is fabricated by bonding a flexible sheet in tension on a rigid frame so that the sheet spans an aperture in the frame, and performing one or more operations on features on the flexible sheet which will be incorporated into the finished component. The frame maintains dimensional stability of the sheet and aids in regsitration of the sheet with external elements such as processing tools or other parts which are to be assembled with the sheet. Desirably, the frame has a coefficient of thermal expansion different from that of the sheet so that when the sheet is brought from the bonding temperature to the temperature used in processing, differential thermal expansion or contraction will cause increased tension in the sheet.Type: GrantFiled: February 12, 2001Date of Patent: April 1, 2003Assignee: Tessera, Inc.Inventors: Masud Beroz, Thomas H. DiStefano, John W. Smith
-
Patent number: 6541853Abstract: A structure and method thereof for providing an electrically conductive path between a first conductive point and a second conductive point. The structure includes an insulating material disposed between the first conductive point and the second conductive point. A dipole material is distributed within the insulating material. The dipole material is comprised of randomly oriented magnetic particles. The magnetic particles in a selected localized region of the insulating material are aligned to form an electrically conductive path between the first conductive point and the second conductive point through the insulating material.Type: GrantFiled: September 7, 1999Date of Patent: April 1, 2003Assignee: Silicon Graphics, Inc.Inventor: William Patrick Hussey
-
Patent number: 6541854Abstract: A super low profile package with high efficiency of heat dissipation comprises the substrate, the heat sink, the die, the wires and the plastic mold. The heat sink adheres to the ground ring by the extending part of the heat sink, and the first surface of the die adheres to the heat sink. In addition, the die is connected to the substrate by the wires, and the plastic mold encapsulates the die, the heat sink and the wires. The chip package according to the invention possesses the small size and high efficiency of heat dissipation; besides, it also decreases the production cost for eliminating the conventional procedures of taping and de-taping.Type: GrantFiled: June 29, 2001Date of Patent: April 1, 2003Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chien-Ping Huang, Tzong-Dar Her
-
Patent number: 6541855Abstract: A printed board unit includes a printed board including lands thereon, a semiconductor device unit, and an attachment mechanism to attach the semiconductor device unit to the printed board. The semiconductor device unit includes a heat transfer member, a semiconductor device including first and second surfaces parallel to each other, the first surface having lands thereon, and a socket including contacts protruding from first and second surfaces of the socket, the first and second surfaces being parallel to each other. In the semiconductor device unit, the semiconductor device and the socket are attached to the heat transfer member so that the second surface of the semiconductor device opposes the heat transfer member. The lands of the semiconductor device are electrically connected to the lands of the printed board unit via the contacts of the socket.Type: GrantFiled: February 23, 2001Date of Patent: April 1, 2003Assignee: Fujitsu LimitedInventor: Yoshinori Uzuka
-
Patent number: 6541856Abstract: A high density semiconductor package with thermally enhanced properties is described. The semiconductor package includes a pair of lead frames, each being attached to a respective semiconductor die. The dies are attached to respective lead frames via an adhering material, such as a tape. Further, the dies are each electrically connected to fingers of each lead frame. In one illustrated embodiment, the dies and portions of the fingers are encapsulated in such a way as to leave one surface of each die exposed. In another illustrated embodiment, heat dissipation for the semiconductor package occurs through exposed fingers of the lead frames which adhere semiconductor dies within a cavity located therebetween.Type: GrantFiled: June 6, 2001Date of Patent: April 1, 2003Assignee: Micron Technology, Inc.Inventors: David J. Corisis, Mike Brooks, Mark S. Johnson, Larry D. Kinsman
-
Patent number: 6541857Abstract: A method of forming BGA interconnections having improved fatigue life is disclosed. In particular, a combination of mask-defined and pad-defined solder joints are selectively positioned within the BGA package. The mask-defined solder joints possess a high equilibrium height, which forces the pad-defined solder joints to elongate, thereby making the pad-defined solder joints more compliant. Further, the pad-defined solder joints possess a slightly longer fatigue life because the stress concentrations found in the mask-defined solder joints are not present in the pad-defined solder joints. Therefore, the fatigue life of BGA packages is increased by implementing a majority of mask-defined solder joints to maintain a high equilibrium height, and selectively placing pad-defined solder joints in high stress areas of the BGA package.Type: GrantFiled: January 4, 2001Date of Patent: April 1, 2003Assignee: International Business Machines CorporationInventors: David V. Caletka, Eric A. Johnson
-
Patent number: 6541858Abstract: Integrated circuit interconnect alloys having copper, silver or gold as the major constituent element. The resulting reduction in melting temperature allows for improved coverage of high aspect ratio features with reduced deposition pressure. The alloys are used to fabricate interconnects in integrated circuits, such as memory devices. The interconnects can be high aspect ratio features formed using a dual damascene process. The integrated circuits having the interconnects are applicable to semiconductor dies, devices, modules and systems.Type: GrantFiled: December 17, 1998Date of Patent: April 1, 2003Assignee: Micron Technology, Inc.Inventor: Paul A. Farrar
-
Patent number: 6541859Abstract: A typical integrated-circuit fabrication requires interconnecting millions of microscopic transistors and resistors with aluminum wires. Making the aluminum wires flush, or coplanar, with underlying insulation requires digging trenches in the insulation, and then filling the trenches with aluminum to form the aluminum wires. Trench digging is time consuming and costly. Moreover, aluminum has higher electrical resistance than other metals, such as silver. Accordingly, the invention provides a new “self-trenching” or “self-planarizing” method of making coplanar silver wires. Specifically, one embodiment forms a first layer that includes silicon and germanium; oxidizes a region of the first layer to define an oxidized region and a non-oxidized region; and reacts silver with the non-oxidized region. The reaction substitutes, or replaces, the non-oxidized region with silver to form silver wires coplanar with the first layer.Type: GrantFiled: July 11, 2000Date of Patent: April 1, 2003Assignee: Micron Technology, Inc.Inventors: Leonard Forbes, Paul A. Farrar, Kie Y. Ahn
-
Patent number: 6541860Abstract: An integrated circuit and a method for manufacture thereof are provided having a semiconductor substrate with a semiconductor device. A device dielectric layer is formed on the semiconductor substrate. An opening is formed in the dielectric layer. A barrier layer with an alloying element is deposited to line the opening in the dielectric layer. A conductor core is deposited on the barrier layer to fill the opening and connect to the semiconductor device. The conductor core is annealed causing migration of the alloy element into the conductor core.Type: GrantFiled: June 5, 2001Date of Patent: April 1, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Christy Mei-Chu Woo, Pin-Chin Connie Wang, Joffre F. Bernard
-
Patent number: 6541861Abstract: A semiconductor manufacturing method has the steps of preparing an SOI substrate having a supporting substrate, an insulating film formed above the supporting substrate, a semiconductor region formed above the insulating film, and an intermediate layer formed between the supporting substrate and the insulating film, forming a semiconductor element in the semiconductor region, and removing the intermediate layer to separate the supporting substrate and the semiconductor region in which the semiconductor element is formed.Type: GrantFiled: June 29, 2001Date of Patent: April 1, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Kazuyuki Higashi, Tamao Takase, Hideki Shibata
-
Patent number: 6541862Abstract: A semiconductor device including an interconnection structure having superior electrical characteristics and allowing higher speed of operation and lower power consumption even when miniaturized, manufacturing method thereof and a method of designing a semiconductor circuit used in the manufacturing method are provided. In the semiconductor device, a conductive region is formed on a main surface of a semiconductor substrate. A first interconnection layer is electrically connected to the conductive region, has a relatively short line length, and contains a material having relatively high electrical resistance. A first insulator is formed to surround the first interconnection layer and has a relatively low dielectric constant. A second interconnection layer is formed on the main surface of the semiconductor substrate, contains a material having low electrical resistance than the material contained in the first interconnection layer, and has longer line length than the first interconnection layer.Type: GrantFiled: July 19, 2001Date of Patent: April 1, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hiroyuki Amishiro, Motoshige Igarashi
-
Patent number: 6541863Abstract: There is provided a semiconductor device comprising an insulating layer which is partly formed of porous material, and a method for fabricating the device. A stray capacitance of adjacent wiring lines is significantly reduced by reducing the amount of material, i.e., by using porous material in the insulating layer of a metallization layer. In one embodiment, the porous layer may be fabricated separately on a further substrate and is subsequently transferred to the product wafer while the further substrate and the product wafer are appropriately aligned to each other. In this way, fabrication of complete metallization layers having a reduced dielectric constant in advance or concurrently with the product wafer carrying the MOS structure is possible. Due to the reduced capacitance of the wiring lines of the metallization layer, signal performance and/or power consumption of an integrated circuit is improved.Type: GrantFiled: January 5, 2000Date of Patent: April 1, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Manfred Horstmann, Karsten Wieczorek, Gert Burbach
-
Patent number: 6541864Abstract: In a semiconductor device having a wire structure, the thickness of a first insulation film substantially corresponds to the depth of a contact hole. A surface of a second insulation film serves as a bottom face of a wire groove. Regarding the contact hole, only a side wall portion intersecting a direction of the wire groove has a substantial taper angle. This configuration can be attained under conditions where an etching selectivity of the first insulation film to the second insulation film is set to be slightly lower and a portion of the second insulation film where a opening edge of an opening portion is exposed is slightly etched during etching process of the wire groove. With a semiconductor device having this structure, a conductive material embedding characteristic can be enhanced, while preventing possibility of short-circuit even when an interval between wires is reduced.Type: GrantFiled: September 24, 1999Date of Patent: April 1, 2003Assignee: Kabushiki Kaisha ToshibaInventor: Yoshiaki Fukuzumi
-
Patent number: 6541865Abstract: A novel dielectric composition is provided that is useful in the manufacture of electronic devices such as integrated circuit devices and integrated circuit packaging devices. The dielectric composition is prepared by crosslinking a thermally decomposable porogen to a host polymer via a coupling agent, followed by heating to a temperature suitable to decompose the porogen. The porous materials that result have dielectric constants less than about 3.0, with some materials having dielectric constants less than about 2.5. Integrated circuit devices, integrated circuit packaging devices, and methods of manufacture are provided as well.Type: GrantFiled: June 26, 2001Date of Patent: April 1, 2003Assignee: International Business Machines CorporationInventors: Craig Jon Hawker, James L. Hedrick, Robert D. Miller, Willi Volksen
-
Patent number: 6541866Abstract: Nickel silicidation of a gate electrode is controlled using a cobalt barrier layer. Embodiments include forming a gate electrode structure comprising a lower polycrystalline silicon layer, a layer of cobalt thereon and an upper polycrystalline silicon layer on the cobalt layer, depositing a layer of nickel and silicidizing, whereby the upper polycrystalline silicon layer is converted to nickel suicide and a cobalt silicide barrier layer is formed preventing nickel from reacting with the lower polycrystalline silicon layer.Type: GrantFiled: February 7, 2001Date of Patent: April 1, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Jacques J. Bertrand, Christy Mei-Chu Woo, Minh Van Ngo, George J. Kluth
-
Patent number: 6541867Abstract: A component for mounting semiconductor chips or other microelectronic units includes a compliant, sheet-like body with arrays of sheet-like conductive pads on upper and lower surfaces of the body. Flexible leads extending through the body interconnect conductive pads on the upper and lower surfaces. The leads are desirably formed from wire, such as gold wire, that is bonded to the conductive pads using a conductive epoxy or a eutectic bonding alloy. The component is made using sacrificial base sheets having conductive terminal portions to which the leads are initially bonded. The compliant body is formed by injecting a flowable material between the base sheets, curing the material and removing the base sheets by etching. The flowable material surrounds the leads such that the leads are supported by the cured compliant layer. The component may be used as an interposer or as a test socket.Type: GrantFiled: July 26, 2000Date of Patent: April 1, 2003Assignee: Tessera, Inc.Inventor: Joseph Fjelstad
-
Patent number: 6541868Abstract: Conductive links are provided between conductive materials, e.g., metals, separated by a non-conductive material, e.g., a silicon based glass material. In a preferred embodiment a single pulse of laser energy is applied to at least one of the conductive materials to produce mechanical strain therein which strain initiates a fracturing of the non-conductive material so as to provide at least one fissure therein extending between the conductive materials. The laser energy pulse further causes at least one of the conductive materials to flow in such fissure to provide a conductive link between the conductive materials. Preferably, the non-conductive material is formed in layers such that an interface between the layers controls the fissures.Type: GrantFiled: December 8, 2000Date of Patent: April 1, 2003Assignee: Massachusetts Institute of TechnologyInventor: Joseph B. Bernstein
-
Patent number: 6541869Abstract: In a scalable data processing apparatus, particularly a data storage apparatus, one or more thin-film devices which form a substantially planar layer comprise a plurality of sublayers of thin film. Two or more thin-film devices are provided as an integrated stack of the substantially planar layers which form the thin-film devices, such that the apparatus thereby forms a stacked configuration. Each thin-film device comprises one or more memory areas which form matrix addressable memories and additionally circuit areas which form electronic thin-film circuitry for controlling, driving and addressing memory cells in one or more memories. Each memory device has an interface to every other thin-film device in the apparatus, said interfaces being realized with communication and signal lines as well as supporting circuitry for processing extending vertically through dedicated interface areas in the thin-film device.Type: GrantFiled: September 18, 2000Date of Patent: April 1, 2003Assignee: Thin Film Electronics ASAInventors: Hans Gude Gudesen, Per-Erik Nordal, Geirr I. Leistad, Rolf Magnue Berggren, Bengt Göran Gustafsson, Johan Roger Axel Karlsson
-
Patent number: 6541870Abstract: A semiconductor package with stacked chips is proposed, wherein at least two chips are stacked on a chip carrier in a stagger manner as to dispose a second chip on a first chip, and a supporting element is disposed on the second chip and dimensioned to cover area on the second chip with no support from the first chip. The supporting element provides support to the second chip, allowing bonding wires to be successfully connected to the second chip, without the occurrence of cracks of the second chip. The supporting element can be formed on its lower surface with protruding portions positioned outside edge sides of the second chip; this is to enhance structural strength of the supporting element, and help maintain the second chip intact in structure during wire bonding. The supporting element can further have its upper surface to be exposed to the atmosphere; this improves heat dissipating efficiency of the semiconductor package.Type: GrantFiled: November 14, 2001Date of Patent: April 1, 2003Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chien-Ping Huang, Tzong-Da Ho, cheng-Hsu Hsiao
-
Patent number: 6541871Abstract: A method for fabricating a stacked chip package comprises the steps of: (a) attaching a first semiconductor chip to an upper surface of a substrate through a first adhesive layer; (b) partially curing the first adhesive layer such that it gels but does not harden; (c) attaching a second semiconductor chip to the first semiconductor chip through a second adhesive layer; (d) curing the first and second adhesive layer; (e) electrically coupling the first and second semiconductor chips to a structure for making external electrical connection provided on the substrate; and (f) forming a package body over the first semiconductor chip, the second semiconductor chip, and a portion of the upper surface of the substrate. Since the first and second adhesive layers may be cured in one single step, the cycle time may be reduced thereby cutting down the production cost.Type: GrantFiled: March 18, 2002Date of Patent: April 1, 2003Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Tsung-Ming Pai, Chung-Hao Lee, Pao-Hei Chang Chin, Meng-Hui Lin, Song-Fei Wang
-
Patent number: 6541872Abstract: An improved method of attaching a semiconductor die to an organic substrate and an improved semiconductor package are herein disclosed. The die package comprises a die secured to a printed circuit board (PCB) with an adhesive tape. The adhesive tape may be of single or multi-layer construction. In one embodiment, a tri-layer tape is disclosed having a carrier layer sandwiched between two identical adhesive layers. In one embodiment, a method is disclosed utilizing a pressure sensitive, thermoset adhesive tape. In another embodiment, a method is disclosed utilizing a B-stageable thermoset adhesive. In yet another embodiment, a method using a pressure sensitive adhesive is disclosed. In still yet another embodiment, a method is disclosed wherein the adhesive is a hybrid material having both thermoset and thermoplastic components.Type: GrantFiled: January 11, 1999Date of Patent: April 1, 2003Assignee: Micron Technology, Inc.Inventors: Edward A. Schrock, Tongbi Jiang
-
Patent number: 6541873Abstract: A 90 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and gives an integrated circuit designer added flexibility and uniformity in designing the integrated circuit. Further, a patterned bump array for a top metal layer of an integrated circuit having a plurality of 90 degree bump placement structures is provided.Type: GrantFiled: November 29, 2001Date of Patent: April 1, 2003Assignee: Sun Microsystems, Inc.Inventors: Sudhakar Bobba, Tyler Thorp, Dean Liu
-
Patent number: 6541874Abstract: Microelectronic assemblies are encapsulated using disposable frames. The microelectronic assemblies are disposed within an aperture defined by a frame. The aperture is covered by top and bottom sealing layers so that the frame and sealing layers define an enclosed space encompassing the assemblies. The encapsulant is injected into this closed space. The frame is then separated from the encapsulation fixture and held in a curing oven. After cure, the frame is cut apart and the individual assemblies are severed from one another. Because the frame need not be held in the encapsulation fixture during curing, the process achieves a high throughput.Type: GrantFiled: June 6, 2001Date of Patent: April 1, 2003Assignee: Tessera, Inc.Inventors: Tan Nguyen, Craig S. Mitchell, Thomas H. DiStefano
-
Patent number: 6541875Abstract: A free piston internal combustion engine, particularly suitable for use in a vehicle having an electric motor as a prime mover, has a combustion cylinder, a piston reciprocally disposed within the cylinder, and a piston rod coupled with a piston. A linear electric generator/motor includes at least one magnet carried by the piston rod and at least one coil positioned in association with the at least one magnet. An electrical circuit is coupled with each of the at least one coil and a battery. The at least one magnet induces an electrical cutrent within the coil to energize a capacitor within the electrical circuit. The charge from the capacitor may be used to charge the battery. The capacitor and/or battery provides output electrical current which is used to drive the electric motor.Type: GrantFiled: May 17, 2000Date of Patent: April 1, 2003Assignee: Caterpillar IncInventors: Willibald G. Berlinger, Francis J. Raab
-
Patent number: 6541876Abstract: A generator system arranged to respond to a variation in the load with a generous margin regardless of a change in the output of the generator or the engine due to degradation with the passage of time. The output current of the generator is rectified by a converter composed of thyristors in a bridge configuration of which the direct current output is converted by an inverter into an alternating current at a commercial frequency and connected to a load. The engine speed is controlled so that the conduction angle of the thyristors in the converter can be held at a target degree. As the target degree stays within a range smaller than the maximum limit, the generator runs with a margin, thus readily responding to a variation in the load. When the throttle opening is excessively opened, the target conduction angle is decreased to increase a target speed of the engine, hence inhibiting the engine from being overloaded and running at an excessive higher speed.Type: GrantFiled: June 25, 2001Date of Patent: April 1, 2003Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Motohiro Shimizu, Masashi Nakamura
-
Patent number: 6541877Abstract: The object of the present invention is to provide a wind power generation system characterized by simplified field weakening of the magnetic flux of the permanent magnet of a shaft generator and a speed change control over an extensive range. In a wind power generation system comprising a main shaft where a vane is mounted, a generator connected to the main shaft for transmitting the rotating power of the vane, an inverter for converting the electric power of the generator, a controller for controlling the inverter, a means for controlling the pitch of the vane meeting the wind velocity requirements, a brake, and an anemometer/anemoscope; the present invention is characterized in that the rotor of the rotary machine comprising a permanent magnet is split to allow relative movement.Type: GrantFiled: September 14, 2001Date of Patent: April 1, 2003Assignee: Hitachi, Ltd.Inventors: Houng Joong Kim, Shigeta Ueda
-
Patent number: 6541878Abstract: A connector integrates a transformer and a “phantom” power provision, thus enabling a reduction in size along with an increase in versatility for electronic communication. The transformer may comprise a pair of magnetic transformers. The power source may be connected to center taps of the magnetic transformers for providing a bias voltage to the connector.Type: GrantFiled: July 19, 2000Date of Patent: April 1, 2003Assignee: Cisco Technology, Inc.Inventor: Wael W. Diab
-
Patent number: 6541879Abstract: An apparatus including a controller, a voltage supply circuit and a power management circuit. The controller may include one or more ports. The voltage supply circuit may be configured to generate an unregulated voltage supply. The power management circuit may be configured to receive the unregulated voltage supply and present a regulated power supply voltage to each of the one or more ports. In one example, the apparatus may be implemented in a Universal Serial Bus (USB) hub.Type: GrantFiled: March 23, 2001Date of Patent: April 1, 2003Assignee: Cypress Semiconductor Corp.Inventor: David G. Wright
-
Patent number: 6541880Abstract: There is provided a linear motor, having an armature and a needle with magnetism, in which the armature has at least a magnetic pole of a first polarity having a first opposed part and another magnetic pole of a second polarity having a second opposed part; the needle is held by the first opposed part, and is further held by the second opposed part; and a distribution of magnetism of the needle according to a position in the movable direction thereof. In this way, a leak of a magnetic flux from pole teeth passing between the pole teeth of the armature is decreased to increase a thrust and braking force of the needle, which is thereby enabled to generate a greater or smaller thrust in a specific section or sections than the thrust during usual linear movement.Type: GrantFiled: February 27, 2001Date of Patent: April 1, 2003Assignee: Hitachi, Ltd.Inventors: Takashi Okada, Kim Houng Joong, Kazuo Tahara, Kohji Maki, Kouki Yamamoto, Miyoshi Takahashi, Kenji Miyata, Ryoichi Takahata
-
Patent number: 6541881Abstract: A throttle valve assembly having a direct current torque motor assembled and calibrated as a subassembly or unit and installed on the throttle body and the throttle plate subsequently installed. The rotor is a disc defining magnetic poles and an axial air gap with the stators which are assembled in a cup-shaped housing. The housing and stators are assembled over the rotor shaft and rotor and attached to a cover plate to form a motor subassembly. The shaft of the motor subassembly is inserted in bearings in the throttle body and the subassembly secured to the throttle body by fasteners through the cover plate. The throttle plate is then installed in a slot in the motor shaft through the air passage in the throttle body.Type: GrantFiled: February 17, 1999Date of Patent: April 1, 2003Assignee: Eaton CorporationInventor: David Turner
-
Patent number: 6541882Abstract: Inner notches (225A, 226A) for adjusting the cogging torque of a rotor (21) are formed on a stator (22) in a small-size power generator (20). Since the inner notches (225A, 226A) are formed on an inner periphery of a rotor accommodation hole (230) within an angular range of ±45° around a magnetic flux direction of a first magnetic circuit (100) having a smaller magnetic reluctance at a rotation center of the rotor (21), the cogging torque can be effectively reduced. Accordingly, even when the size of components such as an oscillating weight and a power spring is reduced for making a thin timepiece, rotation startability of the rotor can be improved, thus improving power generation efficiency of the small-size power generator.Type: GrantFiled: January 5, 2001Date of Patent: April 1, 2003Assignee: Seiko Epson CorporationInventor: Kinya Matsuzawa
-
Patent number: 6541883Abstract: A shield structure for reducing radio frequency interference (RFI) from an electric motor situated within a fuel pump housing having an end with a fuel inlet and another end with a fuel outlet. The shield structure includes, first of all, an electrically insulative and hollow cup-like outer cover mountable on an end of the fuel pump housing adjacent the brushes and commutator of the electric motor. The outer cover has an inner surface, an outer surface, and preferably a fuel outlet opening defined therethrough. In addition, the shield structure includes an electrically conductive outer coat layer formed on substantially all of the outer surface of the outer cover. Lastly, the shield structure includes means for electrically grounding the outer coat layer to the electric motor of the fuel pump housing.Type: GrantFiled: May 1, 2001Date of Patent: April 1, 2003Assignee: Walbro CorporationInventor: Bradley L. Uffelman
-
Patent number: 6541884Abstract: A pump unit for medical and food use, including: a stator provided with a number n of poles and powered by a power and control circuit fed by alternating electric current; a rotor having an equal number n of poles, which is fixed directly onto a shaft of a pump; and a jacket of amagnetic material which isolates the rotor from the outside and is positioned within the air gap between the rotor and the stator.Type: GrantFiled: July 18, 2000Date of Patent: April 1, 2003Inventor: Gabriele Croci
-
Patent number: 6541885Abstract: The invention relates to a magnetic bearing assembly of a rotor in a stator, with at least one magnetic bearing (1) comprising a stator part (2) and a rotor part (3) arranged coaxially thereto in the operating position without contacting the stator part. The bearing effective area of the rotor part is formed by a radial exciting system (6) having a permanent magnet (4), while the stator part (2) comprises a high-temperature superconductor concentrically surrounding the radial exciting system (6) while maintaining an annular air gap (10).Type: GrantFiled: March 15, 2002Date of Patent: April 1, 2003Assignee: Atlas Copco Energas GmbHInventors: Wolf-Rüdiger Canders, Hardo May
-
Patent number: 6541886Abstract: A motor comprises a stator, a rotor being arranged in and facing said stator, an urging member which urges a center rotation shaft of the rotor in an axial direction, and a bearing which rotatably holds the rotor at a predetermined position while receiving an urging force by the urging member. The stator is provided with a resin coil bobbin made by insert molding and integratedly assembled with a metal stator core. The stator core is arranged in and faces the rotor and forms a magnetic circuit therewith. The coil bobbin is arranged at the end side of the rotor. A holding portion is integratedly formed, the holding portion holds the urging member so as to urge the rotor to the bearing side. A curling base is fitted in. The curling base is formed such that a flat plate-shaped metal plate is rounded from outside of a winding wound by the electric coil bobbin in the circumference direction of the stator.Type: GrantFiled: June 12, 2001Date of Patent: April 1, 2003Assignee: Sankyo Seiki Mfg., Co. Ltd.Inventor: Eiji Mayumi
-
Patent number: 6541887Abstract: A motor-generator is disclosed, in which electromagnet coils are arranged at axially opposite ends of the stator, each to each end, while connections among winding sets are changed in response to the rpm of the rotor. This makes it possible to control the voltage, either at high speed or at low speed, thereby increasing the torque at low speed, or the torque on the rotor shaft at low speed and rendering the voltage stable. A rotor is comprised of a cylindrical magnetic path axially elongating to extent confronting the electromagnet coils, and a permanent-magnet member of more than one permanent-magnet piece extending axially over the magnetic path.Type: GrantFiled: August 7, 2001Date of Patent: April 1, 2003Inventor: Hideo Kawamura
-
Patent number: 6541888Abstract: A winding body has a winding area (31) for a winding (13), which winding area (31) is formed by a winding carrier (32) and two legs (34, 35) which define the winding area (31) in axial direction (L) and are connected with the winding carrier (32). The winding carrier (32) has a locking device (40) for locking the winding body (30) at a winding tooth (24). Further, a temperature sensor (50) for measuring the temperature in a coil (25) can be provided in the winding body (30). The winding body (30) has a receiving area (36) for a connection device (70) for the windings (13), wherein the receiving area (36) is formed by one of the legs (35), an elongation area (33) of the winding carrier (32) extending beyond this leg (35), and a fixing leg (60) at a distance from the leg (35).Type: GrantFiled: January 19, 2001Date of Patent: April 1, 2003Assignee: Mannesmann Sachs AGInventors: Marcus van Heyden, Horst Oppitz, Jens Baumeister, Edmund Grau
-
Patent number: 6541889Abstract: In a DC motor, a plurality of bobbins is respectively mounted on teeth of an armature core. The armature core is comprised of an internal core unit and an external core unit that is coaxially disposed outside the internal core unit. A plurality of armature coils is respectively wound around the bobbins. A case has a plurality of first terminal members that are respectively connected to commutator segments. Each of the armature coils is connected to each other via the first terminal members. Each of the bobbins includes a second terminal member that is coupled to one of the first terminal members.Type: GrantFiled: March 15, 2002Date of Patent: April 1, 2003Assignee: Denso CorporationInventors: Kiyonori Moroto, Eiji Iwanari, Motoya Ito
-
Patent number: 6541890Abstract: A brush-less rotary electric machine is comprised of a frame having a first and second walls, a stator core fixed to the frame, an armature coil formed of conductor segments, a stationary yoke, a rotary yoke disposed opposite the stationary yoke, first claw pole members disposed opposite the stator core, second claw pole members disposed opposite the stationary yoke, and a field coil fixed to the stationary yoke. The armature coil has radial air passages formed among connection portions of the conductor segments, and the second claw pole members have a fan-shaped projection portion. When the claw pole members rotate, the projection portion supplies cooling air to the radial air passages to cool the second coil end.Type: GrantFiled: July 26, 2001Date of Patent: April 1, 2003Assignee: Denso CorporationInventors: Nakato Murata, Yoshiki Tan, Tsutomu Shiga
-
Patent number: 6541891Abstract: In a rotor having a printed wiring commutator member as a printed wiring board in which a shaft installation hole is installed at the center of a printed wiring board, at least six segment patterns separated by slits are formed around the shaft installation hole, and simultaneously, at least three conductive bodies connect every two other segment patterns, terminal connection patterns are arranged at the outer circumference of the printed wiring board, a printed wiring commutator member is formed, not by through hole plating, as a means for forming the at least three conductive bodies for connecting every two other segment patterns, a plurality of air-core armature coils are installed at the side opposite to the segment patterns, and terminals of the air-core armature coils are connected to the terminal connection patterns through notches arranged at the outer circumference.Type: GrantFiled: June 19, 2001Date of Patent: April 1, 2003Assignee: Tokyo Parts Industrial Co., Ltd.Inventor: Tadao Yamaguchi
-
Patent number: 6541892Abstract: An actuator is formed by using at least one flexure that is continuously flexible between a rigid connection to a stator and a rigid connection to a translator. The one or more continuously flexible flexures provide a long range of translator motion when combined with an electrostatic levitation arrangement. In selected embodiments, the flexures that are continuously flexible are straight beam flexures, so as to provide a high degree of stiffness. In other embodiments, the flexures are pre-bent to provide a longer switching throw from a relaxed state. Where the translator is required to be displaced in a generally straight-line direction, some off-axis displacement will occur, but is preferably accompanied by a stepping of a levitation voltage pattern. In another embodiment one and only one straight beam flexure is used and the levitator is caused to rotate about a rotational axis that is intersected by the one straight beam flexure.Type: GrantFiled: January 16, 2001Date of Patent: April 1, 2003Assignee: Agilent Technologies, Inc.Inventor: Storrs T. Hoen
-
Patent number: 6541893Abstract: A novel programmable SAW filter with switchable multi-element interdigital transducers (IDTs) controlled by a microprocessor or a computer is provided that realizes the tunability of both center frequency and bandwidth of the SAW filter. The filter possesses the feature of the programmability of both center frequency and 3 dB bandwidth. As an example design, the center frequency of the SAW filter ranges from 126.8 MHz to 199.1 MHz while the 3 dB bandwidth ranges from 18.8 MHz to 58.9 MHz. The multi-input configuration increases the programmability of the device and improves insertion loss. A matching network for the programmable SAW filter further improves insertion loss level and stopband attenuation. A resistance weighting method has been applied to improve in band ripple with the passband ripple being reduced from 6.44 dB to 1.37 dB after resistance weighting.Type: GrantFiled: June 4, 2001Date of Patent: April 1, 2003Assignee: Rutgers, The State University of New JerseyInventors: Jiahua Zhu, Yicheng Lu, John Kosinski, Robert Pastore
-
Patent number: 6541894Abstract: In a piezoelectric acoustic alarm piezoelements (2a, 2b) each excited by a square-wave voltage are arranged opposite each other in a resonance cavity (1) and each oscillate in opposing directions. The two square-wave voltages (Va, Vb) controlled by a microprocessor (8) are phase displaced by a square-wave pulse length and are positive or negative. A piezo-sound source designed and excited in this way is characterised by a high sound volume with low current consumption and small size.Type: GrantFiled: June 3, 2002Date of Patent: April 1, 2003Assignee: MSA Auer GmbHInventors: Thomas Hänisch, Peter Frank
-
Patent number: 6541895Abstract: A lower electrode on a substrate is continuously formed from one thick portion at the periphery to a thin diaphragm portion. An auxiliary electrode is continuously formed from a position of the thin diaphragm portion independent of the lower electrode to the other thick portion at the periphery. A piezoelectric/electrostrictive film is formed over the lower electrode and auxiliary electrode. Since an incompletely bonded portion that can cause variation and time-dependent changes is not structured to extend over the thin diaphragm portion and the thick portions, it is possible to provide an element which has stable characteristics and which can be used under any condition. Further, since the incomplete bonded portion does not reside at ends of the thin diaphragm portion where the piezoelectric/electrostrictive film is likely to crack in the structure, it is possible to completely prevent the piezoelectric/electrostrictive film from cracking regardless of the type and characteristics of the film.Type: GrantFiled: March 4, 2002Date of Patent: April 1, 2003Assignee: NGK Industries, Ltd.Inventor: Hirofumi Yamaguchi
-
Patent number: 6541896Abstract: A combined acoustic backing and interconnect module for connecting an array of ultrasonic transducer elements to a multiplicity of conductors of a cable utilizes the backing layer volume to extend a high density of interconnections perpendicular to the transducer array surface. The module is made by injecting flowable backfill material into a mold made up of a plurality of spacer plates having aligned channels, with interleaved flexible circuit boards. The backfill material is cured to form a backing layer which supports the flexible circuit boards in mutually parallel relationship. Excess flexible circuit material on one side of the backing layer is cut flush with the front face of the backing layer, leaving exposed ends of the conductive traces on the flexible circuit boards. The module is then laminated to a piezoelectric ceramic layer, and diced. The flexible circuit board conductive traces are aligned with, and electrically connected to, signal electrodes of the transducer elements.Type: GrantFiled: December 29, 1997Date of Patent: April 1, 2003Assignee: General Electric CompanyInventors: Joseph Edward Piel, Jr., Robert Stephen Lewandowski, Brady Andrew Jones
-
Patent number: 6541897Abstract: A package for a piezoelectric resonator, includes an insulating base that has a rectangular box shape and made of laminated thin ceramics sheets, and a lid that is made of a thin rectangular sheet of transparent glass material and bonded on the top surface of the base. A tuning fork type quartz crystal resonator element is hermetically sealed in the package. The corners of the lid are cut off diagonally at an angle of approximately 45 degrees or rounded so as to correspond to the cutouts of quarter circles at the corners of the base that result from via holes for wiring inside the base. A predetermined sealing width on the top surface of the base between the lid and the inner periphery of the base and a sufficient margin width between the periphery of the lid and the outer periphery of the base are ensured at the corners.Type: GrantFiled: January 23, 2002Date of Patent: April 1, 2003Assignee: Seiko Epson CorporationInventor: Hideo Endoh