Abstract: An apparatus and process are provided for detecting whether a corona discharge has occurred external or internal to equipment in which a broadband optical spectra sensor is placed. The broadband optical spectra sensor senses both the ultraviolet energy of the corona discharge and the infrared energy of afterglow of the discharge when the discharge occurs internal to the equipment. The sensed broadband optical spectra signal is processed and a determination is made as to whether the corona discharge occurred external or internal to the equipment from the pulse width of the sensed energy pulse.

Abstract: A robust, compact spectrometer apparatus for determining respective concentrations or partial pressures of multiple gases in a gas sample with single as well as multiple and even overlapping, absorption or emission spectra that span a wide spectral range.

Abstract: An optical power control system for a semiconductor source spectroscopy system controls power fluctuations in the tunable signal from the spectroscopy system and thus improves the noise performance of the system. This general solution has advantages relative to other systems that simply detect reference power levels during the scan and then correct the detected signal after interaction with the sample by reducing the requirements for coordinating the operation of the sample detectors and power or reference detectors. The spectroscopy system comprises a semiconductor source and a tunable filter. The combination of the semiconductor source and tunable signal illuminate a sample with a tunable signal, being tunable over a scan band. The power control system comprises an amplitude detector system for detecting the power of the tunable optical signal and power control system for regulating the amplitude of the tunable optical signal in response to its detected power.

Abstract: A plastic identifying apparatus of the present invention is provided with a sampling unit (2) that samples a test piece (1) from an item to be identified that contains plastic; an identifying unit (3) provided with a detection unit (4) that identifies a type of plastic contained in the test piece (1); and a supply unit (5) that supplies the test piece (1) from the sampling unit (2) to the detection unit (4). With this plastic identifying apparatus, it is possible to realize a plastic identifying method of the present invention, and to identify the types of plastics contained in items to be identified with good accuracy, and continuously, regardless of the size of the items.

Abstract: A thermal imaging method to detect heat flows from naturally-heated subsurface objects. The method uniquely combines precise, emissivity-corrected temperature maps, thermal inertia maps, temperature simulations, and automatic target recognition to display clear, clutter-free, three-dimensional images of contained hollow objects or structures, at depths to 20 times their diameter. Temperature scans are corrected using two different infrared bands. Co-registered object-site temperature scans image daily and seasonal temperature-spread differences, which vary inversely as the object's and surrounding host material's thermal inertias. Thermal inertia (resistance to temperature change) is the square root of the product (k?C), for thermal conductivity, k, density, ? and heat capacity, C.

Abstract: An improved radiation dosimeter device in an improved radiation dosimeter system provides a DC analog output voltage that is proportional to the total ionizing dose accumulated as a function of time at the location of the dosimeter in a host spacecraft, so as to operate in a system bus voltage range common to spacecraft systems with the output being compatible with conventional spacecraft analog inputs, while the total dose is measured precisely by continually monitoring the energy deposited in a silicon test mass accumulating charge including charge contribution prior to radiation threshold detection for improved measurement of the total accumulated charge with the dosimeters being daisy-chained and distributed about the spacecraft for providing a spacecraft dose profile about the spacecraft using the improved radiation dosimeter system.

Abstract: The present invention provides a semiconductor radiation detector and radiation detection apparatus capable of improving energy resolution and the semiconductor radiation detection apparatus includes a semiconductor radiation detector and a signal processing circuit which processes a radiation detection signal output from the semiconductor radiation detector. The semiconductor radiation detector is provided with anode electrodes A and cathode electrodes C disposed so as to face each other with semiconductor radiation detection elements placed in-between. The semiconductor radiation detection element is made up of a single crystal of thallous bromide containing trivalent thallium (e.g., tribromobis thallium). The semiconductor radiation detector containing such a semiconductor radiation detection element reduces lattice defects in the single crystal and thereby increases charge collection efficiency.

Abstract: A method and system are provided for real-time contaminant detection and plasma treatment verification during plasma treatment of bonding surfaces. Optical emission spectroscopy (OES) is utilized to determine contamination of a bonding surface prior to the bonding process. OES is further utilized to monitor bonding sites on the bonding surface to verify effectiveness of the plasma treatment.

Abstract: Microfabricated, gas-filled radiation detector assemblies, methods of making and using same and interface circuit for use therewith are provided. The assembly includes a micromachined radiation detector including a set of spaced-apart electrodes and an ionization gas between the electrodes. A housing has a chamber for housing the detector including the gas. The housing of the assembly also includes a window which allows passage of charged particles therethrough to ionize the gas to create electrons which, in turn, create an electron cascade in the gas between the electrodes when the set of electrodes is biased.

Abstract: A neutron imaging apparatus for obtaining an image of the general shape of a neutron emitting source and a bearing of the source relative to the apparatus, the apparatus comprising a chamber comprising a gas with a high probability of interacting with low energy neutrons, releasing collision products that maintain the neutron momentum, and generating ionization particles. The chamber comprises an electrode for providing an electronic signal indicative of the impact location of ionization particles on the electrode and a field to drift the ionization particles to the electrode. A readout indicates the location and time of impact of each ionization particle on the electrode; a memory stores a plurality of the electronic signals; and a computer receives and analyzes the signals and impact times and indicates the location of the source of neutrons by using back projection algorithms to calculate three-dimensional vectors indicative of the neutron path directions.

Abstract: A charged particle device is provided comprising a charged particle source configured to direct charged particles in the direction of a specimen under examination and an imaging device configured to convert charged particles to an image representing the specimen. The imaging device comprises a detector defining a pixel array. The detector is configured to generate electric charges for individual pixels of the pixel array such that the electric charges collectively define the image. The imaging device is configured such that a portion of the pixel array can be transitioned between a partially masked state and a substantially unmasked state.

Abstract: Apparatus for generating ions in a gaseous medium, the apparatus including two electrodes separated by a dielectric material and a means for generating radio frequency pulses. The electrodes are of dissimilar size and are attached to opposite sides of the dielectric material. The smaller electrode shape and circumference is configured to control the quantity of plasma that is produced. Method of generating ions in a gaseous medium having the step of applying a radio frequency voltage between two electrodes separated by a dielectric material so as to generate a plasma ion source. Locating the plasma ion source in a confined area to yield NO3-ions. Locating the plasma ion source in an open configuration to yield predominantly CO3-ions with minor amounts of O2- and O3-ions.

Abstract: In order to realize initializing sequences with high accuracy and high reproducibility, a positioning device according includes an XY slider movable in directions X and Y, an object position measuring device for measuring the position of the XY slider, an X beam guiding the XY slider in the direction Y and movable in the direction X, a Y beam guiding the XY slider in the direction X and movable in the direction Y, electromagnet units having at least two pairs of electromagnets provided on the XY slider in such a manner as to embrace side faces of the X beam and the Y beam, and a rotation regulating portion provided on the X beam for regulating the rotation of the X beam.

Abstract: The present invention provides systems and methods for attenuating the effect of ambient light on optical sensors and for measuring and compensating quantitatively for the ambient light.

Abstract: A light source for testing sites using a fluorescent dye is described. The light source can include a low voltage lamp or a low heat generating lamp. An emission from the fluorescent dye can be detected through a filter lens, which can include a primary filter and a trim filter. The filter lens can transmit the emission from the fluorescent dye and substantially block an excitation wavelength. The emission from the fluorescence dye is detected through a filter lens including a primary filter and a trim filter, through which the emission wavelength is transmitted, but the excitation wavelength is substantially blocked.

Abstract: A discrimination device which is disposed on a conveyance path of conveyed items, such as planographic printing plates, slip sheets and the like. The discrimination device is structured with a first sensor, which detects presence or absence of the conveyed items, and second and third sensors, which identify types of the conveyed items. The first sensor can judge presence or absence of a conveyed item from whether or not irradiated light is reflected by a conveyed item. The second and third sensors discriminate between the types—the planographic printing plates and the slip sheets—by the intensity of reflected light, on the basis of a difference in surface reflectivities of the conveyed items. With these three optical sensors, it is possible to reliably identify four conveyance configurations of the conveyed items.

Abstract: The method of making an online measurement of a shape of a conveyed sheet, the method comprises the steps of: imaging continuously at least two edge portions of entire the conveyed sheet in a widthwise direction of the conveyed sheet from a leading end to a trailing end of the conveyed sheet in a direction of conveyance of the conveyed sheet by means of a CCD line sensor; processing an image obtained in the imaging step to extract a sheet image portion corresponding to the conveyed sheet in the obtained image; and obtaining the shape of the conveyed sheet according to the sheet image portion extracted in the processing step.

Abstract: A content detecting apparatus uses a signal from a light-receiving part receiving light projected from a light emitting part to detect ink in an ink cartridge. The light-emitting part and the light-receiving part are arranged with differing optical axes. The ink cartridge has reflecting parts for reflecting projected light from the light-emitting part so the projected light reaches the light-receiving part when remaining content is present when the ink cartridge is properly set and with an inclined interface located in a path along which projected light from the light-emitting part reaches the light-receiving part, for switching between permeation and reflection according to the presence and/or absence of remaining content. The inclined interface is permeated along the path with projected light form the light-emitting part when remaining content is present and reflects projected light from the light-emitting part out of the path when remaining content is absent.

Abstract: Apparatus for reading out X-ray information stored in a stimulatable phosphor layer, includes: a plurality of light sources used to emit stimulation light which can stimulate the phosphor layer to emit emission light; a detector used to collect emission light emitted from the phosphor layer; and a control unit for controlling an intensity of the light sources by using a control parameter determined from a reference light source in a regulation unit. The highest possible level of homogeneity and constancy of the light sources will be achieved.

Abstract: A storage phosphor reader. The reader comprises a receiving station adapted to receive a cassette containing a removable storage phosphor. The reader further comprises a path along which the storage phosphor is transportable in a first and second direction when removed from and returned to the cassette. The receiving station is disposed at one end of the path and an access area is disposed at the other end of the path. The access area can be exposed to light as the storage phosphor is transported along the path.

Abstract: Ion implantation by mounting a semiconductor wafer on a rotating plate that is tilted at an angle relative to an ion implantation flux. The tilt angle and the ion implantation energy are adjusted to produce a desired implantation profile. Ion implantation of mesa structures, either through the semiconductor wafer's surface or through the mesa structure's wall is possible. Angled ion implantation can reduce or eliminate ion damage to the lattice structure along an aperture region. This enables beneficial ion implantation profiles in vertical cavity semiconductor lasers. Mask materials, beneficially that can be lithographically formed, can selectively protect the wafer during implantation. Multiple ion implantations can be used to form novel structures.

Abstract: In a logic area, impurities are doped into the gate electrode and the source/drain diffusion regions of a MIS transistor. Thereafter in a memory cell area, word lines are patterned, source/drain regions are formed, and contact holes are formed. Side wall spacers of the MIS transistor in the logic area are made of silicon oxide. A semiconductor device of logic-memory can be manufactured by a reduced number of manufacture processes while the transistor characteristics are stabilized and the fine patterns in the memory cell are ensured.

Abstract: Systems and methodologies are provided for forming a diode component integral with a memory cell to facilitate programming arrays of memory cells created therefrom. Such a diode component can be part of a PN junction of memory cell having a passive and active layer with asymmetric semiconducting properties. Such an arrangement reduces a number of transistor-type voltage controls and associated power consumption, while enabling individual memory cell programming as part of a passive array. Moreover, the system provides for an efficient placement of memory cells on a wafer surface, and increases an amount of die space available for circuit design.

Abstract: Doped aluminum oxide layers having a porous aluminum oxide layer and methods of their fabrication. The porous aluminum oxide layer may be formed by evaporation physical vapor deposition techniques to facilitate formation of a high-purity aluminum oxide layer. A dopant material is embedded in the pores of the porous aluminum oxide layer and subsequently converted to a dielectric form. The degree of porosity of the porous aluminum oxide layer may be controlled during formation to facilitate control of the level of doping of the doped aluminum oxide layer. Such doped aluminum oxide layers are useful as gate dielectric layers, intergate dielectric layers and capacitor dielectric layers in various integrated circuit devices.

Abstract: Described is a semiconductor device having improved semiconductor bond pad reliability and methods of manufacturing thereof. The semiconductor device includes a layer formed over an integrated circuit on a semiconductor substrate. The first layer includes a conductive portion and an insulating portion. A second layer is then formed over the first layer and includes a conductive portion corresponding to the first layer's conductive portion and an insulating portion corresponding to the first layer's insulating portion. A bond pad is then formed over the first and second layers such that the bond pad is substantially situated above the conductive portions and the insulating portions of the first and second layers. A bonding ball is then formed on the bond pad substantially above the conduction portion of the first and second layers.

Abstract: A thin-film transistor substrate, including a substrate with an insulating surface, gate electrodes, lower electrodes of capacitors made of the same material layer as the gate electrodes, a first insulating layer, a channel layer of high resistivity semiconductor having a concave part, and a pair of low resistivity source/drain electrodes. There is also a second insulating layer formed on the first insulating layer. A first connection hole penetrates the second insulating layer and exposes one of each of the pair of the source/drain electrodes. A second connection hole penetrates the second insulating layer and exposes a connection region of each of the upper layers of the upper electrode above the lower layer. A pixel electrode is formed on the second insulating layer and is connected to one of the source/drain electrodes and the upper layer of the upper electrode of the capacitor via the first and second connection holes.

Abstract: A multilayer compensator has two or more first layers and one or more second layers. The overall in-plane retardation of the compensator is from 0 to 300 nm and the out-of-plane retardation is more negative than ?20 nm or more positive than +20 nm. The compensator may be fabricated by: coating at least one barrier layer on at least one first layer; coating at least one second layer from an organic coating solvent on the barrier layer to produce an intermediate compensator structure; and stretching the intermediate compensator structure in at least one direction by between 1% and 60%. The barrier layer contains a polymer that is water soluble or water dispersible in an amount sufficient to impede the diffusion of the organic solvent between the other first layers and the second layers. All layers have been stretched simultaneously.

Abstract: Single-crystal devices and a method for forming semiconductor film single-crystal domains are provided. The method comprises: forming a substrate, such as glass or Si; forming an insulator film overlying the substrate; forming a single-crystal seed overlying the substrate and insulator; forming an amorphous film overlying the seed; annealing the amorphous film; and, forming a single-crystal domain in the film responsive to the single-crystal seed. The annealing technique can be (conventional) laser annealing, a laser induced lateral growth (LiLAC) process, or conventional furnace annealing. In some aspects, forming a single-crystal seed includes forming a nanowire or a self assembled monolayer (SAM). For example, a Si nanowire can be formed having a crystallographic orientation of <110> or <100>. When, the seed has a <100> crystallographic orientation, then an n-type TFT can be formed.

Abstract: The present invention relates to a capacitor element and its manufacturing method. The invention presents a capacitor element comprising a lower electrode, a dielectric film, and an upper electrode, and its manufacturing method, in which the surface of at least one layer of the lower electrode in a single layer structure or laminated structure, for example, the surface of the lower electrode contacting with the dielectric film, is flattened by processing the material itself which composes this surface. For example, it is flattened by filling the recesses at the crystal grain boundary of the surface with the material itself shaved from the surface. As a result, undulations of the surface of the lower electrode of the capacitor element are lessened, and the film thickness of the dielectric film is made uniform, and capacity drop and increase of leak current can be prevented.

Abstract: The invention provides an active matrix type electro-optical device and an electronic apparatus using the same capable of preventing interference of light due to contact holes and interference of reflecting light from light-reflecting film. In a thin film transistor (TFT) array substrate of a reflective active matrix type electro-optical device, a light-reflecting film can be formed in a contact hole, but positions of the contact holes for electrically connecting a pixel electrode to a drain electrode, and irregular pattern for scattering light formed on the surface of the reflection film by a lower side irregularity-formation film are different in each of pixels formed in a matrix.

Abstract: To provide an electro-optical device and an electronic apparatus that have less parasitic capacitance between wiring lines resulted from the crossing wiring lines and operates at a high speed. The electro-optical device includes a first main signal wiring line which is arranged to correspond to a unit circuit and which transmits a predetermined signal; a first sub signal wiring line whose width is narrower than that of the first main signal wiring line; a second main signal wiring line arranged between the first main signal wiring line and the first sub signal wiring line; a first connection wiring line which is connected to the first main signal wiring line and the first sub signal wiring line and which is bridged over the second main signal wiring line; and an internal circuit having a plurality of elements connected to the first sub signal wiring line.

Abstract: A silicon optoelectronic device and an optical transceiver, wherein the silicon optoelectronic device includes an n- or p-type silicon-based substrate and a doped region formed in a first surface of the substrate and doped to an opposite type from that of the substrate. The doped region provides photoelectrical conversion. The silicon optoelectronic device includes a light-emitting device section and a light-receiving device section. These sections use the doped region in common and are formed in the first surface of the substrate. The silicon optoelectronic device has an internal amplifying circuit, can selectively perform emission and detection of light, and can control the duration of emission and detection of light.

Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.

Abstract: A surface-emitting light-emitting device, which can control optical characteristics of emitting light and the manufacturing method thereof, an optical module which includes the surface-emitting light-emitting device, and a light-transmission device are provided. A surface-emitting light-emitting device includes an emitting surface for light emission and a bank that is formed so as to surround the emitting surface. An upper edged portion of the bank is located at a position higher than the emitting surface.

Abstract: A package for a light emitting diode (LED) including an electrically insulating substrate layer, a non-conductive layer disposed on the electrically insulating substrate layer, and a reflector layer disposed on the non-conductive layer. The electrically insulating layer includes metallized portions for coupling a light emitting diode thereto.

Abstract: In accordance with the invention, an illumination device comprises a substrate having a surface and a cavity in the surface. At least one light emitting diode (“LED”) is mounted within the cavity, and a monolayer comprising phosphor particles overlies the LED. The phosphor monolayer is adhered to the LED by a monolayer of transparent adhesive material. An optional optical thick layer of transparent material overlies the phosphor monolayer to encapsulate the LED and optionally to form a lens. Methods and apparatus for efficiently making the devices are disclosed.

Abstract: The light emitting device has a light emitting diode which is made of a nitride semiconductor and a phosphor which absorbs a part of lights emitted from the light emitting diode and emits different lights with wavelengths other than those of the absorbed lights. The phosphor is made of alkaline earth metal silicate fluorescent material activated with europium.

Abstract: A channel isolation region 42 is formed over the entire width of an N-type silicon substrate 41, and photothyristors, in each of which an anode diffusion region 43, a P-gate diffusion region 44, a cathode diffusion region 45 are formed parallel to the channel isolation region 42 over almost the entire width of the N-type silicon substrate 41, are formed in a left-hand portion 40a and in a right-hand portion 40b and are wired inversely parallel. Thus, the inter-channel movement of residual holes during commutation is restrained by the channel isolation region 42, by which commutation failure is suppressed to improve a commutation characteristic. Further, an operating current large enough for controlling a load current of approx. 0.2 A is obtained although a chip is divided by the channel isolation region 42. Therefore, using this bidirectional photothyristor chip makes it possible to implement an inexpensive SSR with a main thyristor eliminated.

Abstract: A nitride-based semiconductor device includes a first semiconductor layer consisting essentially of a nitride-based semiconductor, and a second semiconductor layer disposed on the first semiconductor layer and consisting essentially of a non-doped or first conductivity type nitride-based semiconductor. The first and second semiconductor layers forms a hetero-interface. A gate electrode is disposed on the second semiconductor layer. First and second trenches are formed in a surface of the second semiconductor layer at positions sandwiching the gate electrode. Third and fourth semiconductor layers of the first conductivity type are respectively formed in surfaces of the first and second trenches and each consist essentially of a diffusion layer having a resistivity lower than the first and second semiconductor layers. Source and drain electrodes are electrically connected to the third and fourth semiconductor layers, respectively.

Abstract: A bipolar transistor is provided which includes a GaAs substrate, an n-type collector region formed on the GaAs substrate, a p-type base region formed on the n-type collector region and having a p-type base layer of SiGe having a composition lattice-matched with the GaAs substrate, and an n-type emitter region formed on the p-type base region. A bipolar transistor may include a GaAs substrate, a collector region of a first conductivity type formed on the GaAs substrate and including a collector contact layer of the first conductivity type SiGe, which has a composition lattice-matched with the GaAs substrate, a base region of a second conductivity type formed on the collector region of the first conductivity type, and an emitter region of the first conductivity type formed on the base region of the second conductivity type.

Abstract: A novel memory cell is provided with an active region including a molecular system and ionic complexes distributed in the molecular system. A pair of write electrodes are arranged for writing information to the memory cell. The active region is responsive to an electric field applied between the pair of write electrodes for switching between an on state and an off state. The active region has a high impedance in the off state and a low impedance in the on state. A pair of read electrodes is used to detect whether the active region is in the on state or in the off state to read the information from the memory cell. Read electrodes may be made of different materials having different work functions to reduce leakage current.

Abstract: The present invention realizes a display device having C-MOS p-Si TFTs which enable the high integration by reducing spaces for P-MOS TFTs and N-MOS TFTs in driving circuit or the like thereof. The present invention adopts a self-aligned C-MOS process which uses a half tone mask as an exposure mask for manufacturing the C-MOS p-Si TFTs mounted on the display device. With the use of the half tone mask, the alignment or positioning at a bonding portion between a P-MOS portion and an N-MOS portion becomes unnecessary and hence, the number of photolithography steps can be reduced and the high integration of C-MOS TFT circuits can be realized.

Abstract: A semiconductor device capable of effectively eliminating noise on multilayered power lines with a bypass capacitor. A first power line is connected to the bypass capacitor. A second power line is a line from which a part located above the bypass capacitor is removed. Contacts connect the first and second power lines. Therefore, noise appearing on the second power line travels to the first power line, resulting in effectively eliminating the noise with the bypass capacitor.

Abstract: There are disclosed TFTs that have excellent characteristics and can be fabricated with a high yield. The TFTs are fabricated, using an active layer crystallized by making use of nickel. Gate electrodes are comprising tantalum. Phosphorus is introduced into source/drain regions. Then, a heat treatment is performed to getter nickel element in the active layer and to drive it into the source/drain regions. At the same time, the source/drain regions can be annealed out. The gate electrodes of tantalum can withstand this heat treatment.

Abstract: A high-performance solid-state imaging device is provided. The solid-state imaging device includes: a plurality of pixel cells; and a driving unit. Each of the plurality of pixel cells includes: a photodiode that converts incident light into a signal charge and stores the signal charge; a MOS transistor that is provided for reading out the signal charge stored in the photodiode; an element isolation portion that is formed of a STI that is a grooved portion of the semiconductor substrate so that the photodiode and the MOS transistor are isolated from each other; and a deep-portion isolation implantation layer that is formed under the element isolation portion for preventing a flow of a charge from the photodiode to the MOS transistor.

Abstract: Method and structure for optimizing dual damascene patterning with polymeric dielectric materials are disclosed. Certain embodiments of the invention comprise polymeric sacrificial light absorbing materials (“polymer SLAM”) functionalized to have a controllable solubility switch wherein such polymeric materials have substantially the same etch rate as conventionally utilized polymeric dielectric materials, and subsequent to chemical modification of solubility-modifying protecting groups comprising the SLAM materials by thermal treatment or in-situ generation of an acid, such SLAM materials become soluble in weak bases, such as those conventionally utilized to remove materials in lithography treatments.

Abstract: A field-effect transistor includes a channel layer that is formed on a predetermined semiconductor layer and has an impurity concentration varying from a low value to a high value, and a source region and a drain region each having a bottom face above the predetermined semiconductor layer.

Abstract: The invention includes semiconductor constructions, methods of forming gatelines, and methods of forming transistor structures. The invention can include, for example, a damascene method of forming a gateline. A thin segment of dielectric material is formed between two thicker segments of dielectric material, with the thin and thicker segments of dielectric material being within an opening. A gateline material is formed within the opening and over the thin and thicker segments of dielectric material. The construction comprising the gateline material over the thin and thicker segments of dielectric material can be supported by a semiconductor substrate having a primary surface which defines a horizontal direction. The thin and thicker segments of dielectric material can comprise upper surfaces substantially parallel to the primary surface of the substrate, and can join to one another at steps having primary surfaces substantially orthogonal to the primary surface of the substrate.

Abstract: A solid-state image sensing device is provided. In the device, a first floating p-type well and a second floating p-type well are disposed so as to overlap each other and are respectively provided in a light-receiving area and the area of a field effect transistor for light signal detection. A circular gate electrode is disposed so as to cover the overlapping section of the first floating p-type well with the second floating p-type well and is formed on an n-type channel doped layer.

Abstract: A solid-state imaging device comprises: photoelectric converting regions, wherein each of the photoelectric converting regions includes first photoelectric converting regions and second photoelectric converting regions arranged in row and column directions; and microlenses each of which being formed above and covering each of the first photoelectric converting regions, wherein each of the second photoelectric converting regions is placed between ones of the microlenses covering adjacent ones of the first photoelectric converting regions, a length in a first direction with respect to an opening center of each of the second photoelectric converting regions is longer than a length in a second direction with respect to the same, and among directions of incidence in a plan view of light entering the second photoelectric converting regions, the microlenses blocks the light along the first direction by a highest degree and blocks the light along the second direction by a lowest degree, respectively.