Abstract: It is possible to calibrate a measurement system for circuit parameters of a DUT (device under test) by reducing the number of attachments and detachments of calibration kits. An error factor acquisition device includes: a first calibrator (100) connected to ports (18, 28) of a network analyzer and having a first state realization unit (120) for realizing open-circuit, short-circuit, and standard load states for the ports (18, 28) or short-circuiting the ports (18, 28); and second calibrators (200) connected to the first calibrator (100) and the DUT (400) and respectively having a second state realization unit (220) for realizing open-circuit, short-circuit, and standard load states for the ports (18, 28).

Abstract: A signal conductor whose first end is an open end, and a ground conductor are connected to associated measurement ports of a network analyzer. A short standard is connected between the signal conductor and the ground conductor at least three points in the longitudinal direction of the signal conductor, and electrical characteristics are measured, thereby calculating error factors of a measurement system including a transmission line. An electronic device to be measured is connected between the signal conductor and the ground conductor, and an electrical characteristic is measured. The error factors of the measurement system are removed from the measured value of the electronic device to be measured, thereby obtaining a true value of the electrical characteristic of the electronic device. Accordingly, a highly accurate high-frequency electrical characteristic measuring method, using a reflection method, that is not affected by connection variations can be implemented.

Abstract: An acoustic microphone includes a diaphragm attached to one part a detection coil portion of an optical fiber with another part attached to a fixed base member so that vibrations in the diaphragm cause twisting of parts of the fiber on either side of the coil to change polarization of light from a source of polarized light passing through the fiber. These changes are detected in a sensor defined by a polarizer tuned to be orthogonal to the source so that changes increase the intensity of light from a minimum at the tuned condition. An electronic sensor at an end of the fiber downstream of the detection portion is arranged to detect the changes in the light and convert the changes into an output signal representative of the vibrations monitored. The vibrations are detected only by the detection portion by providing a tuneable polarizer at the entrance to the detection coil and by providing a multimode fiber which is not responsive to the vibrations to carry the light to the sensor.

Abstract: The disclosed apparatus relates to a current sensing electrical energy generation system comprising, an electric machine, a conductor electrically connected to the electric machine, and a current sensor responsive to current flow in the conductor.

Abstract: The present invention is to provide an automatic electric discharge tool, which comprises a control unit and an energy consuming module, wherein the control unit electrically coupled to a plurality of energy storage devices to receive information signals sent and obtain the remaining power capacity, remaining power supply time and battery voltage of the energy storage device; and the energy consuming module electrically respectively coupled to the control unit and energy storage device in purpose to receiving and consuming the power of each energy storage device, furthermore, the control unit determines and then sends a switch signal to make the energy consuming module to stop consuming the power of the energy storage device when the power capacity dropping to 60% of the total power capacity.

Abstract: The invention provides an inspection method of a semiconductor device which receives a test program wirelessly. As an inspection method of the semiconductor device, a test program is transmitted as a communication signal for every test. By transmitting a test program as a communication signal wirelessly in the case of an operation test, test contents are changed as required. As a result, a test program can be easily changed and an inspection circuit or the like is not required. In this manner, manufacturing cost of a wireless chip can be reduced.

Abstract: A rotor for a rotation sensor may be mounted on a bearing that supports a wheel on an automotive vehicle so that it can detect the number of revolutions for the wheel. The rotor for a rotation sensor 1 includes a reinforcing ring 2 formed like an L-shape in cross section, including a cylindrical part 3 adapted to be fitted on a peripheral surface of the rotating part of the bearing (inner race or outer race) and a flanged part 4 bent at an end edge of the cylindrical part 3, from which it extends in the radial direction. A multi-pole magnet 10 is attached to the axial outer lateral side of the flanged part 4, and a non-magnetic covering 6 encloses the axial outer lateral side of the multi-pole magnet 10 and has a peripheral edge on its one end secured to the reinforcing ring 2.

Abstract: An example angular position sensor assembly includes a sector member that rotates within a ring including a permanent magnet disposed centrally within the ring and a Hall-effect sensor adjacent the permanent magnet on an opposite side of the permanent magnet from the sector member.

Abstract: Magnetic field based eddy-current sensing arrays measure the near surface properties conducting and magnetic materials. The arrays have a drive winding for imposing the magnetic field in a test material and at least two sense elements for sensing the response of the test material to the magnetic field. Each sense element has distinct leads for connection to impedance measurement instrumentation. The arrays have accurately positioned sense elements and drive winding conductors so that the sense element responses are essentially identical for test materials having uniform properties. The drive windings are typically formed into circular loops for examining material properties in the vicinity of circular features in the test material, such as holes or fasteners. For examining the material, the sensor arrays are rotated around the feature or mounted against a material surface and provide information from multiple locations around the feature to determine if cracks are present or to monitor crack growth.

Abstract: A sensor for detecting the direction of a magnetic field in a plane, the direction of which is defined by a polar angle ?, has a number n of magnetic field sensors. A measuring axis is assigned to each magnetic field sensor in such a way that the absolute value of the output signal of the magnetic field sensor is at its greatest when the magnetic field runs parallel to the measuring axis. All measuring axes intersect at a common point. The number k of measuring axes amounts to at least three and an operating mode is foreseen with which for calculation of the angle ? two magnetic field sensors are selected that belong to different measuring axes and the output signals of which in terms of value are less than the output signals of the magnetic field sensors that belong to other measuring axes.

Abstract: Method and apparatus for measuring an entity of a magnetic field using a Hall sensor which is provided with at least one Hall plate (101, 102, 103, 104) which has a pair of terminals (A1, A2, B1, B2) for supplying an excitation signal and a pair of terminals (A1, A2, B1, B2) for reading a detection signal, an electric voltage being supplied to the Hall plate as excitation signal from a source (105) of negligible impedance, and an electric current, which represents the measured entity, being tapped off from the Hall plate as detection signal by a pick-up (108, 1098, 110) of negligible impedance.

Abstract: A magnetic sensor that is inexpensive and suppresses changes in offset voltage caused by wear. The magnetic sensor includes magnetoresistance elements having electrical resistances that change in accordance with magnetism changes. The magnetic sensor detects magnetism based on changes in the electrical resistances. The magnetoresistance elements are covered by a protective film. Part of the protective film is etched and eliminated to form a recess.

Abstract: A resonant magnetometer (20) is described that comprises a substrate having an member (26) and means for passing an alternating current (AC) through said oscillatory member (26). The magnetometer is characterised in that driving means (46,48) are also provided to impart a magnetic field independent oscillatory force to said oscillatory member (26). A micro-electromechanical systems (MEMS) implementation of the magnetometer is described.

Abstract: A method and system for intrinsic timescale decomposition, filtering, and automated analysis of signals of arbitrary origin or timescale including receiving an input signal, determining a baseline segment and a monotonic residual segment with strictly negative minimum and strictly positive maximum between two successive extrema of the input signal, and producing a baseline output signal and a residual output signal. The method and system also includes determining at least one instantaneous frequency estimate from a proper rotation signal, determining a zero-crossing and a local extremum of the proper rotation signal, and applying interpolation thereto to determine an instantaneous frequency estimate thereof.

Abstract: The invention relates to a radio-frequent (RF) coil system (17, 17?) for use in a magnetic resonance imaging (MRI) system. The RF coil system comprises at least one main coil (35) for transmitting an RF magnetic field (B1) into and/or receiving an RF magnetic field (B1?) from an examination volume (3) of the MRI system. The main coil has a coil axis (36), which is or is to be oriented parallel to a main magnetic field (Bo) in the examination volume (3), and at least one electrical conductor (37, 39) which extends mainly parallel to the coil axis. According to the invention, the RF coil system comprises an auxiliary coil (45, 47) which is assigned to said conductor of the main coil. The auxiliary coil has two electrical conductors (49, 51) which extend mainly parallel to the coil axis and on opposite sides of said conductor of the main coil. A distance between the two conductors of the auxiliary coil and the conductor of the main coil is small relative to a main dimension (L) of the main coil.

Abstract: A magnetic resonance imaging scanner includes a generally cylindrical main magnet assembly (10) that defines a cylinder axis (16). A first set of shims (60) are rigidly positioned inside the magnet assembly (10) at about a first distance (d1) relative to the cylinder axis (16). A second set of shims (62) are rigidly positioned inside the main magnet assembly (10) at about a second distance (d2) relative to the cylinder axis (16). The second distance (d2) is different from the first distance (d1). A generally cylindrical radio frequency coil (26) is arranged inside the main magnet assembly (10) at about a third distance (d3) relative to the cylinder axis (16). A plurality of gradient coils (20) are arranged inside the main magnet assembly (10) at about a fourth distance (d4) relative to the cylinder axis (16).

Abstract: A probe head for nuclear magnetic resonance measurements comprises a sample holder having a stator and a rotor. The rotor is journalled for rotation about an axis of rotation within the stator. It is adapted for receiving a sample substance. The axis of rotation is inclined by an angle with respect to a longitudinal axis of the probe head. The stator is configured as a dielectric resonator.

Abstract: The present invention provides a locator/monitor capable of locating a boring tool and monitoring the progress of the tool for control purposes. The locator/monitor may be used in expedited locating methodology and straightforward calibration techniques of the present invention. A durable and cost effective pitch sensor is also provided by the present invention. In addition, the present invention provides a slotted transmitter housing formed of an electrically conductive material, where the magnetic field generated by the transmitter is capable of penetrating to the surface.

Abstract: An apparatus for obtaining tool face angles on a rotating drill collar in substantially real time is disclosed. In one exemplary embodiment the apparatus includes a magnetoresistive magnetic field sensor deployed in a tool body. The apparatus further includes a programmed processor configured to calculate tool face angles in substantially real time from the magnetic field measurements. The programmed processor may optionally further be configured to correlate the calculated tool face angles with logging while drilling measurements for use in borehole imaging applications.

Abstract: The invention concerns an apparatus for investigating the wall of a borehole filled with non-conductive mud, said apparatus comprising: a pad having an inside face and an outside face for pressing against the wall of the borehole; a set of measurement electrodes mounted on the outside face of the pad, potentials differences being measured between said measurement electrodes in order to provide measured points representative of the resistivity of the formation; both a source electrode and a return electrode adapted to inject current into the formation, the set of measurement electrodes being situated between the source electrode and the return electrode.

Abstract: In the case of a sensor for measuring the position of an actuating element, which is operated electromotively via a drive connection, of an internal combustion engine, at least one position sensor being arranged in the housing of the actuating element, which position sensor detects the position at the drive connection, at least one position sensor is connected to a circuit, which receives signals from the at least one position sensor. The connection between the circuit and the at least one position sensor takes place by means of a voltage- and signal-carrying line. At least one current measuring device is connected in the circuit. An operating voltage source is arranged in a circuit formed by the line, the at least one position sensor and the at least one current measuring device. A change in current is transmitted via the line via the signals from the at least one position sensor as a function of the position of the actuating element.

Abstract: A device for testing data communications cabling. The device consists of a signal generator that can generate a test signal to test the data communications cabling and a receiving component that can receive a reflected signal produced by reflection of the test signal from the data communications cabling including any reactive point source disturbance that may exist on the cabling. The receiving component can determine characteristics of the reflected signal by analyzing the phase rotation and amplitude of the reflected signal. The device can also include a cancellation generator that can generate a cancellation function based on the characteristics of the reflected signal. The cancellation function can substantially negate a portion of the reflected signal.

Abstract: An apparatus is provided for testing a cable having a plurality of conductors. The apparatus includes a power supply terminal, a grounded test probe, an interface having a plurality of pins thereon, a plurality of indicators, and a plurality of control circuits, each of the indicators corresponding to a pin of the interface. Anodes of the indicators are connected to the power supply terminal, each of the pins and a cathode of a corresponding indicator are correspondingly connected to one control circuit, when the test probe touches one pin of the interface, the corresponding indicator will be lit.

Abstract: A plurality of signal conductors and ground conductors are connected to associated measurement ports of a network analyzer. A short standard is connected between each of the signal conductors and the ground conductor at at least three points in the longitudinal direction of each of the signal conductors, and an electrical characteristic is measured. A through chip is connected in series between the signal conductors, and electrical characteristics are measured. Error factors of a measurement system including a transmission line are calculated. An electronic device to be measured is connected between the signal conductors or among the signal conductors and the ground conductors, and electrical characteristics are measured. The error factors of the measurement system are removed from the measured values, thereby obtaining true values of the electrical characteristics of the electronic device to be measured.

Abstract: A noise measurement semiconductor apparatus for measuring 1/f noise characteristics generated by a device includes a device to be measured of 1/f noise, a control circuit for providing a control signal to a control terminal of the device, in which the device and the control circuit are formed on the same semiconductor substrate.

Abstract: A cable testing system employs a cable tester and a multi-jack cable adapter, which includes a switch matrix and a switch controller. In operation, the switch matrix is in electrical communication with the cable tester and a plurality of cables to establish a plurality of signal paths between the cable tester and the plurality of cables, and the switch controller is in electrical communication with the switch matrix and the cable tester to control a switching of each signal path by the switch matrix between an activated state and a deactivated state as commanded by the cable tester.

Abstract: A three-port TDR front end comprises numerous components. An exemplary three-port TDR front end is a DSL modem. Information-bearing TDR signals are distorted as they pass through these components. With a perfect model of the response of its front-end, a TDR system usually can compensate for the effects of its front-end. In reality, however, the electrical characteristics of each component vary from design-to-design, board-to-board, and slowly over time. The result is imperfect knowledge about the true response of the front-end, errors in the model of the front-end, and degraded TDR performance. At least for this reason it is important to precisely calibrate the response of the TDR front-end through the use of a TDR modeling system.

Abstract: A method and a device are provided for monitoring an energy reserve capacitor, in which monitoring of the internal resistance is provided in addition to monitoring of the capacitance. This is achieved by a time sequence of charging operations and an interruption of those charging operations.

Abstract: A needle alignment verification circuit includes a sensor pad, a first transmission line, a control element, a data pad, a second transmission line, and a response element. The sensor pad includes an insulation part and a conduction part. The first transmission line is electrically connected to the conduction part and to the interior of the semiconductor device. The control element asserts the first transmission line at a first logic state, and upon receiving the probe signal at the conduction part, transitions the logic state of the first transmission line to a second logic state. The second transmission line provides a predetermined signal to the data pad. The response element controls the second transmission line so that the second transmission line has the state of a verification result voltage for a misalignment state in response to the second logic state.

Abstract: With a docking device for the coupling of a handler or prober to a test head for electronic components, at least one locking unit (4) is provided, which has an axially displaceable ball element clamping sleeve (21). This ball element clamping sleeve (21) is surrounded by an annular pressure chamber (28), closing pressure-tight opposite the introduction area of the locking pin (7) and can be moved in an axial direction by means of a ring piston (26), which can be actuated by a pressure means introduced into the pressure chamber (28).

Abstract: The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins.

Abstract: The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins.

Abstract: To reduce noise in measurements obtained by probing a device supported on surface of a thermal chuck in a probe station, a conductive member is arranged to intercept current coupling the thermal unit of the chuck to the surface supporting the device. The conductive member is capacitively coupled to the thermal unit but free of direct electrical connection thereto.

Abstract: An integrated circuit chip (IC) is equipped with a device for preventing reverse engineering by monitoring light emissions emitted from transistors and such electrically active devices in a circuit located in the IC. The device emits extraneous randomized light emissions in substantial close proximity to the transistors to hide a pattern of light emissions emitted from the transistors. As one feature, the device can include a source of randomized light emissions in substantial close proximity to the transistors to hide a pattern of the emitted light from the transistors in randomized light emissions emitted by the source. As a second feature, the device can emit the randomized light emissions by randomly delaying an electrical signal that is electrically coupled to the transistors and, in response to the randomly delayed electrical signal, the transistors randomly emitting light emissions thereby hiding a separate pattern of light emission emitted from the transistors.

Abstract: A method provides for inspecting flexible display medium layer, on which a driving electrode structure to be formed is not complete or there is no driving electrode structure. The flexible display medium layer passes an inspection area. Then, the inspected method is applied to inspect a performance of the flexible display medium layer on a corresponding region being passing the inspection area. The inspected results are recorded, in which the information for indicating a functional performance of the flexible display medium layer is recorded or shown according to a performance level. An apparatus can inspect the flexible display medium layer in accordance with the foregoing method.

Abstract: Provided is a memory system with an inductor. In the memory system, the inductor is connected to an on-die termination unit of a memory chip, thereby realizing constant gain characteristics without respect to a variation in an operating frequency. The inductor of the on-die termination unit may be embodied by connecting a wire bonding, a package line pattern, a PCB line pattern, a wire line, and/or an inductor device to pads of the memory chip.

Abstract: A semiconductor memory device is provided. The device includes an on die termination circuit controlling a termination resistance value by detecting a phase change of a signal inputted through a pad. Additionally, the on die termination circuit changes the termination resistance value when an identical phase signal is inputted during n (n is positive integer) periods of a clock signal.

Abstract: A multiple-time programming apparatus and method using one-time programming (OTP) elements are provided. The apparatus comprises a first adjusting OTP element, a second adjusting OTP element and a calculation device. An adjusting data is written into the first adjusting OTP element. When a modification in an IC is desired, the difference between a desired data and the prior adjusting data is written into the second adjusting OTP element. The calculation device adds the first OTP signal outputted from the first adjusting OTP element and the second OTP signal outputted from second adjusting OTP element, and outputs the resulting OTP signal with desired value. Thus, the apparatus and the method according to an embodiment of the present invention allow modification of data using the OTP elements that prevents from using expensive multiple-time programming elements.

Abstract: A layout of a programmable interconnect structure, comprising: an active region; and an even plurality of gate regions dividing the active region into a plurality of active stripes, said active stripes arranged into disjoint first, second and third sets; and a plurality of interconnect wires, each interconnect wire coupled to a contact in an active stripe of the first set; and an input wire coupled to a contact in each of the active stripes of said second set; and an output wire coupled to a contact in each of the active stripes of said third set; and a buffer layout comprising one or more buffer gate regions and one or more buffer active regions, wherein the input wire is further coupled to a buffer gate region and the output wire is further coupled to a buffer active region.

Abstract: A programmable array logic circuit whose temporary memory circuitry employs single bit non-volatile ferromagnetic memory cells. The ferromagnetic memory cells or bits store data even when there is no power provided to the circuitry, thus saving power during operation of the programmable logic circuitry, and ensuring that there is no loss of the data should there be a temporary power shut down. Additionally, the ferromagnetic cells provide for indefinite number of switching actions on the data without degradation to the capacity to store data therein. The invention provides an integrated circuit, comprising a programmable logic circuit array having product lines and input lines therein, and a storage register circuit. The storage register circuit has a ferromagnetic bit and sensor coupled to store a remnant control signal and an output transistor, coupled to be responsive to the remnant control signal on its gate, and coupled between an input and product line.

Abstract: A programmable logic integrated circuit device has a plurality of regions of programmable logic disposed on the device in a plurality of intersecting rows and columns of such regions. Interconnection resources (e.g., interconnection conductors, signal buffers/drivers, programmable connectors, etc.) are provided on the device for making programmable interconnections to, from, and/or between the regions. At least some of these interconnection resources are provided in two forms that are architecturally similar (e.g., with similar and substantially parallel routing) but that have significantly different signal propagation speed characteristics. For example, a major or larger portion of such dual-form interconnection resources may have what may be termed normal signal speed, while a smaller minor portion may have significantly faster signal speed. Secondary (e.g.

Abstract: A system and method to operate an electronic device, such as a memory chip, with an output driver circuit that is configured to include an ODT (On-Die Termination) mode detector detects whether there is sufficient internal clocking available to operate the ODT portion in the output driver in the synchronous mode of operation or to switch the operation to the asynchronous mode. The clock-sufficiency based determination of internal ODT mode of operation (synchronous vs. asynchronous) avoids utilization of complex and inflexible clock processing logic in an ODT control unit in the output driver. This enables the actual clocking to the ODT circuitry to be changed during various device operational modes (e.g., active, power down, etc.) without re-designing the ODT control logic for each of those modes. The simplicity and flexibility of the ODT mode detector design allows for efficient use of chip real estate without affecting the signal transfer speed of the output driver in the electronic device.

Abstract: Circuit for calculating a logic combination of two encrypted input operands receivese first and second dual-rail signals comprising data values in a calculation cycle and precharge values in a precharge cycle, and receives a dual-rail encryption signal comprising encryption values in the calculation cycle and precharge values in the precharge cycle, and outputs a dual-rail result signal comprising encrypted result values in the calculation cycle and precharge values in the precharge cycle. The data and encrypted result values are encrypted with the encryption values of the dual-rail encryption signal according to an encryption rule. A logic circuit determines the encrypted result values according to the logic combination from the data and encryption values, and outputs the encrypted result values in the calculation cycle.

Abstract: A fault tolerant NAND gate circuit includes at least four parallel PMOS transistor and a pair of two serial NMOS transistor. The sources of two NMOS transistor among the four NMOS transistor are coupled to the output of the claimed NAND gate circuit. The claimed fault tolerant NAND gate circuit can avoid fatal errors caused by short or open circuits of adopted MOS transistor effectively.

Abstract: A peak detector circuit for video signals is disclosed. The peak detector circuit comprises a buffer operational amplifier, a strap diode and feedback resistor in order to bootstrap an operational amplifier used in the circuit and to isolate and provide feedback for the circuit An alternative embodiment of this invention utilizes a transistor instead of a strap diode to provide faster charging for a hold capacitor used in the circuit through current gain action of the transistor. The peak detector circuit of this invention permits tracing the input voltage while the operational amplifier remains in the active region, where it is the fastest, without going into saturation during negative cycles of the signal.

Abstract: A wide linear range peak detector including first and second peak detectors and a compensation circuit. The first peak detector receives an input signal and has an output providing a first peak signal approximation which approximates a peak level of the input signal. The first peak signal approximation includes a non-linear portion which is a function of the peak level of the input signal. The second peak detector also receives the input signal and has an output providing a second peak signal approximation. The compensation circuit uses the second peak signal approximation to provide a compensation signal which compensates the non-linear portion of the first peak signal approximation. In particular, the second peak signal is used to generate the compensation signal to approximate and cancel the non-linear portion.

Abstract: A host controller includes a disconnection detection circuit 52 which compares a voltage level of a first differential signal DP of first and second differential signals DP and DM making up a differential signal pair corresponding to a given range in a frame packet with a comparison voltage CV, compares a voltage level of the second differential signal DM corresponding to a given range in the frame packet with the comparison voltage CV, and detects that a host and a device have been disconnected when the voltage level of at least one of the first and second differential signals DP and DM corresponding to the given range is higher than the comparison voltage CV.

Abstract: The present invention relates to a voltage comparator having hysteresis characteristics. The voltage comparator having hysteresis characteristics includes a comparing section that compares an input voltage with a reference voltage so as to output a high-level or low-level signal; and a reference voltage changing section that changes the reference voltage when a low-level signal is output from the comparing section.

Abstract: A reference voltage generating circuit includes a first capacitor having a first end and a second end; a second capacitor having a third end and a fourth end; a first switch for selectively coupling a predetermined voltage to the first end of the first capacitor; a second switch for selectively coupling the third end of the second capacitor to the first end of the first capacitor; a third switch for selectively coupling the first end of the first capacitor to a reference voltage level; and a fourth switch for selectively coupling the second end of the first capacitor to a reference voltage level; wherein the first capacitor samples the predetermined voltage in a first stage and re-distributes charges to the second capacitor in a second stage.

Abstract: A charge/discharge control circuit for controlling current through an input/output audio device includes a first voltage reference; a second voltage reference and a waveform generation circuit responsive to the first and second voltage references for generating a multi-stage waveform profile which is approximately an inaudible waveform for suppressing audible artifacts in the input/output device.