Abstract: A safety device comprising a housing, an extendable coil located in the housing, and a light source for illuminating the extendable coil. The extendable coil is translucent and may be extended from a first position to a second position.

Abstract: A light source and a display utilizing the same are disclosed. The light source includes a laser, a light pipe, and an optical fiber. The light pipe includes a layer of transparent material having a top surface, a bottom surface, and a first edge. The first optical fiber couples light from the laser to the first edge at a first location. The light is injected into the light pipe such that the light is reflected from the top surface and the light pipe includes a plurality of scattering centers that scatter the light through the top surface. The laser can be in thermal contact with a heat sink placed at a location that is adapted for dissipating heat. The light source can include a plurality of lasers in a color display. The light from the various lasers can be mixed before it reaches the light pipe or in the light pipe.

Abstract: A backlight assembly and liquid crystal display (LCD) having the same each include a surface light source including a lower substrate, an upper substrate joined to an outer circumference of the lower substrate and forming a discharge space, and an electrode formed on the joined upper and lower substrates, and at least one light source holder including an upper support plate, a lower support plate, and a sidewall for connecting the upper support plate and the lower support plate, and covering the electrode formed on the joined upper and lower substrates from a side of the joined upper and lower substrates.

Abstract: A light guide is configured to direct light from a light source. The light guide has an outer guide member and an inner guide member located in the outer guide member. A light passage is defined through the light guide between the inner and outer guide members. When a first end of the light guide is positioned adjacent a light source, light is permitted to pass from the light source through only the light passage in the light guide. The configuration of the light guide reduces passage of light off-angle to the length of the light passage through the guide, such that light is directed substantially parallel to the light passage. The light guide is thus effective in eliminating light dispersion and associated light banding and in focusing light upon a particular object or area.

Abstract: The present invention relates to an electric sign comprising an front side (2), a rear side (4) and at least one side surface (5, 6, 15) that extends between and links together the front side (2) and the rear side (4), where a light guiding interior of a transparent material is comprised between said front side (2), rear side (4) and side surface (5, 6, 15), a lighting appliance (8) being arranged in connection with said side surface (5, 6, 15) in order to emit light to the light guiding material, and the rear side (4) being adapted to comprise figures (3) reflecting the light from the lighting appliance (8), through the front side (2) of the electric sign, characterised in that the front side (2) of the electric sign (1) is convex.

Abstract: A backlight assembly for a liquid crystal display device is disclosed with high efficiency and high brightness. The backlight assembly includes a light source in which a first light emitting diode and a second light emitting diode are combined, a board where the light source is mounted, and optical sheets arranged in front of the light source. By alternately arranging a front emitting type LED and a side emitting type LED in various structures, high efficiency and high brightness may be obtained using a small number of light emitting diodes.

Abstract: A backlight unit is provided. The backlight unit comprises a plurality of light emitting lamps arranged in one direction on a bottom surface of a base support. A lower reflection plate is provided on the bottom surface of the base support below the light emitting lamps. A plurality of upper reflection plates are arranged above the light emitting lamps to correspond to the light emitting lamps in a one to one ratio.

Abstract: An exemplary backlight module (20) includes a light guide plate (21) having an incident surface (211) and a side surface (714) between an emission surface (212) and a bottom surface (213), the bottom surface being opposite to the emission surface, the side surface being substantially perpendicular to the incident surface; a light source (22) opposite to the incident surface; and a light source cover (23) for reflecting light beams from the light source into the light guide plate. The light source cover is engaged with the light guide plate through a fastening mechanism. The light source cover surrounds one end of the light guide plate at the incident surface, thereby forming a space in cooperation with the end of the light guide plate, and the light source is received in the space.

Abstract: A display apparatus including a liquid crystal display (LCD) panel, a light source unit including a plurality of point light sources to provide light to the LCD panel and divided into a plurality of light source areas, a plurality of light source driving parts to supply electric power to the plurality of light source areas, a brightness sensor to sense a brightness of the light source unit, and a light source controller to control the light source driving part based on the brightness sensed by the brightness sensor so that the light source unit provides light of uniform brightness.

Abstract: A light guide plate includes a top surface serving as a light-emitting surface, a bottom surface serving as a reflecting surface, and a periphery having a first side surface serving as an incident surface and a second side surface opposite the first side surface. The bottom surface is provided with reflecting prisms successively arranged in a direction from the first to second side surface. Each reflecting prism has a first slant surface and a second slant surface succeeding to the first slant surface. The first slant surface extends toward the top surface in a direction from the first side surface toward the second side surface and the second slant surface extends away from the top surface in the same direction. The second slant surface is formed such that a large part of light reflected back from the second side surface toward the first side surface is emitted from an area of the top surface near the first side surface.

Abstract: The present invention provides a backlight module structure. The backlight module structure comprises a frame integral with a light guide plate, a shielding tape and a reflector. An extended portion of the shielding tape or an extended portion of the reflector is used to cover a feed point of a light guide molding material. This structure of the backlight module prevents production of a dark area, and makes the light to be utilized more effectively.

Abstract: An exemplary backlight module includes a frame (16) and a light guide plate (14) positioned in the frame. The frame defines a notch (164), which notch is bounded by a wall of the frame. The light guide plate includes a side surface (141), and an ear (144) extending from the side surface. The ear is received in the notch. A first protrusion (165) protrudes from either the wall of the notch or the ear and contacts the corresponding ear or wall of the notch.

Abstract: An exemplary backlight module (200) includes a frame (210), a light guide plate (230) disposed in the frame, and a light source (220) adjacent to the light guide plate. The frame includes a pair of elastic electrically conductive connector clips (280) opposite to each other. The elastic connector clips cooperatively fix the light source in the frame and are configured for electrically connecting the light source to an external power supply. Because the backlight module includes the pair of elastic connector clips to fix the light source, if the light source needs be renewed, it can be conveniently taken out from the backlight module directly. Thus, the risk of accidental damage to damage of the optical elements of the backlight module during this process is minimal.

Abstract: An operating lamp has operator controls that include several operating parameter display fields for displaying adjustable parameters of operating states of the operating lamp, and a control element, such as a manipulable knob, for setting those parameters. The same control element also emits control signals for changing the operating state.

Abstract: The invention provides an LED package including an LED chip. In the LED package, a heat conducting part of folded sheet metals has a recess formed thereon to seat the LED chip therein. A package body houses the heat conducting part and directs light generated from the LED chip upward. Also, a transparent encapsulant is provided to at least the recess of the heat conducting part. Leads are partially housed by the package body to supply power to the LED chip. According to the invention, the sheet metals are folded to form the heat conducting part, and the recess is formed on the heat conducting part to seat the LED chip therein. This improves reflection efficiency and simplifies an overall process.

Abstract: A switching power system for converting an input voltage to an output voltage across a transformer is disclosed. The system includes a control circuit. The control circuit has a control input coupled for receiving the output voltage and an output coupled to a primary winding of the transformer. The system includes a bias circuit for supplying an operating voltage to the control circuit. The bias circuit includes a capacitor. The capacitor has a first terminal coupled to a first terminal of a first secondary winding of the transformer. A first diode is coupled between a second terminal of the first secondary winding and a second terminal of the first capacitor. A second diode is coupled between the second terminal of the capacitor and a bias input of the control circuit. A method of making the same is disclosed.

Abstract: A simple and accurate dead time dispersion measurement method and a voltage source inverter control method that can prevent the occurrence of an unstable phenomenon are provided. The control method controls a voltage source inverter of a PWM system, which includes a power semiconductor device controlling a level of a voltage, a frequency and a phase. According to the control method, before operation, voltage error information for each polarity of respective phase currents of the inverter is stored. And during the operation, the voltage error information is read to compensate for a voltage instruction value or a pulse width of a PWM instruction signal, so that a voltage error can be corrected.

Abstract: A compensator circuit for reducing low order current harmonics in a three-phase drive system driving a single-phase load, the three-phase drive system including a three-phase source voltage connected to a rectifier system connected to a DC link capacitor connected to a three-phase voltage source inverter that supplies three-phase power.

Abstract: The present invention is directed to an auxiliary circuit for reducing low order current harmonics in a three-phase drive system driving a single-phase load, the three-phase drive system including a three-phase source voltage connected to a rectifier system connected to a DC link choke inductor connected to a three-phase current source inverter system.

Abstract: The present invention is directed to a compensator-filter circuit for reducing low order current harmonics in a three-phase drive system driving a single-phase load, the three-phase drive system including a three-phase source voltage connected to a rectifier system connected to a DC link capacitor connected to a three-phase voltage source inverter.

Abstract: A soft start circuit includes a constant current source for generating a constant current, a first current mirror circuit for generating from the constant current a first mirror current, a second current mirror circuit for generating from the constant current a second mirror current smaller than the first mirror current, and a capacitor into which a difference between the first mirror current and the second mirror current is introduced, wherein a divided voltage of a charging voltage thereof is output as a soft start voltage. The soft start circuit provides a gradual soft start voltage.

Abstract: A circuit for testing an inrush current of a power supply includes a rectifier (10), a capacitor (30), and an ammeter (90). The rectifier includes input terminals (1) adapted to connect with an AC supply (Vin), and output terminals (3) adapted to supply a direct voltage. The capacitor is connected in parallel to the output terminals of the rectifier. The ammeter is connected between the capacitor and the power supply. The capacitor is charged by the AC supply via the rectifier. When the voltage of the capacitor reaches a pre-determined value, the capacitor supplies energy to the power supply, and the ammeter measures the magnitude of the inrush current.

Abstract: A power supply adapter includes an input terminal to input an alternating current power supply, a converter circuit electrically connected to the input terminal to convert the alternating current power supply into multiple direct current voltage signals and multiple alternating current voltage signals, a plurality of direct current voltage output terminals electrically connected to the converter circuit, and a plurality of alternating current voltage output terminals electrically connected to the converter circuit. Thus, the power supply adapter converts the single alternating current power supply into multiple direct current voltage signals and multiple alternating current voltage signals for use with multiple loads, so that the power supply adapter is available for multiple direct current loads and multiple alternating current loads.

Abstract: A bypass circuit is disclosed for use with lower power supply voltage PC cards. The bypass circuit controls the power supply voltage fed to a power amplifier when switching between a lower power 8-PSK modulation mode and a higher power GMSK modulation mode. A step-up DC/DC converter provides a higher voltage to the power amplifier than can be supplied by an original power supply. Switch control logic controls a step-up switch and a battery switch. The step-up switch is turned on when operating in an 8-PSK modulation mode to provide a higher voltage to the power amplifier than the original power supply voltage. The battery switch is turned on when operating in the GMSK modulation mode to provide the original power supply voltage to the power amplifier.

Abstract: The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The output voltage is preferably measured indirectly to prevent unnecessary power consumption. In addition, control circuitry can be provided to conserve power by ceasing the delivery of power to the capacitor load once the desired output voltage is reached. Control circuitry preferably operates an interrogation timer that periodically activates the power delivery cycle to maintain the capacitor output load in a constant state of readiness.

Abstract: An enabling circuit for enabling a DC-DC converter having a capacitor coupled to an output terminal of the DC-DC converter to be controlled by a control signal. The enabling circuit may include a comparison circuit configured to compare a feedback signal representative of a charge on the capacitor with a signal representative of a reference charge and to provide an output to in response to the comparison to enable the DC-DC converter to be controlled by the control signal if the charge on the capacitor is less than the reference charge. The enabling circuit may also include a discharge path configured to discharge the charge on the capacitor if the charge is greater than the reference charge. A related system and method are also provided.

Abstract: A power supply device that is capable of outputting multiple different output voltages is coupled by a DC power supply cord to an electrical device. An unpowered memory in the electrical device stores information about the power requirements of the electrical device (for example, the DC supply voltage required). In a first time period, when the power supply device is not powering the electrical device, the power supply device sends an energizing pulse train across the power cord. The electrical device captures energy from the pulse train. In a second time period, the electrical device uses the captured energy to transmit the information back to the power supply device across the power cord as pulses. The power supply device uses the information read back from the electrical device to output the appropriate DC supply voltage for the electrical device onto the power cord.

Abstract: A two stage multiple output power supply device is capable of outputting programmable DC voltages onto multiple outputs. The first stage receives an AC supply voltage and outputs a DC supply voltage. The second stage includes a DC-ID controller and multiple DC-to-DC converters, each DC-to-DC converter receiving the DC supply voltage and capable of outputting a programmable DC voltage onto a conductor of a power cord to power an electrical device. For each DC-to-DC converter, the DC-ID controller receives information in an AC signal on the conductor, the information indicating the voltage and current requirements and the polarity of an electrical device connected to the power cord for that DC-to-DC converter. In response to the information, the DC-ID controller controls the DC-to-DC converter to set a magnitude, a polarity and a current limit for the programmable DC voltage that will be output by the DC-to-DC converter.

Abstract: The invention concerns a method for an inverter, for inputting power output by a direct current voltage source (2) in an alternating current voltage network (3), whereby the direct current voltage source (2) is chopped, by means of a bridge inverter (5) by alternate switching of parallel-mounted and series-mounted circuit elements (6-9), in the form of a pulse width modulation, and said chopped power is transmitted via a transformer (18) which is connected between the series-mounted elements (6-9). The transmitted power is then rectified and input in the alternating current voltage network (3) via a down-converter transformer (22). In order to adapt the inverter to the power supplied, the switching times of the circuit elements (6-9) of the bridge inverter (5) are controlled or regulated. The invention aims at providing a simple way of enhancing performance.

Abstract: A driving system and method to effect propagation of a magnetic domain wall through a ferromagnetic conduit are described, wherein oscillating electrical current is passed through the conduit from an oscillating current supply source via at least two electrical contacts adapted to make electrical connection with at least two spaced points on the conduit. A ferromagnetic conduit is described comprising an elongate ferromagnetic element formed as a continuous track of magnetic material capable of sustaining and propagating a domain wall, and such a driving system in serial array, preferably being further adapted to serve as a magnetic logic element by the provision of nodes and/or directional changes as a result of which logical functions may be processed.

Abstract: A one time programmable (OTP) memory has two-bit cells for increasing density. Each cell has two select transistors and a programmable transistor in series between the two select transistors. The programmable transistor has two independent storage locations. One is between the gate and a first source/drain region and the second is between the gate and a second source/drain region. The storage locations are portions of the gate dielectric where the sources or drains overlap the gate and are independently programmed by selectively passing a programming current through them. The programming current is of sufficient magnitude and duration to permanently reduce the impedance by more than three orders of magnitude of the storage locations to be programmed. The programming current is limited in magnitude to avoid damage to other circuit elements and is preferably induced at least in part by applying a negative voltage to the gate of the programming transistor.

Abstract: A method for dynamically adjusting the operation of a memory chip is disclosed. First, a memory chip is provided. The memory chip comprises an ONO layer. Then, the thickness of the ONO layer in the memory chip is measured, and a read word line voltage of the memory chip is then adjusted based on the measured thickness of the ONO layer. Since the operation window of memory chip is dynamically adjusted, a more reliable product operation and a sufficient mass production window are obtained.

Abstract: A memory system having electromechanical memory cells and decoders is disclosed. A decoder circuit selects at least one of the memory cells of an array of such cells. Each cell in the array is a crossbar junction at least one element of which is a nanotube or a nanotube ribbon. The decoder circuit is constructed of crossbar junctions at least one element of each junction being a nanotube or a nanotube ribbon.

Abstract: A memory comprises a bitline, an accessible memory element, an activable switch coupled between the bitline and the access node and a controller configured to activate the activable switch within a first activation period, to activate the activable switch within a second activation period and to deactivate the activable switch at least once when accessing to the accessible memory element during the same access operation.

Abstract: A magnetic memory array. A first bit line provides a first writing magnetic field to a magnetic memory cell. A second bit line provides a second writing magnetic field to a reference magnetic memory cell. A word line provides a third writing magnetic field to the magnetic memory cell and a fourth writing magnetic field to the reference magnetic memory cell. The third writing magnetic field exceeds the fourth writing magnetic field.

Abstract: The present invention provides a memory element including a memory layer that holds information based on a magnetization state of a magnetic substance, and a magnetization pinned layer that is provided for the memory layer with intermediary of an intermediate layer therebetween, the intermediate layer being composed of an insulator. Spin-polarized electrons are injected in a layer-stacking direction to thereby change a direction of magnetization of the memory layer, so that information is recorded in the memory layer. At least one ferromagnetic layer included in the memory layer is composed mainly of CoFeTa, and has Ta content in a range from 1 atomic percent (at %) to 20 at %.

Abstract: An apparatus and methods store data in a magnetic random access memory (MRAM) in a fast and efficient manner. Embodiments advantageously decrease the number of clock cycles required to store data by eliminating at least one wait state in a transition from a read state to a write state. Embodiments advantageously enhance the throughput of the MRAM and a related digital circuit, such as a computer system, which advantageously enhances the operating speed of the digital circuit.

Abstract: A magnetic random access memory includes first write lines separated from one another and extending along a first direction. Second write lines extend in a direction different from the first direction. The MTJ elements are provided between the first write lines and the second write lines. Connection lines connect the first write lines. Sinkers are connected to ends of the first write lines and to the first write lines at between the connection lines and extract currents from the first write lines. Drivers are connected to ends of the first write lines and supply currents to the first write lines.

Abstract: A method for writing a memory cell of a magnetoresistive random access memory (MRAM) device includes, sequentially, providing a first magnetic field in a first direction, providing a second magnetic field in a second direction substantially perpendicular to the first direction, turning off the first magnetic field, providing a third magnetic field in a third direction opposite to the first direction, turning off the second magnetic field, and turning off the third magnetic field. A method for switching magnetic moments in an MRAM memory cell includes providing a magnetic field in a direction forming a blunt angle with a direction of a bias magnetic field. A method for reading an MRAM device includes partially switching magnetic moments in a reference memory cell to generate a reference current; measuring a read current through a memory cell to be read; and comparing the read current with the reference current.

Abstract: A high speed and low power method to control and switch the magnetization direction and/or helicity of a magnetic region in a magnetic device for memory cells using spin polarized electrical current. The magnetic device comprises a reference magnetic layer with a fixed magnetic helicity and/or magnetization direction and a free magnetic layer with a changeable magnetic helicity. The fixed magnetic layer and the free magnetic layer are preferably separated by a non-magnetic layer, and the reference layer includes an easy axis perpendicular to the reference layer. A current can be applied to the device to induce a torque that alters the magnetic state of the device so that it can act as a magnetic memory for writing information. The resistance, which depends on the magnetic state of the device, is measured to thereby read out the information stored in the device.

Abstract: An array of memory cells having a predetermined group of storage cells, arranged in a row, also have an arrangement of one or more reference cells fabricated to be adjacent to or proximate to the row of storage cells. The reference cells are written to, erased, or programmed when the storage cells are written to, erased, or programmed. The same number of write, erase, or program cycles and the proximity of the reference cells to the storage cells maintain an operational matching of the storage cells and reference cells.

Abstract: A non-volatile memory device is proposed.

Abstract: A sense amplifier has first and second input nodes. A reference memory cell is connected to the first input node. To the second input node, a constant current source circuit and a main memory cell are connected via a first transistor and a second transistor, respectively. A current mirror type load circuit is provided as a load circuit of the reference memory cell and the main memory cell. When a threshold voltage of the reference memory cell is adjusted, the first transistor is turned on and the second transistor is turned off. When the threshold voltage of the memory cell is adjusted at verification of writing to/erasing from the memory cell, the first transistor is turned off and the second transistor is turned on.

Abstract: A method for programming an electrically programmable memory including a plurality of memory cells arranged in individually-selectable memory cell sets each including at least one memory cell. The programming method includes causing the memory cells of a selected memory cells set to be brought into a predetermined, starting programming state. Receiving a target value for the first data bits groups of the memory cells of the selected memory cells set. Receiving a target value for the second data bits groups of the memory cells of the selected memory cells set. After having received the target values of both the first and the second data bits groups, applying to the memory cells of the selected memory cells set a programming sequence adapted to cause the memory cells of the selected memory cells sets to be brought into a target programming state jointly determined by the target values of the first and second data bits groups.

Abstract: A faulty storage area marking and accessing method and system applicable to a data storage unit (e.g. an embedded memory integrated in a SoC) having a plurality of storage areas, for providing the data storage unit with an automatic faulty storage area marking function for access control, so as to inspect and identify faulty storage areas and operable storage areas of the data storage unit. Therefore, when a client unit intends to access the data storage unit, the faulty storage areas are avoided being accessed and only the operable storage areas are accessed. This feature allows the SoC to still operate properly even if the embedded memory thereof has faulty storage areas, without having to replace the entire SoC.

Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. A type of memory block is selected to receive additional data of a file that depends upon the types of blocks into which data of the file have already been written. Blocks containing data are selected for reclaiming any unused capacity therefrom by a process that selects blocks in order starting with those containing the least amount of valid data.

Abstract: A page buffer for an electrically programmable memory including at least one read/program unit having a coupling line operatively associable with at least one of said bit lines and adapted to at least temporarily storing data bits read from or to be written into either one of the first or second memory page stored in the memory cells of a selected memory cell sets. The read/program unit includes enabling means for selectively enabling a change in programming state of a selected memory cell by causing the coupling line to take one among a program enabling potential and a program inhibition potential, conditioned to a target data value to be stored in the first group of data bits of the selected memory cell and an existing data value already stored in the second group of data bits of the selected memory cell.

Abstract: In one embodiment of the invention, a flash memory is provided that includes: a plurality of flash memory cells sharing a common drain node and a common source node; and a current source that controls the current into the common source node.

Abstract: A flash memory device, such as a NAND flash, is described having an array of floating gate transistor memory cells arranged in a first and second addressable blocks. A voltage source to supply programming voltages to control gates of the floating gate transistor memory cells is provided. The voltage source supplies a pre-charge voltage to the control gates of the floating gate transistor memory cells located in the first addressable block when data is programmed in memory cells of the second addressable block. Methods for pre-charging word lines in unselected array blocks are described.

Abstract: Embodiments of the invention generally provide a method and wordline driver having a reduced leakage current. In one embodiment, a wordline is driven to a boosted high voltage with a driver transistor of the wordline driver if the wordline driver is in an operational mode and the wordline is driven to a downward-driven low voltage if the wordline driver is in a standby mode. The driver transistor is electrically isolated from the downward-driven low voltage of the wordline when the wordline driver is in the standby mode. A leakage current in the wordline driver is thereby reduced.