Abstract: A system and method for the network operation of a universal remote controller (URC) and the URC for realizing said system have been disclosed in the invention, said system comprises: a user service subsystem, a data storing and exchanging device and a user operation subsystem. The network operation method for said URC comprises: collecting the parameters of an existing user's remote controller (RC) via a RC sampling device, analyzing and processing the parameter data as a code program, and transferring to the server device via the Internet in order to store and exchange the data; reading the required program from the server device by the URC via the user terminal device and the Internet to realize the function of the URC. In said URC, the URC is provided with a USB interface circuit for downloading the data on the network into the URC.

Abstract: According to one embodiment, an electronic apparatus which is installed in an environment in which the apparatus receives a remote control signal from the same remote controller in common with other electronic apparatuses, including a receiving unit configured to receive the remote control signal, a determination unit configured to determine one electronic apparatus to receive the remote control signal among at least one or more electronic apparatuses including the electronic apparatus able to receive the remote control signal, and a setting unit configured to operate to accept the remote control signal received by the receiving unit when a determination result resulting from the determination unit shows the electronic apparatus as the one to receive the remote control, and to operate so as to disregard the remote control signal received by the receiving unit when the result shows electronic apparatuses other than the electronic apparatus.

Abstract: A method may include and/or involve a mote network receiving a signal to reset and applying the signal to reset to place the mote network into a reset condition.

Abstract: A mote sensor may include and/or involve logic to respond to an external signal by providing one or more return signals indicative of at least one location of the mote sensor.

Abstract: One aspect of this disclosure relates to locating at least one position of at least one mote device; and affecting at least one presentation based at least in part on the at least one position of the at least one mote device. Another aspect of this disclosure relates to sensing at least one position of an item at least partially using at least one mote device; and affecting at least one indication of the at least one position at least partially using the at least one mote device based at least in part on the sensing the at least one position of the item. Yet another aspect of this disclosure relates to causing the at least one mobile mote device to displace itself; and affecting at least one presentation with the at least one mobile mote device based at least in part on the causing at least one mobile mote device to displace itself.

Abstract: A common inexpensive device such as an automotive internal rear view mirror, cell phone, CHMBL (center high mounted brake light), license plate or stand-alone housing incorporates an emergency warning system to detect a predefined signal emitted by an right of way vehicle such as an ambulance, police car, fire engine, or train. The right of way vehicle sends out a specific predefined signal to a predefined area. The specific predefined signal is picked up by a receiver of the present emergency warning system. Then, after verification of the specific predefined signal, the emergency warning system emits a warning, preferably an audio warning.

Abstract: A vehicle guidance and parking system that continuously guides the operator of a vehicle to a pre-determined parking position by using two laser beams impinging on a forward or rearward surface. The two lasers beams project to a substantially vertical surface to which a vertical line has been applied and the vehicle is guided by the operator such that the two laser beams are kept equidistantly horizontally centered around the line during the vehicle approach to maintain the correct lateral position in the pre-determined parking position. When the two laser beams converge on the vertical line, the vehicle is longitudinally positioned to the pre-determined parking position. Temperature compensation, due to the wide temperature of potential use range, is provided by the laser emitting device used in the vehicle guidance and parking system.

Abstract: A galvanic isolated digital output circuit of a digital system is provided herein, which utilizes an electromagnetic coupling device for galvanically isolating the system side and the output side of the digital output circuit. The digital output circuit contains a system-side driving circuit, an electromagnetic coupling device, and an output-side control circuit. The electromagnetic coupling device contains at least a system-side electromagnetic coupling element, a first output-side electromagnetic coupling element, and a second output-side electromagnetic coupling element. The system-side driving circuit is connected to the system-side electromagnetic coupling element, and takes the ON/OFF digital control signals from the digital system as input to turn on and off its driving to the system-side electromagnetic coupling element.

Abstract: A keypad and operation method thereof is provided. In this embodiment, the keypad has pre-established corresponding tables (namely, key-signal tables) specifying key signals corresponding to various input keys on a keypad. A switching control key (i.e. a numeric-lock-key) is provided on the keypad to serve as the control key for switching one of the key-signal tables to another one to be used for retrieving the key signal. Therefore, when an input key (e.g. numeric/character key) is pressed, then a key signal corresponding to the pressed key is obtained directly from the key-signal table, and then is transmitted to the digital device to executing specific action or display. Therefore the problem of numeric locking synchronism between the numeric keypad and the computer keyboard is solved.

Abstract: A method for sampling audio data is provided. In this method, the audio data is received and sampled at a first sampling rate using a first interpolation calculation. Thereafter, the audio data sampled at the first sampling rate is again sampled at a second sampling rate using a second interpolation calculation. After sampling, the second audio data sampled at the second sampling rate is outputted. Circuitries and systems for sampling audio data also are described.

Abstract: A method for coding spatial and quality enhancement information in scalable video coding using variable length codes. Conventional systems have been capable of using variable length codes only with nonscalable video coding. In the present invention, the coded block pattern for each block of information, significance passes, and refinement passes can all be coded with different types of variable length codes. The present invention also provides for a variable length encoder/decoder that dynamically adapts to the actual symbol probability. The encoder/decoder of the present invention counts the number of times each symbol is coded. Based upon these counts, the encoder/decoder selects how many symbols to group when forming a code word. The encoder also uses these counts to select the specific codeword that should be used.

Abstract: Delimiter lookup is accomplished using a processor permutation instruction. A 256-bit bitmap is defined and stored within two sixteen-byte registers. Each bit of the bitmap represents an eight-bit character occurrable within a character string, such as a section of eXtensible Markup Language (XML) code, and has a value indicating whether the character is a target character, such as a delimiter. The character string has a number of eight-bit characters at a corresponding number of positions. The first position within the character string at which one of the target characters occurs is determined, using the 256-bit bitmap and a processor permutation instruction. The first position within the character string at which one of the target characters occurs, as has been determined, is output.

Abstract: Combination circuitry for combining a plurality of multi-bit partial product terms includes at least one stage arranged to receive a first number of input bits. At least one stage includes at least one combiner having: a first logic device comprising an input arranged to receive a first set of the first number of input bits and an output arranged to output a first combined result; a second logic device comprising a first input arranged to receive a second set of the first number of input bits, a second input connected to receive the first combined result, a first output arranged to output a second combined result, and a second output arranged to output a first combined bit group; and a third logic device comprising an input connected to receive the second combined result and an output arranged to output a second combined bit group, whereby the first combined bit group is available for a further stage of the combination circuitry before the second combined bit group.

Abstract: A sampling rate converting circuit receives plural pieces of input data having different sampling frequencies. A plurality of FIR circuits is shared to reduce a circuit area, and, in a case where a magnification ratio of an input frequency and an output frequency is not an integer, signal deterioration due to resampling is solved. An oversampling component performs oversampling on input data Fs1 and outputs output data Fs?. An input timing timer calculates an input/input time based on an input timing signal CK1. An output timing timer and an accumulator calculate an input/output time based on an output timing signal CK? and the input timing signal CK1 and multiplies the input/output time by an oversampling multiple W to obtain a multiplied result. A divider divides the multiplied result by the input/input time to obtain a sampling position. A coefficient generator generates a filter coefficient based on the sampling position and supplies the filter coefficient to a multiplier.

Abstract: The present invention reduces the manufacturing cost of a sampling rate converter. The sampling rate converter disclosed herein comprises a buffer for buffering input data, a sampling rate converter core for converting a sampling rate of data output from the buffer, and a sampling rate conversion control unit capable of controlling sampling rate conversion by the sampling rate converter core. The sampling rate conversion control unit comprises a table of data for control of the sampling rate conversion by the sampling rate converter core and an input sampling rate calculating module which determines an input sampling rate for the sampling rate converter core by referring to the table, wherein the data for control in the table can be updated. A PLL circuit for sampling rate conversion is dispensed with and reducing the manufacturing cost of the sampling converter is achieved.

Abstract: A method digitally representing an integral non-linearity response for a device includes: (a) In no particular order: (1) Identifying locations of significant departures of the integral response, including: [a]Extracting first and second differential responses from the integral response in first and second device trim states. [b] Twice-filtering first and second differential responses to produce first and second filtered responses. [c] Determining difference between first and second filtered responses to produce a treated response. [d] Identifying a locus for each maximum of the treated response in a highest excursion range and in at least one lower excursion range. [e] Imposing zero amplitude on the treated response within a code range of each locus. Locations are centered within each code range. (2) Determining magnitude for each significant departure.

Abstract: A method for determining a minimization factor for improving linearity of an analog-to-digital converter including a plurality of components includes the steps of: (a) Evaluating integral non-linearity response of the apparatus to identify significant departures of the response greater than a predetermined amplitude and to relate each respective significant departure with a respective identified component. (b) Determining magnitude of each significant departure. (c) Identifying a trimming factor related with each component. (d) Determining a residual gap magnitude for each significant departure. The residual gap magnitude comprises the magnitude of the respective significant departure less the trimming factor related with the identified component. (e) Determining the minimization factor as a sum of the residual gap magnitudes for a selected plurality of the identified components.

Abstract: A method and apparatus to convert parallel data to serial data. More specifically, there is provided a parallel-to-serial converter comprising a data pipeline configured to receive parallel data, and binary sort logic comprising a plurality of switches arranged to receive the parallel data from the data pipeline, and configured to output the parallel data serially.

Abstract: A data conversion system for converting data output from an information processor into data in a different format in real time while preventing image defects such as dropped frames or repeated frames in moving image data by synchronizing data transfer with converted data output. One of first and second nodes on an IEEE1394 bus functions as a cycle master, and first data is transferred from the first node to the second node in synchronism with a cycle start packet outputted from the cycle master. Second data generated by converting the first data by the second node is outputted in synchronism with an external reference signal. The system includes an external synchronizing signal receiver for receiving an external reference signal provided on at least one of the first and second nodes, and a synchronization adjustment unit for synchronizing the frequency of the cycle start packet output from the cycle master with the frequency of the reference signal received by the external synchronizing signal receiver.

Abstract: An image sensor comprises an active pixel sensor (APS) array, a first analog-to-digital converter (ADC), and a ramp signal generator. The APS array has includes a plurality of pixels of arranged in a second order two-dimensional matrix, and wherein the APS array generates a reset signal and an image signal for each pixel of selected columns. The first ADC has includes correlated double sampling (CDS) circuits for each column of the APS array, and wherein the first ADC generates a digital code corresponding to the difference between the reset signal and the image signal using an output ramp signal that is applied to the CDS circuits for each column. The ramp generator generates the output ramp signal in which a low illumination portion and a high illumination portion have different slopes.

Abstract: A circuit is provided to correct a sample rate by way of time domain interpolation having a first circuit loop having an up/down counter configured to receive an input signal and a feedback signal and an adder configured to receive the output signal from the up/down counter and to output a carry output as the feedback signal to the up/down counter and a second circuit loop configured to transmit a sum output from the adder to a modulator and to feed back an output signal from the modulator to an input of the adder.

Abstract: A signal sampler and method for high-speed input sampling of a signal are disclosed. A first sampler samples a data signal at a rising edge of a clock signal and generates a first sampled signal. A second sampler samples the data signal at a falling edge of an inverted clock signal and generates a second sampled signal. The first and second sampled signals may be combined to determine the next signal sampler output. An evaluation may include asserting the output signal if the first and second sampled signals are asserted, negating the output signal if the first and second sampled signal are negated, and toggling the output signal if the first and second sampled signals are in opposite logic states. The signal sampler and method of signal sampling may be incorporated in a semiconductor device, which may be fabricated on a semiconductor wafer and included in an electronic system.

Abstract: A PM/FM modulator (100) includes an analog-to-digital converter (110) having an input terminal for receiving an analog input signal, and an output terminal, and a direct digital frequency synthesizer (120) having an input terminal coupled to the output terminal of the analog-to-digital converter, and an output terminal for providing a modulated output signal. In one form, an FM stereo modulator (200) includes a digital stereo modulator (210) and a direct digital frequency synthesizer (250). The digital stereo modulator (210) has a first input terminal for receiving a right analog input signal, a second input terminal for receiving a left analog input signal, and an output terminal for providing a digital signal having a stereo spectrum. The direct digital frequency synthesizer (250) has an input terminal coupled to the output terminal of the digital stereo modulator (210), and an output terminal for providing a modulated output signal.

Abstract: A sigma delta digital-to-analog (D/A) converter system (10) includes a summing device (35) at an input of a D/A converter (30), and a low frequency low amplitude wave signal (31) injected at an input of the summing device that remains unfiltered and is used to suppress spurious tone artifacts. The D/A converter system can further include an amplitude control and a frequency control for selectively adjusting the frequency and the amplitude of the low frequency low amplitude wave signal being injected. Note, the low frequency low amplitude repeating wave signal generator can take the form of a digital signal processor (DSP) (37) having the appropriate software to generate such signals.

Abstract: The present invention provides a digital-analog converter having: a DEM logic device (10) for generating at least two digital output data items (13, 14) from the digital input data (11) on the basis of a predetermined algorithm to determine an initial cell and a final cell in the array arrangement (22), between which there are situated cells (24) with energy sources (30) to be activated; a decoder device (16) for decoding the at least two digital output data items (13, 14) from the DEM device (10) into actuation signals (17, 17?, 18, 18?, 19, 19? 20, 20?, 21, 21?) in order to activate the cells (24) which are to be activated; and an array arrangement (22) of cells (23) for outputting at least one quantized analog signal (25, 25?) on the basis of the actuation signals (17, 17?, 18, 18?, 19, 19? 20, 20?, 21, 21?). The present invention likewise provides a method for digital-analog conversion.

Abstract: A capacitor array in an integrated circuit with active unit capacitor cells arranged amongst the dummy unit capacitor cells to provide visual and electrical symmetry. The electrical symmetry provides electrical matching between active unit capacitor cells and the visual symmetry provide process uniformity between the unit capacitor cells. Visual symmetry may be provided by uniform capacitor plate selection and uniform spacing between each. Electrical symmetry is provided by appropriately arranging active unit capacitors amongst dummy unit capacitors in the capacitor array. The capacitor array may be used in an integrated circuit such as for a equally weighted or binary weighted capacitor array or ladder in an analog to digital converter or a digital to analog converter. Methods and rules of layout for arranging the unit capacitors may be manually performed or automatically performed by computer aided design software.

Abstract: An electronic circuit structure uses an analog-to-digital conversion concept for saving circuit pins and installs a control circuit on a main board, and the control circuit includes a processor, an analog-to-digital converter circuit, a power supply circuit and an ID generator circuit; wherein the power supply circuit is connected separately to the processor, the analog-to-digital converter circuit, and the ID generator circuit for providing a stable operating power supply; the analog-to-digital converter circuit is connected to the ID generator circuit for receiving a voltage divide power produced by the ID generator circuit and converting the voltage divide power into a digital machine ID; and the analog-to-digital converter circuit is connected to the processor for sending the machine ID. After the processor obtains the machine ID, the processor can analyze and determine the hardware configuration represented by the voltage divide power for the main board to carry out the booting operation.

Abstract: The analog-to-digital converter directly acquires a supplied clock signal, generates a current control signal depending on the sampling frequency of the clock signal, so as to control a current value. Thus, it becomes possible to control the current to an optimal value according to the sampling frequency, irrespective of the clock signal generation means, achieving low power consumption in the analog-to-digital converter.

Abstract: The present invention is intended to provide an A/D converter making it possible to reduce the power consumption of an output interface. The A/D converter includes an output current value designation register that holds a value sent from an upper-level unit, and an output current value designation circuit that controls a constant current source, which supplies a constant current to a low-voltage differential signal output circuit, according to the value held in the output current value designation register so as to designate an output current value.

Abstract: A reference voltage generating circuit includes: a first capacitor; a second capacitor; a reference voltage sampling capacitor; a first switch for alternatively coupling the second capacitor to a predetermined voltage to allow the second capacitor to sample the predetermined voltage; a second switch for alternatively coupling the second capacitor to the first capacitor to allow the second capacitor to redistribute charges with the first capacitor in order to generate the reference voltage; and a third switch for alternatively coupling the first capacitor to the reference voltage sampling capacitor to allow the reference voltage sampling capacitor to redistribute charges with the first capacitor in order to output the reference voltage.

Abstract: A radar decoy having radar reflectors disposed in the interior of the inflated canopy of a descending parachute as a first set of four corner reflectors, and a second set of corner reflectors disposed on the exterior of the canopy integral with the first set of corner reflectors, to form an octahedron of eight corner reflectors. The radar decoy is pliable and folded with the parachute for stowage in the interior of a canister. When loaded on a vehicle flying in a trajectory, the canister may open at a point P on the trajectory, to release the parachute, and thereby deploy the radar decoy to become operative.

Abstract: In one aspect, the present invention provides an imager, preferably portable, that includes a source of electromagnetic radiation capable of generating radiation with one or more frequencies in a range of about 1 GHz to about 2000 GHz. An optical system that is optically coupled to the source focuses radiation received therefrom onto an object plane, and directs at least a portion of the focused radiation propagating back from the object plane onto an image plane. The imager further includes a scan mechanism coupled to the optical system for controlling thereof so as to move the focused radiation over the object plane. A detector optically coupled to the lens at the image plane detects at least a portion of the radiation propagating back from a plurality of scanned locations in the object plane, thereby generating a detection signal. A processor that is in communication with the detector generates an image of at least a portion of the object plane based on the detection signal.

Abstract: A system and method for processing data related to weather phenomena in a meteorological radar system. The method includes receiving an echo signal generated by transmitting a long pulse and employing a mismatched windowed filter on the echo signal such that the echo signal is compressed in time to achieve fine range resolution without substantially degrading sensitivity and while achieving low range time side lobes for Doppler velocities expected to be measured by the meteorological radar system.

Abstract: The embodiment of the invention is related to a processor comprising, for example, means for determining a predetermined number of frequency estimates, means for determining an average of the frequency estimates for obtaining an averaged frequency offset, means for unbiasing received samples and/or impulse response values using the averaged frequency offset, means for calculating Doppler frequency estimates using the unbiased received samples and/or impulse response values and means for calculating selected second order statistics of the Doppler frequency estimates over a predetermined period.

Abstract: A method and a system for processing a reflected microwave signal generated by a radar level a gauge system arranged to transmit microwaves towards the material in the tank, and receive a reflection of said microwave signal as a tank signal. The tank signal is processes by a plurality of processes, each process being adapted to determine a process variable in a specific region of the tank, each specific region corresponding to a predefined propagation distance range. Such multi-processing of the received tank signal has the advantage that each process can be optimized to that particular region of the tank. More specifically, a process concerned with a particular region of tank only needs to treat a portion of the tank signal.

Abstract: A signal adder circuit includes: an adding unit that includes at least a pair of amplification elements in which a constant current flows between ground terminals and a ground, input signals having different phases are input to input terminals, and output terminals to which a power supply voltage is applied are connected to each other; a gain control unit that is provided between the ground and each of the ground terminals of the amplification elements so as to adjust the amplitudes of the input signals having different phases; and a phase control unit that is provided between the ground and each of the ground terminals of the amplification elements so as to adjust the phases of the input signals having different phases.

Abstract: Systems and methods for satellite navigation are provided. In one embodiment, a mobile unit for a satellite navigation system is disclosed. The mobile unit comprises means for transmitting a request radio signal to satellite vehicles; means for receiving a response radio signal, wherein the response radio signal includes orbital coordinates of the one or more satellite vehicles; means for calculating a range to the satellite vehicles by calculating a time difference of arrival range based on a transmitted request radio signal and a received response radio signal, wherein the means for calculating a range is responsive to the means for transmitting a request radio signal and the means for receiving a response radio signal; and means for calculating position based on the range to at least three satellite vehicles and the orbital coordinates of the at least three satellite vehicles responsive to the means for calculating a range.

Abstract: The present invention discloses a Bluetooth satellite receiver device powered by a cigarette lighter socket, which comprises: a cigarette lighter plug module, inserted into a cigarette lighter socket to obtain power from a vehicle; a power supply module, electrically coupled to the cigarette lighter plug module, and supplying power to the device; a satellite receiver module, electrically coupled to the power supply module; and a Bluetooth communication module, electrically coupled to the power supply module. The satellite receiver module receives the signals from a satellite in an orbit and then decodes the signals into a latitudinal and longitudinal information and sends the latitudinal and longitudinal information to the Bluetooth communication module. The Bluetooth communication module receives the latitudinal and longitudinal information and sends it out wirelessly. The user utilizes a portable electronic device having the Bluetooth receiver function to receive the abovementioned information.

Abstract: A method (400) and system (300) for determining an approximate location of a device (201) within the footprint of a SPS satellite (116) and a secondary satellite (114) can include a SPS receiver (104) for receiving positional assistance information from the SPS satellite, a secondary satellite receiver (102) for receiving positional assistance information such as ephemeris data from a secondary satellite, and a processor (310) for determining the approximate location based on the positional assistance information from the satellite position system satellite and the secondary satellite.

Abstract: A method and portable terminal for searching for a constellation using the portable terminal are provided, in which position information, direction information, and time information of the portable terminal are extracted, a constellation corresponding to the extracted position information, direction information, and time information of the portable terminal is searched, a shape of the searched constellation is displayed, an enlargement/reduction function is performed while displaying the constellation shape, detailed information regarding the displayed constellation is displayed, position information, direction information, and time information of the portable terminal, and the shape of the constellation and the constellation information are stored, the position information, the direction information, and the time information of the portable terminal, and the shape of the constellation and the constellation information are transmitted to a receiver, and the constellation shape is set and displayed as a backgr

Abstract: A method of acquiring a weak signal includes selecting a first predetection integration time (PIT) interval for processing a digital intermediate frequency (IF) signal, selecting a number of data bit edges within the PIT, computing a plurality of coherent integrations for each data bit edge, selecting a coherent integration, which corresponds to a most likely data combination for each data bit edge, from the plurality of coherent integrations, updating an incoherent integration total for each data bit edge with the coherent integration corresponding to the selected most likely data bit combination for each data bit edge, comparing the incoherent integration total for each data bit edge with a threshold after a predetermined number of steps of the coherent integration computations and incoherent integration total updates, and identifying a code delay from the incoherent integration. The method may also include determining a code delay from an estimated Doppler shift corresponding to the identified code delay.

Abstract: An improved system and method is disclosed for dynamically estimating the output variances of carrier-smoothing filters used, for example, in GPS receivers. By accurately estimating the output variances of the carrier-smoothing filters as they transition from initialization to steady-state operation, it is possible to calculate any required protection levels without having to wait for the filters to fully stabilize. As one example, a system for estimating output variances of a carrier-smoothing filter for use in a satellite navigation system receiver is disclosed, which includes a plurality of smoothing filters associated with a navigation processing unit in a satellite navigation receiver. One or more processors associated with the navigation processing unit executes an algorithm for each smoothing filter, which provides a method for dynamically calculating an output variance for a respective smoothing filter as it transitions in response to new input variance values.

Abstract: A method and device to track navigational satellite signals, are claimed. In this invention, a combination of down-sampling and frequency domain transformation are used to track the navigational satellite signals under dynamic environment. A Fast Fourier Transform (FFT) with long coherent integration has been employed to determine the varying frequency components with high resolution. By representing a number of correlation values with their average value, it is possible to represent a long sequence of input values by a smaller number of values and a relatively short length FFT can reveal the low frequency components that are present in the signal during tracking operation. A large reduction in the computational load may be achieved using this down-sampling method without compromising on the frequency resolution.

Abstract: A method and apparatus for calibrating such a spot beam antenna by use of scanned spot beam signal characteristics measured by a plurality of ground based navigation receivers is disclosed.

Abstract: A wireless network apparatus, comprising a weighting device. The weighting device, includes a weight generator, and an algorithmic unit, and is for receiving and multiplying digital input signals from an antenna by a weight vector to output a digital weighted signal. The invention searches for the location of the client by detecting its signal strength and moving the main beam generated by the antenna array towards the client using an adaptive digital beamforming method according to proposed algorithms. The method searches for a client by: first, searching a main central angle C; then, determining a weight vector in response to the main central angle C; fine-tuning the main central angle C; and forming a main beam according to the fine-tuned main central angle and the weight vector.

Abstract: A method of controlling multiple antenna signal transmission is disclosed. The method includes adjusting signal parameters so that transmission signals from a plurality of antennas combine to form a directional beam. A time duration in which the transmission signals are directed is controlled so that an average EIRP does not exceed a predetermined threshold.

Abstract: Noise discrimination in signals from a plurality of sensors is conducted by enhancing the phase difference in the signals such that off-axis pick-up is suppressed while on-axis pick-up is enhanced. Alternatively, attenuation/expansion are applied to the signals in a phase difference dependent manner, consistent with suppression of off-axis pick-up and on-axis enhancement. Nulls between sensitivity lobes are widened, effectively narrowing the sensitivity lobes and improving directionality and noise discrimination.

Abstract: An electrical connector with a frequency-tuned groundplane is disclosed. The connector includes a signal medium to communicate an electrical signal and a frequency-tuned groundplane medium to communicate a reference voltage (i.e., ground). The groundplane medium differentially supplies the reference voltage to the groundplane second end, responsive to the frequency of the electrical signal. In one aspect, the first groundplane layer conductive trace includes a transmission line pattern, and the second groundplane layer conductive trace is connected to the first groundplane layer conductive trace through a plurality of conductive vias. For example, the first groundplane layer may include a plurality of conductive patches, some of which have a via connection to the second groundplane layer conductive trace.

Abstract: The present planar antenna include: a linear antenna element to which electric power is to be supplied and a loop-shaped parasitic antenna element placed in the vicinity of said linear antenna element, which are provided on one side of a dielectric substrate. This simple arrangement makes it possible to provide a planar antenna with good circular polarization characteristics.

Abstract: Provided are a Planar Inverted-F Antenna (PIFA), a Radio Frequency Identification (RFID) tag using the PIFA. The present invention miniaturizes the antenna by using a meander line extended from a radiating edge of a radiation antenna and adjusting a resonant frequency of the antenna, and it performs impedance matching by adjusting capacitive reactance of the antenna. Also, it can perform impedance matching by using a stub having a slot formed therein and adjusting inductive reactance and capacitive reactance of the antenna. The present invention miniaturizes the antenna by using a plurality of shorting plates for shorting the radiation patch from a grounding surface and adjusting the resonant frequency of the antenna. The present invention also provides an inexpensive PIFA antenna with an excellent radiation efficiency by forming the radiation patch in the form of metal sheet in the antenna and floating the radiation patch in the air.