Abstract: A magnetic head includes a metallic material layer between a lower core layer and an upper shield layer. This metallic material layer extends to the rear of the magnetic head in the height direction to overlap with a first metal layer. The metallic material layer can therefore efficiently dissipate joule heat generated from a write head section to the outside of the magnetic head through the first metal layer. In addition, the metallic material layer can block a fluctuating magnetic field generated from the write head section. Thus, this magnetic head can reduce variations in the magnetic domain structures of upper and lower shield layers to stabilize the read output of a read head section.

Abstract: Disclosed are a magnetic sensing element in which side reading can be prevented, read sensitivity can be improved, and gap narrowing is enabled, and a method for fabricating the same. A magnetic sensing element includes a pair of first antiferromagnetic layers separated by a first spacer section. A first spacer layer is disposed in the first spacer section. The first spacer layer has the same composition as that of the first antiferromagnetic layers, and has a disordered crystal structure with a thickness that is smaller than that of the first antiferromagnetic layers. A first free magnetic layer is disposed on the continuous surface including the upper surfaces of the first antiferromagnetic layers and the first spacer layers. The magnetic sensing element also includes a nonmagnetic interlayer, a second free magnetic layer, and a pair of second antiferromagnetic layers separated by a second spacer section on the second free magnetic layer.

Abstract: A read element includes a magnetoresistive sensor having a side and an upper surface that defines an edge. An underlayer overlies the side of the magnetoresistive sensor, and a hard bias layer overlies at least part of the underlayer and defines a hard bias junction with the underlayer. A lead is formed atop the hard bias layer. The hard bias junction is recessed from the edge of the magnetoresistive sensor by a predetermined recess distance, to provide stability and sensitivity to the read element.

Abstract: The present invention provides a ferromagnetic tunnel magnetoresistive film which is associated with a high output and whose magnetoresistive ratio is less dependent on a bias voltage. In a three-terminal ferromagnetic tunnel magnetoresistive element, a decrease in an output is suppressed by a bias voltage V1 applied to one of the tunnel junctions. By employing half-metallic ferromagnets 11 and 12 in the element, the output can be enhanced and the dependency on the applied bias voltage can be reduced.

Abstract: The present invention is directed to an electrical wiring protection device that includes a housing assembly having at least one line terminal and at least one load terminal partially disposed therein. A first conductive path is electrically coupled to the at least one line terminal. A second conductive path is electrically coupled to the at least one load terminal, the second conductive path being connected to the first conductive path in a reset state. A fault detection circuit is coupled to the first conductive path. The fault detection circuit is configured to generate a fault detection signal in response to detecting at least one fault condition. A wiring state detection circuit is coupled to the first conductive path. The wiring state detection circuit selectively provides a wiring state detection signal when the at least one line terminal is coupled to a source of AC power, and not providing the wiring state detection signal otherwise.

Abstract: ESD protection circuitry for a signal power supply pad (801) comprising a discharge circuit (802) operable to discharge the ESD pulse to ground, and a precharge reduction circuit (810) in parallel with the discharge circuit. This precharge reduction circuit is operable to cancel any precharge voltage to ground before an ESD event, and also to discharge any trailing pulse to ground after an ESD event. The reduction circuit comprises a discharge resistor (811), preferably about 10 k?, connected to the discharge circuit, and a control MOS transistor (812) in series with the discharge resistor. The transistor source (812a) is connected to the resistor, the drain (812b) to ground, and the gate (812c) to core power (813) so that the transistor is shut off during IC operation and conducting when pre-charge or post-charge is present at an ESD pulse.

Abstract: An arrangement for protecting an electronic circuit is suggested which is mounted in a housing and is insulated relative to the housing. At least one connection is provided with which the electronic circuit is connected to a pregiven potential. A voltage-dependent resistor is introduced between the housing and the at least one connection for protecting against ESD-pulses and EMV-irradiation.

Abstract: An electrical device includes a body, an electrical contact having a first end for electrically coupling to an electrical apparatus and a second end within the body, and a conductor electrically coupled to the second end of the electrical contact. The electrical device also includes an access region defining a cavity and a surge arrester that electrically couples to the conductor through the access region. The cavity provides access to an interior of the electrical device. The access region may include an insulating projection extending from an insulating body of the electrical device and a conductive cover surrounding the insulating projection. The insulating projection defines the cavity. The conductive cover is electrically isolated relative to a conductive shell that surrounds the insulating body.

Abstract: An electronic control circuit for a motor vehicle starter contacter includes a management unit (26) having: first means for detecting the open or closed state of the power contact (20), and second means for regulating the power supply of the winding (18) during the starting cycle when the power contact (20) is still open after a predetermined period of time following commencement of the order for starting.

Abstract: An system and method are disclosed for isolating and grounding a load device, where grounding only occurs after the voltage(s) on the load device have been reduced to acceptable levels. The system includes power and grounding contacts, a sensing device, and a control device. The power contact determines whether a power line is coupled to a terminal of the load. The grounding contact determines whether the terminal is coupled to ground. The sensing device is coupled to the terminal, and the control device communicates with the contacts and sensing device. Upon a signal being provided to the control device, the control device causes the power contact to decouple the terminal from the power line and, upon the sensing device determining that a condition has been met concerning the terminal, the control device causes the grounding contact to couple the terminal with ground and a system indication light to be illuminated.

Abstract: An improved personal body grounding system includes a grounding pad having two or more ground leads conductively coupled to one or more grounded anchors having multiple ground contact points. A monitor tests the continuity to ground using the circuit created by the multiple ground contact points. The monitor includes multiple safety features in the event of a power surge. The system also includes an electrical meter to measure the personal body voltage of a user and a voltage gauge for measuring continuity to ground.

Abstract: An air ionizing module and method for generating ions of one and opposite polarities within a flowing stream of air or other gas includes a thin-filament electrode mounted within the flowing stream in regions thereof of maximum flow velocity. The thin-filament electrode is mounted in a multi-sided polygonal configuration to receive high ionizing voltage of alternating one and opposite polarities to form an intense stream of ions toward an electrically-isolated reference electrode positioned upstream of the filament electrode. Another reference electrode positioned within the flowing stream downstream of the filament electrode receives a bias voltage of selected polarity to control the quantities of generated ions of positive and negative polarities in an outlet stream of the ions and flowing gas.

Abstract: Apparatus and method for depositing a banding material on the interior substrate of a tubular device, and the products formed therefrom. The tubular device is, generally, of relatively small diameter and comprises at least one band deposited from a first composition on the interior substrate. When the tubular device is a tubular capacitor and the band is a plating mask, the tubular capacitor comprises at least two electrodes deposited on the substrate in the presence of a deposited plating mask and comprises at least one conductive layer, deposited from a first composition, on the substrate and separated by the plating mask.

Abstract: According to some embodiments, a capacitor includes a first external capacitor plane including a first at least one terminal of a first polarity, and a first internal capacitor plane including a second at least one terminal of the first polarity. The second at least one terminal of the first polarity may be electrically coupled to the first at least one terminal of the first polarity, and a total area of the second at least one terminal of the first polarity may be less than a total area of the first at least one terminal of the first polarity.

Abstract: A method of fabricating high resistivity thin film resistors. An isolation region is formed on a substrate to isolate the active regions. A polysilicon layer is formed above the substrate. A diffusion barrier layer is formed above the polysilicon layer. Lightly doped ions are implanted in the polysilicon layer. The substrate is annealed at a high temperature. The diffusion barrier layer and the polysilicon layer are patterned to form a high-resistive thin film resistor. Spacers are formed on the sidewalls of the high-resistive thin film resistor.

Abstract: The invention relates to an electrochemical cell including: at least a pair of current collector plates that are placed in parallel to each other, flat electrodes containing aqueous electrolyte printed on opposing faces of said current collectors, such that a peripheral region is defined on each of said faces of said current collectors, which region is not covered by said electrode, and a separating medium interposed between said electrodes, the geometric form and size of said separating medium being identical to the form and size of said current collector plates, said separating medium having a central region permeable to said electrolyte, surrounded by a peripheral masked region which is non-permeable to said electrolyte, such that the permeable region of said separating medium coincide with the electrodes printed on the opposing faces of said current collectors, with respect to position, geometric form and size; wherein the pores in the peripheral region of the separating medium are impregnated with a suit

Abstract: A rack-mount structure has a roof mount fitted to the roof, the roof mount includes a slot therein, a suspending frame pivotally connected to one side of the slot, and a latching mechanism for releasably securing the flat panel display to the suspending frame. The suspending frame has a receiving space for receiving a flat panel display therein. A pair of latching members is formed on the roof mount and the suspending frame to lock the suspending frame within the slot. A release button controlling the engagement between the latching members can also be formed on the roof mount or the suspending frame. One side of the receiving space of the suspending frame is covered with a mirror plate or a glass plate.

Abstract: A processor module is packaged with a display for a portable electronic device. The display is designed to create a space within a display housing to allow a processor module to be included in the display housing. The processor module can be designed to be integral with the display housing. Additionally, the processor module can be designed to be detachable from the display housing to provide a removable processor module. The removable processor module can be replaced with another processor module having different functionality or have stand alone functionality, as well as system functionality when attached to a display lid or a portable electronic device.

Abstract: A fixing apparatus is for fixing a motherboard (60) in a chassis (20). The chassis includes a supporting board (30). The supporting plate includes a number of clips (36, 38), and a screw hole (391). The motherboard (60) defines a number of through holes (62) corresponding to a number of standoff (40) disposed on the supporting plate, a number of apertures (64), and a fixing hole (66). The through holes each include a circular hole (622), and a slot (624). The standoffs each comprise a head (42), a neck (44), and a base (46). The clips each include a shoulder (367, 387), and a catch (366, 386). The standoffs and the clips engage the through hole and the apertures of the supporting plate to attach the motherboard in the chassis. A stud extends through the fixing hole and engages the screw hole to secure the motherboard in the chassis.

Abstract: A security structure of portable hard disk drive is disclosed to include a bracket fixedly mounted in a computer case, a plurality of portable hard disk drives inserted into respective sliding grooves inside the bracket at different elevations, and a locking rod, for example, a long screw for insertiing through a through hole on the top panel of the bracket and a respective through hole on each portable hard disk drive and threading into a nut at the bottom panel of the bracket to affix the portable hard disk drives to the bracket. The locking rod is kept from sight after installation of the portable hard disk drives in the bracket and closing of the computer case.

Abstract: A fastening device for retaining a disc drive and being connected with a casing of an electronic product is disclosed. The casing has a recess and a stop portion. The fastening device has a bracket, a resilient latching member, and a resilient locking member. The bracket has a plate body. The resilient latching member is fixed on the plate body and has a first resilient plate. The resilient locking member is fixed on the plate body and has a second resilient plate. The first resilient plate latches on to the disc drive, so that the disc drive and the fastening device are combined. The fastening device and the disc drive are received in the recess of the casing, and the second resilient plate locks on to the stop portion of the casing. As a result, the disc drive is capable of being installed in and removed from the electronic product.

Abstract: An apparatus and method of cooling a plurality of electronic components in a housing using one or more fans cooperating with baffles or ducts for directing a stream of air sequentially to the components or heat exchangers for the components. Direction of the air stream to the components is based on predetermined cooling prioritization of the plurality of components.

Abstract: An integrated heat sink device, which is utilized to dissipate the heat generated by heat-generating elements with different angles of radiation surface (for instance, CPU and display chip are with radiation surfaces at 180° and 90°), is provided. The integrated heat sink device comprises a thermal module and a fan module; wherein the thermal module further comprises a first heat conduction module, a fin set, and a second heat conduction module; wherein the fan module, its vent connects with the fin set in an air-tight manner in order to form a heat-dissipating channel; and the first and second heat conduction modules are with different angles of heat connected surfaces so that the invention of the integrated heat sink device can dissipate the heat generated by heat-generating elements with different angles of radiation surface.

Abstract: Embodiments of the present invention include an apparatus, method, and system for providing a flow distributive interface for a thermal management arrangement.

Abstract: A cooling system (11) is provided for electrical components (10, 90) in which passageways (21) are inserted in non-magnetic cores of the electrical components, and in which the passageways (21) provide both inflow and outflow of a cooling medium. The passageways (21) can be formed by drilling holes in a core of an electrical component or by mounting closed-end tubes (16–19) on a base plate-cooling manifold (20) or can be part of a conduit assembly (70). The tubes (16–19, 71) are split-flow closed-end tubes inserted from one end of the electrical component (10, 90). The tubes and passageways (16–19, 21, 71) may be partitioned into two halves or into two concentric portions. O-ring seals (28) are provided around the base of the tubes to seal the areas where the passageways communicate with hollow portions of base plates for supplying the cooling medium.

Abstract: A support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support, in conjunction with other packaging features may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Abstract: An apparatus includes a socket and a dynamic random access memory (DRAM) module installed in the socket.

Abstract: A cooling system for a computer includes a cam-actuated cold plate. Compliant, thermally conductive pins on the cold plate contact electronic heat generating electronic components when the cold plate is moved toward a circuit assembly that includes the electronic components. Optionally, the cold plate may be cooled by circulating coolant through it.

Abstract: A transceiver module has an interface surface and is received within a cage. The cage has a cage latch that retains the transceiver module. The transceiver module has a ramp, an actuator and a release handle. The ramp is located on the interface surface of the transceiver module and has a ramp surface that slopes away from the interface surface of the transceiver module and toward the cage latch. The actuator is adjacent the interface surface of the transceiver module and is configured to be movable on the ramp surface. The release handle is mounted on the transceiver module and is coupled to the actuator. Rotating the release handle in a first direction causes the actuator to move along the ramp surface toward the cage latch thereby moving the cage latch away from the interface surface. Rotating the release handle in a second direction causes the actuator to move along the ramp surface toward the interface surface and away from the cage latch.

Abstract: A screwless clip mounted computer drive.

Abstract: A shelf is provided defining a tubular closed passage with a frontend opening and a backend opening. A frontend partition is adapted for supporting a first component inserted in the frontend. A removable backend partition is adapted for supporting a second component inserted in the backend. A removable backplane support is adapted for operably supporting a backplane in electrical connection with the first and second components. Further, a method is provided for electrically connecting components.

Abstract: An electronic device with flexible printed circuit board structure. The electronic device includes a first flexible printed circuit board and a second flexible printed circuit board. The first flexible printed circuit board has a first bent portion. The second flexible printed circuit board has a second bent portion penetrating the first bent portion as the first and the second flexible printed circuit boards are bent simultaneously.

Abstract: A contactless power supply has a dynamically configurable tank circuit powered by an inverter. The contactless power supply is inductively coupled to one or more loads. The inverter is connected to a DC power source. When loads are added or removed from the system, the contactless power supply is capable of modifying the resonant frequency of the tank circuit, the inverter frequency, the inverter duty cycle or the rail voltage of the DC power source.

Abstract: A control circuit 6 of a resonance type switching power source comprises a drive circuit 21 for supplying drive pulses to each gate terminal of first and second MOS-FETs 2,3; a PWM circuit 9 for causing drive circuit 21 to produce drive pulses; an input voltage detector 7 for detecting input voltage from DC power source 1 and comparing the input voltage and input reference voltage Vref1; and a frequency adjuster 8 for adjusting oscillation frequency of PWM circuit 9 in response to output level from the input voltage detector 7. With adjustment in oscillation frequency of PWM circuit 9 in response to input voltage Vin from DC power source 1, control circuit 6 can modify on-off timing of first and second MOS-FETs 2, 3 to keep good resonating action and prevent off-resonance although DC power source 1 produces fluctuating input voltages.

Abstract: A current flowing through a reactor flows through a resistor, which generates a voltage in accordance with the value of the current. As the voltage generated by the resistor is greater than or equal to the threshold of a transistor, the transistor is in an on state. As the current flowing through the reactor decreases and the voltage generated by the resistor becomes lower than the threshold of the transistor, the transistor turns off and an NMOS turns on. Accordingly, the gate voltage of an NMOS is decreased by a diode, ensuring that the NMOS is turned off before the current flowing through the secondary winding of a transformer becomes zero.

Abstract: A transformer has a primary winding connected to a pair of DC input terminals via an active switch, and a secondary winding connected to a pair of DC output terminals via a first rectifying and smoothing circuit. The active switch is driven constantly under normal load, and at intervals under light load, under the direction of a switch control circuit. This switch control circuit is powered with a control voltage fed from a second rectifying and smoothing circuit which is connected to a tertiary winding of the transformer. In order to preclude malfunctioning or nonoperation in the event of an abnormal drop of the control voltage during operation in light load mode, the switch control circuit is equipped to drive the active switch at shorter intervals in control voltage recovery mode when the control voltage falls below a predefined limit than the normal intervals of the light load mode.

Abstract: A synchronous rectifier control circuit improves energy conversion efficiency and uses a signal produced by a secondary winding of a transformer in a rectifier circuit to control a low-impedance and a low power consuming current switch such as a JFET and a MOSFET in a synchronous rectifier circuit to substitute a high power consuming diode rectification and appropriately rectify and extend the ON time of the current switch to prevent the positive and negative phases of the current switch to be turned on simultaneously, which will cause a large current to burn the current switch. The invention includes a protection circuit having an under voltage lock out circuit for an interrupt output function, so that if an insufficient instant power voltage occurs, the power is turned on or off to interrupt all outputs and force the current switch of the rectifier circuit to turn off, and prevent the output of an unstable working voltage of the rectifier control circuit or the abnormal operation of the current switch.

Abstract: A method and apparatus for adaptively configuring an array of voltage transformation modules is disclosed. The aggregate voltage transformation ratio of the adaptive array is adjusted to digitally regulate the output voltage for a wide range of input voltages. An integrated adaptive array having a plurality of input cells, a plurality of output cells, or a plurality of both is also disclosed. The input and output cells may be adaptively configured to provide an adjustable transformer turns ratio for the adaptive array or in the case of an integrated VTM, an adjustable voltage transformation ratio for the integrated VTM. A controller is used to configure the cells and provide digital regulation of the output. A converter having input cells configured as a complementary pair, which are switched out of phase, reduces common mode current and noise. Series connected input cells are used for reducing primary switch voltage ratings in a converter and enabling increased operating frequency or efficiency.

Abstract: The present invention provides a universal serial bus (USB) voltage transformer, which comprises a main body, a transformer circuit unit, and several connectors. The transformer circuit unit is disposed in or at the inside of the main body. The connectors are electrically connected to the transformer circuit unit directly or via a connection cable. A USB voltage transformer having travel charging function is thus formed. The USB voltage transformer of the present invention can simultaneously charge several portable electronic devices like mobile phones, personal digital assistants, electronic translators, and small cameras.

Abstract: A combination controller incorporates features of a classic controller and a state space controller to function as a hybrid controller unit. The PID portion of the classic controller regulates the steady state error and is separated from the pulse width modulated constant frequency signal generator that also comprises part of the classic controller. The PID portion is coupled with a state space controller such that the output of the PID controller, i.e., the steady state error correction, is input to the state space controller. The state space controller further receives as input variables a reference sinusoidal signal, the load current, the current across a pre-load filter capacitor, and the output voltage. From these inputs, the state space controller employs principles of differential calculus to generate a transient error correction that is fed to a PWM signal generator for generating a sinusoidal output voltage signal with both steady state and transient error correction.

Abstract: To provide laminated type semiconductor memory devices that can improve the yield of chips without complicating wirings and components. There are provided a plurality of laminated semiconductor chip layers, and chip selection pads provided on each of the chip layers, which are mutually connected across the chip layers, respectively, such that a chip selection signal for selecting each of the chip layers is commonly inputted in each of the chip layers. Each of the chip layers is equipped with program circuits each of which is capable of programming an output signal, and a chip selection judging circuit that judges a chip selection based on the chip selection signal and an output signal of the program circuit. As a result, address information can be set afterwards by the program circuit, such that one kind of chips may suffice in the chip manufacturing stage. Because the chip selection signal is inputted in the common chip selection pads, independent wirings for the respective chips are not required.

Abstract: Memory apparatus and methods align a core clock for a memory agent to one of a plurality of lanes. A memory agent may have logic circuit between the lanes and a core clock generator to align the core clock to one of the lanes. A deskew circuit may be coupled to the logic circuit. Other embodiments are described and claimed.

Abstract: One memory module includes a printed circuit board comprising an upper row of memory integrated circuits, a lower row of memory integrated circuits, and a first addressing register and a second addressing register, the first addressing register and a second addressing register each having at least one of address and control input routing primarily provided in a first layer, the first addressing register coupled to the upper row of memory integrated circuits and the second addressing register coupled to the lower row of memory integrated circuits.

Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.

Abstract: A flash memory system capable of inputting/outputting data in units of sectors at random. The flash memory system includes a flash memory (a cell array), a buffer memory, a random data input/output circuit, and a control circuit. The random data input/output circuit receives data in units of sectors from the buffer memory or outputs the data in units of sectors to the buffer memory. The control circuit controls the order and the number of times of inputting/outputting data between the buffer memory and the random data input/output circuit.

Abstract: A ferroelectric memory including a bit line pair, a drive line parallel to and located between the bit lines, and an associated memory cell. The memory cell includes two capacitors, each capacitor connected to one of said bit lines via a transistor, and each capacitor is also connected to the drive line via a transistor. The gates of all three of the transistors are connected to a word line perpendicular to the bit lines and drive line, so that when the word line is not selected, the capacitors are completely isolated from any disturb. The bit lines may be complementary and the cell a one-bit cell, or the cell may be a two-bit cell. In the latter case, the memory includes a dummy cell identical to the above cell, in which the two dummy capacitors are complementary. A sense amplifier with three bit line inputs compares the cell bit line with a signal derived from the two dummy bit lines. The logic states of the dummy capacitors alternate in each cycle, preventing imprint and fatigue.

Abstract: A non-volatile ferroelectric memory device having differential datacomprises a plurality of cell array blocks and a data buffer unit. Each of the plurality of cell array blocks includes cell arrays and sense amplifiers. The cell array has a hierarchical bit line architecture and are divided into top and bottom groups where differential data are stored in a plurality of unit cells corresponding to differential main bit lines of the divided cell arrays. The sense amplifiers are positioned between the divided cell array groups for sensing the differential data. The data buffer unit temporarily stores a read data sensed by the sense amplifier and a write data received through a data I/O port.

Abstract: A nonvolatile ferroelectric memory device comprises a cell array block, a sense amplifier unit, a main amplifier unit and a data bus unit. The ferroelectric sense amplifier effectively senses and amplifies cell data having a small voltage difference applied to a main bit line, thereby improving operation characteristics in a low voltage. Also, a sensing voltage of the main bit line is lowered, thereby reducing a cross talk noise effect between main bit lines.

Abstract: A ferroelectric memory has a plurality of memory cells respectively having a cell transistor and ferroelectric capacitor whose one terminal is connected with the cell transistor, a plurality of word lines respectively connected with said cell transistor, a plurality of plate lines connected with the other terminal of said ferroelectric capacitor and intersecting with said word lines, a plurality of local bit lines connected with said cell transistors, and a global bit line that is selectively connected with local bit lines. Furthermore, the ferroelectric memory has a sensing amplifier unit that detects the amount of charging of the local bit lines from said memory cells while maintaining the potential of the local bit lines at a potential equivalent to the non-selected plate lines, during reading.

Abstract: A nonvolatile ferroelectric memory device and a control method thereof are provided to control read/write operations of memory cell arrays whose channel resistance is differentiated depending on a polarity state of a ferroelectric material. In the device, data read from a memory cell are sensed and amplified through a sense amplifier, and the amplified data are stored in a register. Then, high data are written in all activated cells. Thereafter, new data applied from a data bus unit to a selected memory cell are written in response to an output signal from a column decoder, and data stored in the register are written-back in an unselected memory cell.