Patents Issued in June 7, 2007
  • Publication number: 20070126093
    Abstract: A manufacturing process of a high thermal conducting circuit substrate is provided. First, a metal core substrate is provided and then the metal core substrate is etched at different etching speeds. Afterwards, two insulating layers are formed respectively on two sides of the etched metal core substrate. In addition, as an option, two conducting layers are formed respectively on two sides of the metal core substrate and are on top of the insulting layers. The conducting layers are patterned according to designs appropriate for the products. Because the high thermal conducting circuit substrate fabricated as the aforementioned manufacturing process mainly comprises the metal core substrate, it helps to elevate the thermal conduction of the circuit substrate itself.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 7, 2007
    Applicant: SUBTRON TECHNOLOGY CO., LTD.
    Inventors: CHUNG W. HO, LEO SHEN
  • Publication number: 20070126094
    Abstract: A method of forming a leadframe package, a leadframe package formed according to the method, and a system incorporating the leadframe package. The leadframe package includes: a metallization layer comprising a paddle portion and a contact portion including contact leads; a die mounted onto the paddle portion; wirebonds connected between the die and respective ones of the contact leads; an overmold encapsulating the die, the paddle portion, the contact leads and the wirebonds; and a stiffening element encapsulated in the overmold and unconnected to electrical pathways within the leadframe package.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 7, 2007
    Inventors: Saeed Shojaie, Brian Taggart, Dale Hackitt
  • Publication number: 20070126095
    Abstract: A semiconductor device has a semiconductor package with a semiconductor element is mounted on a mounting substrate. The mounting substrate has at least two anisotropic areas which are located at both sides of a semiconductor package mounting area in a way to sandwich it and have an anisotropic linear expansion coefficient. In the anisotropic areas, a linear expansion coefficient in a direction toward a center of the semiconductor package mounting area is larger than a linear expansion coefficient in an in-plane direction of the mounting substrate perpendicular to the direction and larger than a linear expansion coefficient of the semiconductor package mounting area in a direction toward the anisotropic areas. The semiconductor device makes it possible to reduce thermal deformation of a semiconductor package mounting area of a mounting substrate easily and at low cost.
    Type: Application
    Filed: November 30, 2006
    Publication date: June 7, 2007
    Applicant: Hitachi, Ltd.
    Inventor: Hisashi Tanie
  • Publication number: 20070126096
    Abstract: A method of producing a leadframe is provided comprising the steps of providing a substrate, plating the substrate with a layer of tin, plating a layer of nickel over the layer of tin, and thereafter plating one or more protective layers over the layer of nickel. The leadframe may thereafter be heated to produce one or more intermetallic layers comprising tin, which impedes the out-diffusion of copper from a base material of the leadframe to the surface thereof.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 7, 2007
    Inventors: Ran Fu, Deming Liu, Yiu Kwan
  • Publication number: 20070126097
    Abstract: A chip package structure including a first chip, a circuit substrate, and a two-stage thermosetting adhesive layer is provided. The first chip has a first upper surface, a first side surface, and a first bottom surface. The circuit substrate has an upper surface and a bottom surface. The first chip is electrically connected to the circuit substrate. The two-stage thermosetting adhesive layer is located on the upper surface of the substrate and has a first adhesive surface and a second adhesive surface. Part of the first adhesive surface is bonded to the first bottom surface and the second adhesive surface is bonded to the upper surface of the substrate such that the first chip is adhered to the upper surface of the substrate. The first adhesive surface is substantially parallel to the second adhesive surface, and the two-stage thermosetting adhesive layer has a tapered edge.
    Type: Application
    Filed: March 9, 2006
    Publication date: June 7, 2007
    Inventor: Chun-Hung Lin
  • Publication number: 20070126098
    Abstract: A surface-mountable light emitting diode structural element in which an optoelectronic chip is attached to a chip carrier part of a lead frame, is described. The lead frame has a connection part disposed at a distance from the chip carrier part, and which is electrically conductively connected with an electrical contact of the optoelectronic chip. The chip carrier part presents a number of external connections for improved conduction of heat away from the chip. The external connections project from a casing and at a distance from each other.
    Type: Application
    Filed: February 7, 2007
    Publication date: June 7, 2007
    Inventor: Karlheinz Arndt
  • Publication number: 20070126099
    Abstract: To provide a memory card advantageous for coping with an increase of storage capacity. As an embodiment of the present invention, a memory card is formed in a rectangular thin-plate form, by a housing that is made of an insulated material and in that a recessed part is formed on the top surface being one surface in the thickness direction, and a rectangular multi-chip package contained in the recessed part. The housing has a rectangular bottom wall and side walls standing from three of the four sides of the bottom wall. In these side walls, two side walls face to each other, and the remaining one side wall connects one end part of these side walls. The recessed part is formed to be open upward and sideward by the bottom wall and the three side walls.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 7, 2007
    Applicant: SONY CORPORATION
    Inventors: Yoshitaka Aoki, Keiichi Tsutsui, Hirotaka Nishizawa, Tamaki Wada
  • Publication number: 20070126100
    Abstract: Wiring lines for the supply of a voltage to feed a drive voltage to an integrated circuit formed in a semiconductor chip are disposed so as to cover a main surface of the semiconductor chip, so that, if the wiring lines are removed for the purpose of analyzing information stored in the semiconductor chip, the integrated circuit does not operates and it is impossible to analyze the information. Further, there is provided a processing detector circuit for detecting that the wiring lines have been tampered with. When the processing detector circuit detects a change in the sate of the wiring lines, the integrated circuit is reset. Thus, it is possible to improve the security of information stored on the card.
    Type: Application
    Filed: November 1, 2006
    Publication date: June 7, 2007
    Inventors: Hirotaka Mizuno, Yoshio Masumura, Takeo Kon, Yukio Kawashima
  • Publication number: 20070126101
    Abstract: A memory card module includes a first circuit board, and a second circuit board. On one surface of the first circuit board, there are flash memories and a controller. The second circuit board is installed at one end of the first circuit board and is electrically connected with the first circuit board so as to form a transmitting interface port. On a first surface of the second circuit board, there are a plurality of interface connecting points. On a second surface of the second circuit board, part of the second surface is hollowed out. A space formed between the hollowed out area and the corresponding first circuit board increases the area for circuit layouts and the mounting components for the first circuit board. Therefore, quantity of accommodated memory components may be increased so as to increase the total storage capacity of the memory card under limitation of small dimensions.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 7, 2007
    Applicants: A-DATA TECHNOLOGY CO., LTD., PING-YANG CHUANG
    Inventor: Ping-Yang Chuang
  • Publication number: 20070126102
    Abstract: A microelectronic assembly including a first and second microelectronic elements. Each of the microelectronic elements have oppositely-facing first and second surfaces and edges bounding the surfaces. The first microelectronic element is disposed on the second microelectronic element with the second surface of the first microelectronic element facing toward the first surface of the second microelectronic element. The first microelectronic element preferably extends beyond at least one edge of the second microelectronic element and the second microelectronic element preferably extends beyond at least one edge of the first microelectronic element.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 7, 2007
    Applicant: Tessera, Inc.
    Inventors: Ilyas Mohammed, Belgacem Haba
  • Publication number: 20070126103
    Abstract: An IC chip, a three dimensional microelectronic package including the IC chip, a system including the microelectronic package, and a method of forming the package. The microelectronic package comprises: a bonding substrate comprising external circuitry; a plurality of IC chips secured in a stack, the plurality comprising a bottom IC chip electrically interconnected to the bonding substrate; the stack further defining a passage therein having a passage inlet and a passage outlet and at least one via configured to guide cooling fluid from one surface of at least one of the IC chips to an opposing surface of the at least one of the IC chips, the passage further being configured to guide a cooling fluid from the passage inlet to the passage outlet. The package further includes electrical interconnects electrically interconnecting respective ones of the IC chips.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 7, 2007
    Inventor: Wei Shi
  • Publication number: 20070126104
    Abstract: A method of assembling a carriage assembly and an assembling apparatus that uses the same are capable of suppressing fluctuation in the crimped (deformed) states of spacer portions when suspensions are attached to carriage arms. The method of assembling a carriage assembly aligns fitting holes 10a provided in carriage arms 10 with spacer holes 12b of suspensions 12 and then passes a ball 20 with a diameter equal to or greater than an inner diameter of the spacer holes 12b through the spacer holes 12b to crimp edge portions of the spacer holes 12b in spacer portions 12a and thereby attach the suspensions 12 to the carriage arms 10. While the ball 20 is being pressed and sandwiched from both sides of the spacer holes 12b by two pressure-applying members 40a, 40b and ultrasonic vibration is applied to the two pressure-applying members 40a, 40b, the two pressure applying members 40a, 40b are moved so as to pass the ball 20 through the spacer holes 12b.
    Type: Application
    Filed: February 28, 2006
    Publication date: June 7, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Takayoshi Matsumura, Naoki Ishikawa, Hiroshi Kobayashi, Hidehiko Kira
  • Publication number: 20070126105
    Abstract: A stacked type semiconductor memory device of having a structure in which a plurality of semiconductor chips is stacked and a desired semiconductor chip can be selected by assigning a plurality of chip identification numbers different from each other are individually assigned to the plurality of semiconductor chips comprising: a plurality of operation circuits which is connected in cascade in a stacking order of the plurality of semiconductor chips and outputs the plurality of identification numbers different from each other by performing a predetermined operation; and a plurality of comparison circuits which detects whether or not each the identification number and a chip selection address commonly connected to each the semiconductor chip are equal to each other by comparing them.
    Type: Application
    Filed: December 6, 2006
    Publication date: June 7, 2007
    Inventors: Junji Yamada, Hiroaki Ikeda, Kayoko Shibata, Yoshihiko Inoue, Hitoshi Miwa, Tatsuya Ijima
  • Publication number: 20070126106
    Abstract: In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is suitable for attaching to a first semiconductor die and a second conductive strip that is attached suitable for attaching to a second semiconductor die.
    Type: Application
    Filed: February 7, 2007
    Publication date: June 7, 2007
    Inventors: Francis Carney, Phillip Celaya, Joseph Fauty, James Letterman, Stephen St. Germain, Jay Yoder
  • Publication number: 20070126107
    Abstract: In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is attached to a first semiconductor die and a second conductive strip that is attached to a second semiconductor die.
    Type: Application
    Filed: February 12, 2007
    Publication date: June 7, 2007
    Inventors: Francis Carney, Phillip Celaya, Joseph Fauty, James Letterman, Stephen Germain, Jay Yoder
  • Publication number: 20070126108
    Abstract: Conductive posts to be connected with external connection terminals are formed on a conductive pattern formed on a substrate, and an insulating resin sheet is laminated on the conductive pattern having the conductive posts formed thereon, so as to be flush with the end faces of the conductive posts 3 exposed to the substrate surface.
    Type: Application
    Filed: December 4, 2006
    Publication date: June 7, 2007
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Katsumi Yamazaki, Masato Tanaka
  • Publication number: 20070126109
    Abstract: A semiconductor device, includes: a semiconductor substrate having an active face; a first electrode provided on or above the active face of the semiconductor substrate; an external connection terminal electrically connected to the first electrode and provided on or above the active face of the semiconductor substrate; and a connection terminal provided on or above the active face of the semiconductor substrate, wherein any of a gold plated film, a silver plated film, and a palladium plated film is formed on at least one of the external connection terminal and the connection terminal.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 7, 2007
    Inventor: Nobuaki Hashimoto
  • Publication number: 20070126110
    Abstract: A circuit film having film bumps is provided for a film package. An IC chip is mechanically joined and electrically coupled to the circuit film through the film bumps instead of conventional chip bumps. In a fabrication method, a base film is partially etched by a laser to create an etched area that defines raised portion relatively raised from the etched area. Then a circuit pattern is selectively formed on the base film, partly running over the raised portions. The raised portion and the overlying circuit pattern constitute the film bumps having a height not greater than the height of the circuit film.
    Type: Application
    Filed: February 2, 2007
    Publication date: June 7, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-Hwan KWON, Sa-Yoon KANG, Chung-Sun LEE, Kyoung-Sei CHOI
  • Publication number: 20070126111
    Abstract: The present invention is for substrates for use in interposes for electronic packaging purposes. One preferred embodiment of the present invention is a substrate for use in a Spring Connector Matrix (SCM) interposer having an array of electrically insulated spring connectors each having a fixed end portion and a floating end portion resiliently flexibly coupled to its associated fixed end portion and capable of being independently displaceable in a plane substantially perpendicular to the SCM interposer's major surfaces. Another preferred embodiment of the present invention is a substrate intended to be folded along one or more predetermined fold lines or forming a 3D interposer. Folding is intended at wings which may be wholly formed of valve metal material or may include one or more electrically insulated valve metal traces electrically connected to one or more interconnect regions intended for ICs either single or double sided mounted thereon.
    Type: Application
    Filed: October 24, 2006
    Publication date: June 7, 2007
    Inventors: Uri Mirsky, Shimon Neftin, Lev Furer, Nina Sezin, Leonid Dukhovny
  • Publication number: 20070126112
    Abstract: A metal core and a package board having the metal core are disclosed. A package board, which comprises a metal core having a plurality of protrusions formed in a lengthwise direction on its surface, an insulation layer stacked on the metal core, and an inner layer circuit formed on the insulation layer for signal connection between a chip and the exterior, has a greater surface area due to the protrusions, so that it is superior in terms of heat releasing and of adhesion to the insulation layer, and has superior mechanical properties with respect to warpage.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 7, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung-Hyun Cho, Dae-Hyun Park, Young-Goo Kim
  • Publication number: 20070126113
    Abstract: It is concerned in conventional semiconductor devices that a presence of a heat sink promotes propagating noise through the semiconductor chip. A semiconductor device includes a substrate, interconnects (first interconnects), interconnects (second interconnect), a semiconductor chip and a heat sink (electroconductive member). The interconnect is the interconnect that is electrically coupled to an internal interconnect of the semiconductor chip. On the contrary, the interconnect is the interconnect that is electrically coupled to a back surface (first surface) of the semiconductor chip. The interconnects are electrically insulated from the interconnects in the substrate. The semiconductor chip is provided on the substrate. A predetermined fixed potential is presented at the back surface of such semiconductor chip through the interconnect.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 7, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Hiroaki Ohkubo, Yasutaka Nakashiba
  • Publication number: 20070126114
    Abstract: In one embodiment, a heat-dissipating member includes a heat-dissipating body, a heat-transferring body and an attaching member. The heat-dissipating body externally dissipates heat originating in a heat source. The heat-transferring member is interposable between the heat-dissipating body and the heat source. The attaching member is placed on a surface of the heat-dissipating body and corresponds to the heat-transferring body so as to couple the heat-transferring member to the heat-dissipating body. Thus, heat generated from the heat source, such as a semiconductor element, rapidly dissipates through the heat-transferring member and externally through the heat-dissipating body.
    Type: Application
    Filed: November 22, 2006
    Publication date: June 7, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee-Jin LEE, Sun-Won KANG, Hae-Hyung LEE
  • Publication number: 20070126115
    Abstract: A package substrate has a substrate body on which an electronic component is mounted. The substrate body is formed at its top or back surface with a diamond film, a diamond-like carbon film or a carbon film.
    Type: Application
    Filed: November 7, 2006
    Publication date: June 7, 2007
    Inventors: Manabu Yanagihara, Hiroaki Ueno, Yasuhiro Uemoto, Tsuyoshi Tanaka
  • Publication number: 20070126116
    Abstract: Heat sink structures employing carbon nanotube or nanowire arrays to reduce the thermal interface resistance between an integrated circuit chip and the heat sink, where the nanotubes are cut to essentially the same length over the surface of the structure, are disclosed. Carbon nanotube arrays are combined with a thermally conductive metal filler disposed between the nanotubes. This structure produces a thermal interface having high axial and lateral thermal conductivities.
    Type: Application
    Filed: September 18, 2006
    Publication date: June 7, 2007
    Inventors: Carlos Dangelo, Darin Olson
  • Publication number: 20070126117
    Abstract: A center of a substrate having peripheral circuit components mounted thereon is hollowed in a size maintaining a distance for establishing a connection with a semiconductor chip through a conductor such that the semiconductor chip is bonded to a heatsink and the peripheral circuit components are arranged near the semiconductor chip so as to surround the semiconductor chip. Upon adhesion of a conductive paste material, for bonding the substrate to the heatsink having the semiconductor chip mounted thereon in a conductive manner, to a bottom face of the substrate, an adhesive tape is stuck to an edge of the substrate so as to prevent outflow of the conductive paste material, respective terminals are connected through conductors, and both the substrate and the heatsink are sealed with a resin.
    Type: Application
    Filed: November 8, 2006
    Publication date: June 7, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Seiji Fujiwara
  • Publication number: 20070126118
    Abstract: A substrate may receive an integrated circuit and a flex circuit on the same side in the same vertical direction. In addition, in some embodiments, a flex circuit adapter and the integrated circuit may be surface mounted in one operation.
    Type: Application
    Filed: December 2, 2005
    Publication date: June 7, 2007
    Inventors: Daoqiang Lu, Henning Braunisch
  • Publication number: 20070126119
    Abstract: An object of the present invention is to provide a semiconductor production technology capable of preventing the peeling of the electrode which occurs in die bonding or wire bonding. There is provided a semiconductor element having an electrode in a surface or in a rear face of a semiconductor substrate, the semiconductor element having a structure in which an amorphous silicon layer 106 is inserted in between an electrode 107 and a semiconductor substrate 101, wherein hydrogen is not added to the amorphous silicon layer 106. Furthermore, an amorphous silicon layer 104 is inserted also in the interface between an electrode 105 and an insulating layer 103, and in the interface between the insulating layer and the semiconductor substrate.
    Type: Application
    Filed: June 19, 2006
    Publication date: June 7, 2007
    Inventors: Ryu Washino, Takeshi Kikawa, Yasushi Sakuma, Kaoru Okamoto
  • Publication number: 20070126120
    Abstract: Semiconductor devices and methods for fabricating the same. An exemplary device includes a substrate, a dielectric layer, a protection layer, and a conformal barrier layer. The dielectric layer overlies the substrate and comprises an opening. The opening comprises a lower portion and a wider upper portion, exposing parts of the substrate. The bottoms of the upper portion act as shoulders of the opening. The protection layer overlies at least one shoulder of the opening. The conformal barrier layer is disposed in the opening and overlies the protection layer and the dielectric layer, wherein etching resistance of the protection layer against inert-gas plasma is higher than that of the barrier layer.
    Type: Application
    Filed: December 6, 2005
    Publication date: June 7, 2007
    Inventors: Jung-Chih Tsao, Kei-Wei Chen, Yu-Ku Lin
  • Publication number: 20070126121
    Abstract: A via structure having improved reliability and performance and methods of forming the same are provided. The via structure includes a first-layer conductive line, a second-layer conductive line, and a via electrically coupled between the first-layer conductive line and the second-layer conductive line. The via has a substantially tapered profile and substantially extends into a recess in the first-layer conductive line.
    Type: Application
    Filed: December 5, 2005
    Publication date: June 7, 2007
    Inventors: Shau-Lin Shue, Cheng-Lin Huang, Ching-Hua Hsieh
  • Publication number: 20070126122
    Abstract: A semiconductor device with a wiring substrate as a stacking element for a semiconductor device stack is described herein. The wiring substrate includes a plastic frame of a first plastic compound and a central region of a second plastic compound. A semiconductor chip is embedded with its back side and its edge sides in the second plastic compound, the active upper side of the semiconductor device being in a coplanar area with the first and second plastic compounds.
    Type: Application
    Filed: November 6, 2006
    Publication date: June 7, 2007
    Inventors: Michael Bauer, Edward Fuergut, Simon Jerebic, Holger Woerner
  • Publication number: 20070126123
    Abstract: The present invention provides a wiring board including a first board provided with a first wiring pattern and a second board provided with a second wiring pattern while the first wiring pattern and the second wiring pattern are electrically connected, wherein the first board includes: a board insertion opening in which the second board is inserted; and a first connection pattern provided inside the board insertion opening and electrically connected to the first wiring pattern, and the second board includes: an inserting portion to be inserted into the board insertion opening of the first board; and a second connection pattern provided at a position opposed to the first connection pattern and electrically connected to the second wiring pattern in the case where the inserting portion of the second board is inserted into the board insertion opening of the first board, and further comprising: solder or brazing filler metal applied at least to a surface of one of the first connection pattern and second connection
    Type: Application
    Filed: December 1, 2006
    Publication date: June 7, 2007
    Applicant: FUJIFILM Corporation
    Inventor: Youichi Sawachi
  • Publication number: 20070126124
    Abstract: A circuit module is provided in which two secondary substrates or cards or the rigid portions of a rigid flex assembly are populated with integrated circuits (ICs). The secondary substrates are connected with flexible circuitry. One side of the flexible circuitry exhibits contacts adapted for connection to an edge connector. The flexible circuitry is wrapped about an edge of a preferably metallic substrate to dispose one of the two secondary substrates on a first side of the substrate and the other of the secondary substrates on the second side of the substrate.
    Type: Application
    Filed: January 29, 2007
    Publication date: June 7, 2007
    Applicant: Staktek Group L.P.
    Inventors: Russell Rapport, Paul Goodwin, James Cady
  • Publication number: 20070126125
    Abstract: A circuit module is provided in which two secondary substrates or cards or the rigid portions of a rigid flex assembly are populated with integrated circuits (ICs). The secondary substrates are connected with flexible circuitry. One side of the flexible circuitry exhibits contacts adapted for connection to an edge connector. The flexible circuitry is wrapped about an edge of a preferably metallic substrate to dispose one of the two secondary substrates on a first side of the substrate and the other of the secondary substrates on the second side of the substrate.
    Type: Application
    Filed: January 29, 2007
    Publication date: June 7, 2007
    Applicant: Staktek Group L.P.
    Inventors: Russell Rapport, Paul Goodwin, James Cady
  • Publication number: 20070126126
    Abstract: Disclosed is a solder bonding structure for flip chip connection. Particularly, this invention relates to a solder bonding structure, in which the shape of a connection pad on which solder is applied is changed to thus increase the size of the solder bond that is formed using a reflow process, resulting in highly reliable solder bonding. To this end, the solder bonding structure is composed of a connection pad (a bridge type pattern) composed of at least two pattern regions spaced apart from each other by a predetermined interval, a solder bond formed on the connection pad having such a shape, and a metal bump in contact with the solder bond. In such a solder bonding structure, the solder bond is formed to a sufficient size on a fine pattern having a smaller width, thus achieving reliable solder bonding between the semiconductor chip having the metal bump and the printed circuit board having the connection pad.
    Type: Application
    Filed: December 6, 2006
    Publication date: June 7, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Kim, Je Yoo, Yong Lee, Yoo Wee, Seok Huh, Chang Ryu
  • Publication number: 20070126127
    Abstract: A semiconductor device includes a semiconductor construction assembly having a semiconductor substrate which has first and second surfaces, and has an integrated circuit element formed on the first surface, a plurality of connection pads which are connected to the integrated circuit element, a protective layer which covers the semiconductor substrate and has openings for exposing the connection pads, and conductors which are connected to the connection pads, arranged on the protective layer, and have pads. An upper insulating layer covers the entire upper surface of the semiconductor construction assembly including the conductors except the pads. A sealing member covers at least one side surface of the semiconductor construction assembly.
    Type: Application
    Filed: February 5, 2007
    Publication date: June 7, 2007
    Applicant: Casio Computer Co., Ltd.
    Inventors: Hiroyasu Jobetto, Ichiro Mihara
  • Publication number: 20070126128
    Abstract: A semiconductor device includes a semiconductor construction assembly having a semiconductor substrate which has first and second surfaces, and has an integrated circuit element formed on the first surface, a plurality of connection pads which are connected to the integrated circuit element, a protective layer which covers the semiconductor substrate and has openings for exposing the connection pads, and conductors which are connected to the connection pads, arranged on the protective layer, and have pads. An upper insulating layer covers the entire upper surface of the semiconductor construction assembly including the conductors except the pads. A sealing member covers at least one side surface of the semiconductor construction assembly.
    Type: Application
    Filed: February 5, 2007
    Publication date: June 7, 2007
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Hiroyasu Jobetto, Ichiro Mihara
  • Publication number: 20070126129
    Abstract: Disclosed is a die bonding adhesive tape, which eliminates the requirement for additional adhesive tape for attaching a ring frame, decreases the curing time period upon die bonding, essentially prevents the transfer and diffusion of low-molecular-weight compounds between an adhesive film and an adhesive layer on a base substrate to thus exhibit excellent pick-up performance when picking up a die, and easily separates an adhesive film having a die from an adhesive layer on a base substrate when picking up slim and large dies. The die bonding adhesive tape of the invention includes a base substrate and an adhesive layer formed on the base substrate, has a structure in which a core film having a die bonding adhesive film attached thereto is bonded onto the adhesive layer, and enables direct die bonding via dicing and then die pick-up in a state of being mounted on a wafer.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 7, 2007
    Applicant: Ace Industries Co., Ltd.
    Inventors: Yong-Kook Ahn, Chang-Hoon Sim, Kyo-Sung Hwang
  • Publication number: 20070126130
    Abstract: A sensor module has a carrier substrate having a bottom side and a top side, a sensor chip arranged on the top side of the carrier substrate and having a pressure-sensitive active area, a signal-processing chip arranged on the top side of the carrier substrate next to the sensor chip and being connected to the sensor chip in an electrically conducting manner, a continuous casting material covering the top side of the carrier substrate and the signal-processing chip and being in mechanical contact with both, the casting material having a recess which is arranged such that the casting material does not cover at least a part of the active area of the sensor chip.
    Type: Application
    Filed: November 14, 2006
    Publication date: June 7, 2007
    Inventors: Alfons Dehe, Marc Fueldner
  • Publication number: 20070126131
    Abstract: A sensor system having a substrate and a housing and a method for manufacturing a sensor system are provided, the housing essentially completely enclosing the substrate in a first substrate region, the housing in a second substrate region being provided at least partially open via an opening, the second substrate region in the region of the opening being provided so as to project from the housing, the housing being manufactured using an injection molding compound and being molded in such a way that the injection molding compound has only one flow front.
    Type: Application
    Filed: November 16, 2006
    Publication date: June 7, 2007
    Inventors: Stefan Mueller, Frieder Haag, Thomas-Achim Boes
  • Publication number: 20070126132
    Abstract: A vena contracta, converging/diverging nozzle, or orifice plate that allows the saturation of oxygen in water to exceed 100 percent is disclosed. A flow of water is directed toward the outlet end of the vena contracta, converging/diverging nozzle, or orifice plate and a flow of air is directed into the inlet end thereof. The direction of the flow of water is opposite to the direction of the flow of air. The flow of air passes through an orifice in the vena contracta or converging/diverging nozzle, or through the orifice plate and creates a shock wave adjacent the outlet end thereof. The shock wave creates a mass transfer interface permitting the saturation of oxygen in the water to exceed 100 percent. The supersaturated water then exits past the vena contracta, converging/diverging nozzle, or orifice plate for discharge through a piping system into a pond, water reservoir or such containment area as is required by a particular application.
    Type: Application
    Filed: December 7, 2005
    Publication date: June 7, 2007
    Inventors: Mark Galgano, Greg Rondy
  • Publication number: 20070126133
    Abstract: A vena contracta, converging/diverging nozzle, or orifice plate that allows the saturation of oxygen in water to exceed 100 percent is disclosed. A flow of water is directed toward the outlet end of the vena contracta, converging/diverging nozzle, or orifice plate and a flow of air is directed into the inlet end thereof. The direction of the flow of water is opposite to the direction of the flow of air. The flow of air passes through an orifice in the vena contracta or converging/diverging nozzle, or through the orifice plate and creates a shock wave adjacent the outlet end thereof. The shock wave creates a mass transfer interface permitting the saturation of oxygen in the water to exceed 100 percent. The supersaturated water then exits past the vena contracta, converging/diverging nozzle, or orifice plate for discharge through a piping system into a pond, water reservoir or such containment area as is required by a particular application.
    Type: Application
    Filed: February 1, 2006
    Publication date: June 7, 2007
    Inventors: Mark Galgano, Greg Rondy
  • Publication number: 20070126134
    Abstract: The invention comprises multiple configurations of downcomers in a parallel flow multiple downcomer tray for vapor-liquid contacting processes such as the separation of chemical compounds via fractional distillation or the removal of a component of a gas stream with a treating liquid. In one embodiment, side downcomers are incorporated into a parallel flow multiple downcomer tray. In another embodiment, the downcomers have an inclined side wall that directs liquid onto the deck below the downcomer. The inclined side wall also provides additional volume above the inferior downcomer inlet to reduce pinching at this inlet without the need for a stilling deck.
    Type: Application
    Filed: October 17, 2006
    Publication date: June 7, 2007
    Inventors: Zhanping Xu, Daniel Monkelbaan, Brian Nowak, Robert Miller
  • Publication number: 20070126135
    Abstract: A flexible aeration panel is described, which does not include a rigid support plate. The flexible aeration panel can comprise a first perforated, flexible sheet sealed to a second non-perforated flexible sheet at their peripheral edges, thereby defining one or more cavities that are in fluid communication with at least one gas inlet. The flexible aeration panel can be configured to produce preferably evenly spaced bubbles of gas when positioned in a liquid body. Applications include, but are not limited to, aeration of wastewater, lakes, streams, water basins and the like.
    Type: Application
    Filed: October 26, 2006
    Publication date: June 7, 2007
    Inventors: Jose Abello, Ernesto Iznaga
  • Publication number: 20070126136
    Abstract: A heat insulating stamper is disclosed. The heat insulating stamper includes an uppermost section made of a metal material, a lowermost section made of the same material as the uppermost section, and a middle section having a heat conductivity lower than the uppermost section. The middle section includes the same metal material as the uppermost section and the lowermost section, and heat insulating portions.
    Type: Application
    Filed: October 19, 2005
    Publication date: June 7, 2007
    Inventors: Shigeru Fujita, Kazuhiro Kotaka, Nobuhiro Tanaka
  • Publication number: 20070126137
    Abstract: A method of making an integrated bipolar plate/diffuser fuel cell component comprising the steps of: (a) directing a stream of precursor material into a molding tool, wherein the stream of precursor material comprises a mixture of an electrically conductive fiber, a binder, and a carrier fluid; (b) molding the precursor material into a monolithic preform having a porous region having a porous surface, and at least one reactant channel; (c) curing or solidifying the binder to impart a desired level of rigidity to the preform; and (d) infiltrating a portion of the porous region with a matrix material to form a hermetic region of the preform to obtain the bipolar plate/diffuser fuel cell component, wherein the matrix material contains no chemical vapor infiltration carbon. This component can be mass-produced at a fast rate with a relatively low cost. The integrated component has a reduced contact resistance or ohmic loss when used in a fuel cell system.
    Type: Application
    Filed: December 5, 2005
    Publication date: June 7, 2007
    Inventors: Aruna Zhamu, Bor Jang
  • Publication number: 20070126138
    Abstract: A method of making a part includes introducing expandable material into a cavity of a mold containing a substrate, the mold including at least one projection extending into the cavity. The method further includes retracting the at least one projection to allow the expandable material to expand in the cavity, such that the expandable material forms an expanded material layer on the substrate.
    Type: Application
    Filed: December 7, 2005
    Publication date: June 7, 2007
    Applicant: Lear Corporation
    Inventors: David Dooley, Todd Depue, Glenn Cowelchuk
  • Publication number: 20070126139
    Abstract: An in-mold foam molding equipment, includes at least a movable partition member for dividing a molding space formed by a pair of molds into divided spaces, wherein the partition member is composed of a plurality of divisional partition members, wherein each of the divisional partition members individually has a retreat positioning protrusion and a insert positioning protrusion, and the divisional partition members are installed in a slider, wherein the slider is configured to move between the retreat positioning protrusions and the insert positioning protrusions, and the divisional partition members are configured to be movable in cooperation with the motion of the slider moving by contacting with the retreat positioning protrusions or the insert positioning protrusions, so that the divisional partition members divide the molding space into divided spaces, and therefore an integral molded article suppressed in occurrence of large protrusions and deep holes can be manufactured.
    Type: Application
    Filed: February 5, 2007
    Publication date: June 7, 2007
    Applicant: JSP CORPORATION
    Inventors: Seishiro Murata, Satoru Shioya, Masayuki Fukuda
  • Publication number: 20070126140
    Abstract: A method of producing a reinforced plastic profile (10) with a uniform profile cross section, in which the transverse reinforcement (12) is formed by a linked, knitted, sewn or woven tube. Such a tube can be seamlessly formed continuously during the production of the plastic profile (10), which is preferably performed by pultrusion.
    Type: Application
    Filed: November 17, 2006
    Publication date: June 7, 2007
    Inventors: Klaus Jansen, Christian Gensewich
  • Publication number: 20070126141
    Abstract: A method of making an embossed air-laid absorbent sheet material includes depositing a dry web of fibers on a foraminous support; compacting the fiber web; embossing the compacted fiber web with an embossing roll provided with a plurality of sinuate bosses radially projecting circumferentially around the embossing roll to provide the fiber web with a functional emboss pattern including a plurality of continuous sinuate compressed regions extending in a machine direction of the fiber web, and bonding the fiber web to produce the embossed air-laid absorbent sheet material. The emboss pattern is operative to preferentially convey sorbed liquid along the plurality of continuous sinuate compressed regions of the fiber web.
    Type: Application
    Filed: January 31, 2007
    Publication date: June 7, 2007
    Applicant: GEORGIA-PACIFIC CONSUMER PRODUCTS LP
    Inventors: Bradley Schmidt, Jennifer Wergin, Barbara Buman, Michael Bouchette
  • Publication number: 20070126142
    Abstract: A system and method are disclosed for producing a continuous filament reinforced thermoplastic profile having consistent cross section. A continuous reinforcing filament is pre-wetted with a first thermoplastic resin and introduced into a die, where it is contacted with a second thermoplastic resin extruded from an extruder at melt state. The temperature of the die is carefully controlled so that the pre-wetted filament and first resin do not cure or solidify until after they have contacted and mixed with the second thermoplastic resin. The mixture temperature is then controlled to make a substantially solidified profile pre-shape. A capping layer comprising a third thermoplastic resin is then co-extruded onto the outer surface of the pre-shape. A multistage die for bringing together the filament and thermoplastic resins and for maintaining appropriate temperatures at each stage of the profile-forming process is also disclosed.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 7, 2007
    Inventors: Xixian Zhou, Gregory Jacobs, Eric Waters