Patents Issued in July 24, 2007
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Patent number: 7248022Abstract: In accordance with various embodiments, there is a method for determining the available energy of a battery. Various embodiments include the steps of applying an increasing current to the battery and measuring a response voltage of the battery when the increasing current is applied to the battery.Type: GrantFiled: June 4, 2004Date of Patent: July 24, 2007Assignee: Honeywell International, Inc.Inventors: Thirumalai G. Palanisamy, Harmohan N. Singh, Hector M. Atehortua, Steven Hoenig
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Patent number: 7248023Abstract: A charger for a secondary battery including a positive electrode, a negative electrode including lithium-containing silicon represented by the composition formula LixSi, and an electrolyte. This charger includes: (1) a voltage detector that detects voltage of the secondary battery that is being charged; and (2) a charge controller that calculates the value x in LixSi included in the secondary battery from an output of the voltage detector and stops the charging of the secondary battery when the calculated value x reaches a predetermined threshold value. The charge controller has at least one settable threshold value including a first threshold value, and the first threshold value is 2.33 or less. The use of this charger makes it possible to charge the secondary battery such that it has a high capacity, or a higher capacity if necessary, without accelerating the deterioration of cycle life.Type: GrantFiled: April 19, 2005Date of Patent: July 24, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideharu Takezawa, Masaaki Kuranuki, Yasuhiko Bito
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Patent number: 7248024Abstract: A sliding-mode switching power supply (24) having N phases (28) and a method of operating the power supply (24) are provided. N switches (30) are coupled to a bipolar power source (22), with each switch (30) effecting one phase (28). An inductance (32) is coupled to each switch (30), and a capacitance (36) is coupled to the inductances (32). A load (26) is coupled across the capacitance (36). A monitor circuit (38) is coupled to the inductances (32) and the capacitance (36) and configured to monitor an output voltage (VOut) of the power supply (24). A first state-variable generator (42) generates a first state variable (first state variable x1) in response to the output voltage (VOut), and a second sate variable generator (44) synthesizes a second state variable (second state variable x2) from the first state variable (x1).Type: GrantFiled: October 7, 2004Date of Patent: July 24, 2007Assignee: Intersil Americas Inc.Inventor: Zaki Moussaoui
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Patent number: 7248025Abstract: In a voltage regulator, a reference voltage generating circuit generates a reference voltage. A drive transistor is connected between a first power supply terminal and an output terminal and has a control terminal. A voltage divider generates a feedback voltage which is an intermediate voltage between voltages at the output terminal and a first power supply terminal. A differential amplifier generates an error voltage in accordance with the feedback voltage of the voltage divider and the reference voltage, and transmits it to the control terminal of the drive transistor. An oscillation preventing capacitor is connected between the control of the drive transistor and the output terminal. A capacitor is connected between the first power supply terminal and the first input of the differential amplifier.Type: GrantFiled: April 29, 2005Date of Patent: July 24, 2007Assignee: NEC Electronics CorporationInventor: Masahiro Adachi
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Patent number: 7248026Abstract: A voltage regulator includes a voltage divider connected between a soft-start pin and the voltage regulator's error amplifier. The voltage divider has the same divider ratio as that of the voltage regulator's feedback voltage divider, which is used to divide the regulated output voltage fed back to the error amplifier. To facilitate soft-start operations, an external, user-supplied capacitor is connected to the soft-start pin. To facilitate voltage tracking operations, a predetermined master supply voltage is applied to the soft-start pin.Type: GrantFiled: November 28, 2005Date of Patent: July 24, 2007Assignee: Micrel, IncorporatedInventor: David Wayne Ritter
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Patent number: 7248027Abstract: In a power converter, an input power source (98) is intermittently coupled to provide a current flow (Icoil) in consecutive cycles (T) to generate an output voltage (Vo). The coupling durations (Tp) are adjusted in conjunction with a cycle skip count (112CNT) which is the count of cycles in which no coupling occurs. In some embodiments, the adjustments are performed to keep the coupling durations near the maximum efficiency range (between TLOW and THIGH), and the skip count is adjusted at the same time to obtain the desired output voltage in the presence of load current variations. The coupling frequencies are kept in a desired range to avoid interference with other circuit elements.Type: GrantFiled: January 5, 2005Date of Patent: July 24, 2007Assignee: FyresStorm, Inc.Inventors: Milton D. Ribeiro, Kent Kernahan
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Patent number: 7248028Abstract: A low-power charge pump regulator is provided. The low-power charge pump regulator may periodically turn off charge pumping portions of the charge pump circuitry to reduce power consumption. The charge pumping portions of the charge pump circuitry may then be turned on when they are needed to maintain the output of the charge pump regulator. In some embodiments, where the leakage off the voltage regulator output is small, the charge pumping portions of the charge pump circuitry may only need to be turned on for brief periods of time.Type: GrantFiled: July 27, 2005Date of Patent: July 24, 2007Assignee: Marvell International Ltd.Inventor: Thart Fah Voo
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Patent number: 7248029Abstract: A DC to DC converter comprising an energy storage element comprising an energy storage element input and an energy storage element output, the energy storage element input coupled to receive a first power level and the energy storage element output providing a second power level. The converter also comprises a feedback circuit comprising a feedback input and a feedback output, the feedback input coupled to the energy storage element output. The converter further comprises a regulator circuit comprising a regulator circuit feedback input and a regulator circuit output, the regulator circuit feedback input coupled to the feedback output and the regulator circuit output coupled to the energy storage element input, the regulator circuit regulating the input of the first power level to the energy storage element input.Type: GrantFiled: March 24, 2006Date of Patent: July 24, 2007Assignee: Power Integrations, Inc.Inventors: Balu Balakrishnan, Alex B. Djenguerian, Leif O. Lund
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Patent number: 7248030Abstract: A step-up/step-down DC-DC converter for reducing loss caused by activation and inactivation of transistors. An error amplifier included in a control circuit generates an error signal in accordance with voltage difference between an output voltage and a reference voltage. A PWM comparator compares a triangular wave signal and the error signal to generate a control pulse signal having a pulse width that is in accordance with the voltage difference between the output voltage and the reference voltage. A pulse detector monitors the control pulse signal and generates a mode switch signal for switching the operation mode of the DC-DC converter in accordance with a monitoring state of the control pulse signal. A switch provides the PWM comparator with the triangular wave signal or an offset signal, which is generated by adding an offset voltage to the triangular wave signal, in response to the mode switch signal.Type: GrantFiled: August 4, 2005Date of Patent: July 24, 2007Assignee: Fujitsu LimitedInventor: Takahiro Yoshino
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Patent number: 7248031Abstract: As for a transistor, overlapped are factors such as a variation of a gate insulation film which occurs due to a difference of a manufacturing process and a substrate used and a variation of a crystalline state in a channel forming region and thereby, there occurs a variation of a threshold voltage and mobility of a transistor. This invention provides an electric circuit which used a rectification type device in which an electric current is generated only in a single direction, when an electric potential difference was applied to electrodes at both ends of the device. Then, the invention provides an electric circuit which utilized a fact that, when a signal voltage is inputted to one terminal of the rectification type device, an electric potential of the other terminal becomes an electric potential offset only by the threshold voltage of the rectification type device.Type: GrantFiled: December 8, 2004Date of Patent: July 24, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hajime Kimura, Yasuko Watanabe
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Patent number: 7248032Abstract: A low capacitance measurement probe having an outer conductor forming an outer wall; a non-conductive spacer forming a first wall between a conductive layer and the outer conductor; the conductive layer forming a second wall coupled to the interior of the first wall; an insulating layer forming a third wall coupled to the interior of the second wall; and an inner conductor forming an inner wall coupled to the interior of the third wall. The probe may include a knob or a button in the inner conductor at a tip of the probe to increase the surface area of the inner conductor in order to the sensitivity of the probe.Type: GrantFiled: July 19, 2006Date of Patent: July 24, 2007Assignee: BioLuminate, Inc.Inventors: Richard Hular, Liuz B. Da Silva, Charles L. Chase, Bruce W. Haughey
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Patent number: 7248033Abstract: A Vector Network Analyzer is equipped with receivers for measuring a1, b1, a2 and b2 and which can each be tuned to track either the RF signal (F1) applied to the FTD or to the IF (F2) produced by the FTD. Additional forward side and reverse side mixers are provided and are driven by the auxiliary LO for the FTD. The additional mixers can be located in the RF/IF path, such that there is a sequential double conversion of the RF/IF: one by the auxiliary LO followed by another conversion of those results by the main LO. The additional mixers could also be located it the LO path, such that the main LO is first converted to an image involving the auxiliary LO, and the RF/IF is then subsequently converted using that image as an ‘artificial’ LO. During a forward direction measurement of an FTD, the applied RF signal (F1) is converted to the IF with the additional forward side mixers that feeds the receivers for a1 and b1.Type: GrantFiled: October 18, 2004Date of Patent: July 24, 2007Assignee: Agilent Technologies, Inc.Inventors: Keith F. Anderson, Richard R. Hawkins, James C. Lui, Kenneth H. Wong
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Patent number: 7248034Abstract: A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.Type: GrantFiled: June 29, 2006Date of Patent: July 24, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Watanabe, Kazuya Matsuzawa, Riichiro Shirota
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Patent number: 7248035Abstract: A passive matching network is connected to an input/output line for an automatic test equipment drive channel to compensate for capacitances associated with a receiver circuit connected to the line, and also an optional current-mode driver circuit. The matching circuit preferably comprises a T-coil circuit that can include a bridging capacitor; separate T-coil circuits can be provided to separately compensate for receiver circuit and current-mode driver circuit capacitances. The driver and receiver circuits can be implemented on a common layer of an integrated circuit, with the T-coil windings implemented in a separate layer of the same integrated circuit that is spaced from the common layer by at least one dielectric layer.Type: GrantFiled: November 25, 2003Date of Patent: July 24, 2007Assignee: Analog Devices, Inc.Inventors: Douglas W. Babcock, Robert A. Duris, Bruce Hecht
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Patent number: 7248036Abstract: An assembly including a processor socket having a cut region. The assemble further including a probe board having a repeater positioned in alignment with the cut region. The repeater is to receive at least a first signal. The repeater is to tap the first signal. The tapped first signal is to be transmitted to a first device. The repeater is also to reinject the first signal, and the reinjected first signal to be transmitted to a processor.Type: GrantFiled: May 27, 2004Date of Patent: July 24, 2007Assignee: Intel CorporationInventors: Mark B. Trobough, Richard Glass
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Patent number: 7248037Abstract: A position detector includes a pair of magnetic sensors spaced from each other and a magnetic force generator movable relative to the pair of magnetic sensors. The length of the magnetic force generator along the space between the magnetic sensors is equal to or larger than a length of a space between the magnetic sensors. Preferably, the length of the magnetic force generator along the space between the magnetic sensors is equal to or larger than a sum of the length of the space between the magnetic sensors and an allowable moving distance of the magnetic force generator.Type: GrantFiled: November 15, 2004Date of Patent: July 24, 2007Assignee: Konica Minolta Photo Imaging, Inc.Inventors: Yoshihiro Hara, Akira Kosaka, Satoshi Masuda
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Patent number: 7248038Abstract: The invention relates to a device for detecting movements and/or positions of an object with the aid of voltage pulses induced by the field of adjacent magnets (6, 7) in a coil (4). In order to generate a sufficiently strong signal also at small relative speeds between the magnets (6, 7) and the coil (4), the coil (4) encloses a spring (5) in which a quick fore-and-aft movement can be induced by the magnetic fields of the magnets (6, 7), the magnetic poles of the spring (5) being reversed during said fore-and-aft movement.Type: GrantFiled: November 24, 2004Date of Patent: July 24, 2007Assignee: Hubner Electromaschinen GmbHInventor: Lothar Wilhelmy
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Patent number: 7248039Abstract: A method for testing electromagnetic characteristics of magnetic media while maintaining consistent performance of a read/write head and recording channel is disclosed. The disclosed method is performed such that reduced statistical sampling is achieved. The method includes recording a first set of baseline measurements utilizing a first magnetic media with the read/write head and recording channel. The first magnetic media is then removed from an assembly containing the read/write head and recording channel and is replaced with a second magnetic media. Measurements are made utilizing the second magnetic media with the read/write head and recording channel, wherein the measurements are comparable with the baseline measurements and wherein consistent performance of the read/write head and the recording channel is maintained so as to reduce the size of statistical samples needed.Type: GrantFiled: August 27, 2004Date of Patent: July 24, 2007Assignee: Hitachi Global Storage Technologies Netherlands, B.V.Inventors: Paul M. Green, Peter Ivett, Wyman Pang
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Patent number: 7248040Abstract: A disk testing apparatus that sets a predetermined condition of a recording density for a disk apparatus, and conducts a test relating to at least readout of data stored in the disk apparatus includes a condition relaxing unit that relaxes, when a result of the test is unsatisfactory, a condition of the recording density currently set for the disk apparatus to set a new condition of the recording density; and a re-testing unit that re-conducts the test on the disk apparatus to which the new condition is set.Type: GrantFiled: December 27, 2004Date of Patent: July 24, 2007Assignee: Fujitsu LimitedInventors: Masaki Makifuchi, Shigenori Yanagi
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Patent number: 7248041Abstract: A device for evaluating magnetic component performance and methods of evaluating transient magnetic performance of such components are disclosed. Magnetic flux capacity and/or energy loss of a magnetic component is/are measured, and the measurement data is electronically processed to evaluate the magnetic performance of the component.Type: GrantFiled: July 28, 2003Date of Patent: July 24, 2007Assignee: Cummins, Inc.Inventors: Edward B. Manring, David M. Rix, Donald J. Benson
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Patent number: 7248042Abstract: With a method for the contactless determination of a thickness of a layer (20) made of electrically-conductive material of a component (17), a sensor composed of a coil form (13) and a coil (14) is positioned in the vicinity of the component (17) to be measured. The method is based on a combination of the principles of induction and eddy current. The thickness of the layer (20) is determined using a plurality of measuring and evaluation steps in which the coil (14) is acted upon with a first alternating current frequency f1 and a second alternating current frequency f2, and its change in inductance is evaluated. The distance between the coil form (13) and, therefore, the coil (14), and the component (17) is derived from the inductance value of the coil (14) acted upon with the second alternating current frequency f2.Type: GrantFiled: June 23, 2005Date of Patent: July 24, 2007Assignee: Robert Bosch GmbHInventors: Hansjoerg Hachtel, Stefan Meyer
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Patent number: 7248044Abstract: In a SQUID magnetometer, high resolution, a high slew rate, and a high dynamic range are achieved without using expensive circuit components having a large number of processing bits and enabling a high speed processing operation. A digital FLL circuit using a double counter system is provided. This circuit utilizes two or more counters, for example, a change range counter in a digital FLL for carrying out a processing operation at a high speed and a reproducing counter in a control/measuring computer. In addition, in the present invention, hysteresis characteristics having a 1?0 positive margin is used. That is, a change of a state of a magnetic flux is counted by means of a counter. At the time of this change, control is made so as to track a different channel between cases in which a magnetic flux increases and decreases, thereby stabilizing the control.Type: GrantFiled: December 1, 2006Date of Patent: July 24, 2007Assignee: Japan Science and Technology AgencyInventors: Koichiro Kobayashi, Daisuke Oyama, Masahito Yoshizawa, Kenji Nakai, Takayuki Simizu, Tomoaki Ueda
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Patent number: 7248045Abstract: The present invention provides a magnetic sensing device capable of stably sensing a signal magnetic field with high sensitivity by suppressing occurrence of a hysteresis to reduce 1/f noise. A magnetic sensing device has a stacked body including a pinned layer having a magnetization direction pinned to a predetermined direction (Y direction), a free layer having a magnetization direction which changes according to an external magnetic field and, when the external magnetic field is zero, becomes parallel to the magnetization direction of the pinned layer, and an intermediate layer sandwiched between the pinned layer and the free layer. Consequently, as compared with the case where the pinned layer and the free layer have magnetization directions which are orthogonal to each other when the external magnetic field is zero, variations in the spin directions of magnetic domains in the free layer can be reduced.Type: GrantFiled: January 26, 2005Date of Patent: July 24, 2007Assignee: TDK CorporationInventor: Shigeru Shoji
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Patent number: 7248046Abstract: The decoupling of an array of two or more closely spaced high temperature superconductor sensors can be accomplished by introducing a capacitive decoupling circuit.Type: GrantFiled: April 15, 2005Date of Patent: July 24, 2007Assignee: E. I. du Pont de Nemours and CompanyInventors: Robby L. Alvarez, Charles Wilker
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Patent number: 7248047Abstract: A trailer for housing a mobile MRI system has magnetic shielding in the form of a plurality of sheets of magnetic material which are supported within the trailer, by a rigid supporting structure or frame. The layers are arranged in a stacked or laminar configuration with the laterally longest layer disposed inward of the remaining layers, such that the width of the gap between that layer and the exterior walls of the trailer at the lateral extremities of the shielding is greater than its width in a central area. The rigid frame maintains the gap and prevents contacting of the shielding and the trailer walls.Type: GrantFiled: August 19, 2005Date of Patent: July 24, 2007Assignees: Siemens Magnet Technology Ltd., Siemens Medical Solutions USA, IncInventors: Michael John Disney Mallett, Michael Pietsch, Michael Alan Senseney, Joshua Andrew Simmers, Stephen Paul Trowell, Neil Charles Tigwell, Jeremy Francis Williams, Seth Michael DeMarrais
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Patent number: 7248048Abstract: An apparatus for magnetic resonance imaging includes a first magnet for generating a first magnetic field and a second magnet for generating a second magnetic field, dissimilar to the first magnetic field, the second magnet being spaced apart from the first magnet. The apparatus is arranged such that the first and second magnets cooperate to generate a substantially homogeneous magnetic field defining a working region wherein the first and second magnetic fields are arranged asymmetrically with respect to the working region, and wherein at least part of the working region is positioned within the first magnet or between the first and second magnets.Type: GrantFiled: April 30, 2004Date of Patent: July 24, 2007Assignee: Oxford Instruments PLCInventors: Ian Leitch McDougall, Peter Hanley
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Patent number: 7248049Abstract: A probe head for NMR measurements as well as a method of operating this probe head is disclosed. The probe head includes a support body that carries a solenoid coil as measuring coil, as well as a feed line towards the solenoid coil, via which a sample material can be introduced into a measuring volume surrounded by the solenoid coil. The feed line is configured for receiving and conveying sample containers in the probe head. The probe head allows for an automated measurement of different samples, specifically of solid samples.Type: GrantFiled: July 1, 2003Date of Patent: July 24, 2007Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.Inventors: Frank Volke, Martin Benecke
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Patent number: 7248050Abstract: The invention concerns an NMR apparatus (1) comprising an NMR spectrometer (2) for sequential investigation of several samples in sample containers (6) of substantially identical geometrical design, at a measuring position (10) in the NMR spectrometer (2) comprising a supply line (8) for pneumatic supply of the sample containers (6) from a magazine (3) to the measuring position (10). The apparatus is characterized in that the magazine (3) is disposed within a temperature-controlled cabinet, in particular, a cold chamber (4) and the supply line (8) can be heated. This substantially increases the throughput of samples of the NMR apparatus (1) with simple technical means.Type: GrantFiled: June 6, 2005Date of Patent: July 24, 2007Assignee: Bruker Biospin GmbHInventors: Martin Hofmann, Manfred Spraul
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Patent number: 7248051Abstract: A receiver coil array for a magnetic resonance imaging system has multiple receiver coil loops that are decoupled from each the by a decoupling circuit that connects a pair of decoupling capacitors between any two of the receiver coil loops. One capacitor of each pair of decoupling capacitors has both ends grounded respectively through diodes of detuning circuits in the different receiver coil loops, and the other capacitor of each pair of decoupling capacitors has both ends grounded respectively through the tuning capacitors of different receiver coil loops. Alternatively the two decoupling capacitors in each pair have one end grounded through the diodes of respective detuning circuit, and the other end grounded through tuning capacitors of another said receiver coil loop.Type: GrantFiled: July 1, 2005Date of Patent: July 24, 2007Assignee: Siemens AktiengesellschaftInventors: Jian Min Wang, Bei Zhang
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Patent number: 7248052Abstract: A geophysical prospecting method and apparatus that utilizes the harmonics and sub harmonics waves induced into the earth by the electric power grid. The amplitude-frequency data are converted to amplitude-depth data and further converted to a differential curve. The resulting differential curve is compared to known patterns of the interested geological features, such as hydrocarbon reservoir, to identify whether the features exist and at what depth such geological features lie.Type: GrantFiled: May 28, 2003Date of Patent: July 24, 2007Inventors: W. Barry Weaver, Roy K. Warren
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Patent number: 7248053Abstract: A method and apparatus for detecting a change in an electrical property between contacts. A one-time operating state detection device includes a member coupling a pair of contacts and a detector for detecting a change in the coupling between the pair of contacts when the member is removed.Type: GrantFiled: July 15, 2005Date of Patent: July 24, 2007Assignee: Powerprecise Solutions, Inc.Inventor: John Houldsworth
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Patent number: 7248054Abstract: A sensor for sensing an electric field includes a movable sensor probe including one or more pair, typically three pair, of electrically conductive electrodes, and may include one or more pair of selectively switchable auxiliary electrodes. The probe is movable and may be mounted on a vehicle or trailer. A processor may process electric field signals from the probe for providing a human perceivable indication of the electric field. The processor may perform a Fast Fourier Transform of the electric field signals to produce an indication of the magnitude of the electric field, and may perform unweighted and/or weighted averaging in relation to processing electric field data, setting a comparison threshold, providing a human perceivable indication, or a combination of the foregoing. A speed at which the sensor probe is moving may be utilized in processing the data.Type: GrantFiled: September 13, 2005Date of Patent: July 24, 2007Assignee: Power Survey CompanyInventors: David Kalokitis, Peter Zalud, David Christopher Berends, Christos Alkiviadis Polyzois, Frederick John Vannozzi, Frank Bowen Lang
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Patent number: 7248055Abstract: An electrostatic discharge testing system includes a measurement chamber to hold a discharge electrode and a target electrode in separation from each other, a first conductive path to supply an ESD pulse to the discharge electrode, and a second conductive path to receive a discharge pulse from the target electrode. A transmission line, field-coupled to the second conductive path, generates a measurement signal in response to the discharge pulse.Type: GrantFiled: December 20, 2005Date of Patent: July 24, 2007Assignee: Dell Products L.P.Inventors: Vsevolod Ivanov, Steve L. Williams
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Patent number: 7248056Abstract: A three phase receptacle tester including a housing, an electrical connection and a coupling assembly. The housing includes an outer surface, an opening and an inner cavity, wherein the opening provides access to the inner cavity. The electrical connection assembly having a body, condition indicators and a coupling assembly. The body having an outward surface, an inward surface and a periphery. The periphery of the body matingly engaging the opening of the housing, so as to preclude access to the inner cavity. One prong extends from the outward surface of the body for each phase and one prong extends from the outward surface of the body corresponding to a ground/common. Each of the prongs spaced radially outward from a central axis. Each of the phase prongs electrically connected with the ground/common prong and the condition indicator positioned therebetween. The condition indicator identifies at least one of current flow between a respective phase prong and the ground/common prong.Type: GrantFiled: February 2, 2005Date of Patent: July 24, 2007Inventor: Joseph Waldschmidt
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Patent number: 7248057Abstract: Method, apparatus and computer-readable code are provided for detecting a location of an incipient ground fault in an electrical propulsion system of a relatively large land-based vehicle, such as a locomotive. The detection is performed essentially in real time and without interrupting operation of the electrical devices that make up the propulsion system (e.g., performed “on the fly”), and consequently there is virtually no degradation in the operational performance of the propulsion system.Type: GrantFiled: March 21, 2006Date of Patent: July 24, 2007Assignee: General Electric CompanyInventor: Ajith Kuttannair Kumar
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Patent number: 7248058Abstract: A testing device for determines values of various electrical variables associated with a device within a process system. The testing device provides bi-directional electrical communication with a device to be monitored and automatically provides a connection configuration between a processing unit and a set of input/output ports. The connection configuration governs a bi-directional flow of electrical signals between the processing unit and the device to be monitored. The processing unit outputs a test signal and a configuration control signal to the input/output port control circuitry. The input/output port control circuitry, in response to received test and configuration control signals, automatically provides a connection configuration to direct the test signal to the device to be monitored and to direct a return signal, the return signal being generated by the monitored device in response to the test signal, to the processing unit.Type: GrantFiled: October 18, 2004Date of Patent: July 24, 2007Inventors: Ronald P. Clarridge, Gerald T. Allen, Jr.
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Patent number: 7248059Abstract: Embodiments of the present disclosure relate to methods, sensors, and systems for low power sensing. One method for low power sensing includes receiving a detection signal from a detector of a sensor to a delay flip flop (DFF). The method includes switching a DFF output state in response to a switching of the detection signal, when the DFF is reset, transmitting an event report signal from the DFF to a processor of the sensor when the DFF output state switches, and maintaining the DFF output in a steady state, when the DFF is not reset.Type: GrantFiled: February 24, 2006Date of Patent: July 24, 2007Assignee: Red Wing Technologies, Inc.Inventor: Jomar G. Ochoco
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Patent number: 7248060Abstract: A test apparatus to evaluate the electrical properties of a liquid toner in which a printing quality of the liquid toner may be predicted by evaluating the electrical properties of the liquid toner without performing printing. The test apparatus to evaluate the electrical properties of a liquid toner includes a roller, a conductive flat panel positioned below the roller to move a predetermined distance in contact with the roller, a power supply device applying a voltage to the roller and the conductive flat panel, and a voltage tester provided at the rear of the roller to move together with the roller, testing a voltage of the liquid toner arranged on the conductive flat panel.Type: GrantFiled: September 1, 2005Date of Patent: July 24, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-wook Kim, Ki-won Seok, Kyung-yol Yon, Deuck-woo Jang, Hae-ree Joo, Min-young Cheong
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Patent number: 7248061Abstract: A transmission device includes a transmission line composed of first and second transmission lines. A first circuit block outputs a non-inverted transmission signal to the first transmission line, and a second output circuit outputs an inverted transmission signal to the second transmission line. The second circuit block comprises an impedance element and a comparison circuit for comparing voltages. The same types of impedance elements as the impedance element are interposed in the first and second transmission lines between the first circuit block and the second circuit block.Type: GrantFiled: September 8, 2005Date of Patent: July 24, 2007Assignee: DENSO CORPORATIONInventors: Kiyoshi Yamamoto, Akitaka Murata, Tadashi Suzuki
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Patent number: 7248062Abstract: Systems and methods for determining a property of a specimen are provided. The specimen may be a product wafer. The method may include biasing a focused spot on the specimen. The method may also include measuring a parameter of a measurement spot on the specimen. The measurement spot may overlap the focused spot. In addition, the method may include determining the property of the specimen from the measured parameter. Systems and methods for varying the performance of a corona source are also provided. The method may include altering a property of the environment within the corona source. The property may include, but is not limited to, temperature, pressure, humidity, and/or partial pressure of a gas within the corona source.Type: GrantFiled: November 4, 2003Date of Patent: July 24, 2007Assignee: KLA-Tencor Technologies Corp.Inventors: Amin Samsavar, John M. Schmidt, Rainer Schierle, Gregory S. Horner, Thomas G. Miller, Zhiwei Xu, Xiaofeng Hu, Jianou Shi, Sergio Edelstein
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Patent number: 7248063Abstract: A plasma probe system includes a plasma probe, at least one meter, and a diagnostic apparatus. The probe may include a substrate having substantially the same properties as those of a substrate to be processed, a bottom electrode layer located over the substrate and electrically isolated therefrom, a dielectric layer positioned over the bottom electrode layer including apertures through which one or more electrodes of the bottom electrode layer are exposed, and at least one upper electrode layer that is electrically isolated from the bottom electrode layer by way of the dielectric layer. Electrodes of the bottom and upper electrode layers communicate with meters which may provide real-time data representative of one or more properties of a region of a plasma to which the electrodes are exposed.Type: GrantFiled: July 27, 2005Date of Patent: July 24, 2007Assignee: Micron Technology, Inc.Inventor: Guy T. Blalock
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Patent number: 7248064Abstract: A probe card is used in conducting a visual test for a target test object through simultaneous contact of the probe card with each and every electrode pad of the target test object. The probe card includes a plurality of probes composed of conductive wire strands and having elastically deformable contact parts so curved as to make contact with electrode pads of a target test object. The contact parts are oriented in one and the same direction and extend in a parallel relationship with one another. The probe card further includes a first insulating block for fixedly securing one end parts of the probes, a second insulating block for fixedly securing the other end parts of the probes and a mounting plate for holding the first and second insulating blocks in such a manner that the contact parts of the probes protrude outwardly.Type: GrantFiled: November 28, 2005Date of Patent: July 24, 2007Assignee: Korea Advanced Institute of Science and TechnologyInventors: Dai-Gil Lee, Seong-Su Kim, Byung-Chul Kim, Dong-Chang Park
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Patent number: 7248065Abstract: An arcuate blade probe is disclosed. The arcuate blade probe includes a shaft with a pair of faces that converge towards each other along a probe axis and terminate at a single edge that includes an arcuate profile. The arcuate profile provides a surface that makes an electrical connection between the edge and a node to be probed. The connection can be made along at least one portion of the edge. The edge can be used to probe lead-based and lead-free solder on the pads of vias and test pads. The arcuate profile give the edge a gradual arc that does not come to a sharp point so that the edge can probe vias with plugged holes.Type: GrantFiled: September 6, 2005Date of Patent: July 24, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventor: Alexander Leon
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Patent number: 7248066Abstract: An apparatus for enabling the on-chip analysis of the voltage and/or current transition behaviour of one or more embedded nets of an integrated circuit independently of the fabrication process. The said apparatus comprises a Reference Step Generator (RSG) for providing programmable reference voltages or currents, a Step Delay Generator (SDG) for providing programmable delays, a Comparator (C) that receives the output of the reference step generator on one input, the output from the node under test at the second input, and a latch enable signal from the step delay generator, and provides a latched digital output in response to the comparison, and a controller that co-ordinates the operation of the reference step generator, Step Delay Generator and Latching Comparator to provide a transient response measurement.Type: GrantFiled: December 29, 2004Date of Patent: July 24, 2007Assignee: STMicroelectronics PVT. Ltd.Inventors: Ruchir Saraswat, Balwant Singh, Prashant Dubey
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Patent number: 7248067Abstract: A semiconductor device with a test circuit disconnected from a power supply connection to reduce leakage current, and a method of manufacture thereof. The test circuit may be used to test functional circuits on the semiconductor device, and after the tests are completed, the test circuit is disconnected from the power supply connection. The test circuit is powered by contacting a test pad with a probe that supplies power to the test circuit, in one embodiment. In another embodiment, the test circuit is disconnected from the power supply using a laser to blow a fuse in the path of the power supply connection for the test circuit. Optional features include a bleeder device coupled to the power supply input of the test circuit, and logic circuitry for setting the outputs of the test circuit to a predetermined state coupled to the outputs of the test circuit.Type: GrantFiled: September 21, 2004Date of Patent: July 24, 2007Assignee: Infineon Technologies AGInventor: Peter Poechmueller
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Patent number: 7248068Abstract: A method for testing a semiconductor device incorporating a controller, which generates first and second complementary signals, and a memory, which operates in accordance with the first and second complementary signals. The method includes selectively switching the first and second complementary signals to an intermediate potential signal having an intermediate potential of the complementary signals. The method further includes conducting an operational test on the second device with the first and second complementary signals and the intermediate potential signal. This method enables detection of a defective connection between the devices.Type: GrantFiled: July 5, 2005Date of Patent: July 24, 2007Assignee: Fujitsu LimitedInventor: Gen Tsukishiro
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Patent number: 7248069Abstract: The invention relates to debug circuitry (20) and more particularly to a method and apparatus for providing security for debug circuitry (20). In one embodiment, a plurality of non-volatile elements (38) are used in providing selective disabling and re-enabling of at least a portion of the debug circuitry (20). Authentication may also be used. The present invention may use any debug interface, including standard debug interfaces such as the JTAG debug interface defined by the IEEE.Type: GrantFiled: August 11, 2003Date of Patent: July 24, 2007Assignee: Freescale Semiconductor, Inc.Inventors: William C. Moyer, Thomas E. Tkacik
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Patent number: 7248070Abstract: A programmable logic device for transferring JTAG scan data to a target device is disclosed. The programmable logic device includes a JTAG logic that communicates with a JTAG scan chain and interprets user-defined instructions received from the JTAG scan chain to generate control signals used by a target device interface and the target device interface, which transmits output data to a target device and receives input data from the target device in response to the control signals.Type: GrantFiled: February 16, 2005Date of Patent: July 24, 2007Assignee: Altera CorporationInventors: Patrick Guilloteau, Rafael C. Camarota, Arun Kumar Varadarajan Rajagopal
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Patent number: 7248071Abstract: Logic array devices having complex macro-cell architecture and methods facilitating use of same. A semiconductor device comprising an array of logic cells and programmable metal includes gate structures that are pre-wired, where, inputs and/or outputs are available for routing in programmable metal, possibly as part of a hybrid process. The device can also include selectable, in-line inverters, which can share the input/output tracks with logic inputs. A bubble-pushing algorithm can take advantage of the selectable in-line inverters to reduce the number of inverters in a design. In some embodiments, an embedded clock line is common to a plurality of logic cells. The clock line is terminated in a clock cell, which can include test logic, so that a clock group is formed. Flexibility to power down cells, or groups of cells can be provided by power traces with programmable connections.Type: GrantFiled: December 28, 2004Date of Patent: July 24, 2007Assignee: ViASIC, Inc.Inventor: William D. Cox
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Patent number: 7248072Abstract: Disclosed is a method an apparatus for selectively providing additional inputs into a logic block, such as a LAB of a PLD, carrying out a logic function requiring a relatively high number of inputs. A PLD in accordance with the present invention includes at least first and second LABs. A plurality of signal lines are capable of driving the second LAB and a plurality of output lines are driven by the first LAB. The PLD also includes a swap multiplexer (MUX) having a first selectable input capable of being driven by the output lines and a second selectable input capable of being driven by the signal lines. An output of the swap MUX is capable of driving the first LAB.Type: GrantFiled: February 11, 2004Date of Patent: July 24, 2007Assignee: Altera CorporationInventors: Michael Hutton, Vaughn T. Betz