Abstract: An amplifier circuit responsive to a power mode signal improves efficiency at low power levels without compromising efficiency at high power levels. At low power levels, high impedance is presented with suitable adjustment in the phase of the signal. Also, providing for predistortion linearization improves high power efficiency and switching the predistortion linearizer OFF at low power levels contributes little more than a small insertion loss. The power amplifier also uses a bias circuit incorporating a dual harmonic resonance filter to provide high impedance at a fundamental frequency and low impedance at a second harmonic. These properties are of particularly advantageous since amplifiers in cell-phones are used in low power modes most of the time although they are designed to be most efficient at primarily the highest power levels.

Abstract: The distortion compensating apparatus, which adaptively updates a distortion compensation coefficient for an amplifier based on a difference between input and output signals of the amplifier, comprises: a distortion amount detector which detects the amount of distortion of an output signal of the amplifier; a parameter holder which holds a parameter having been set therein; a parameter corrector which corrects the parameter in such a manner that the distortion amount detected by the detector is improved; a power monitor which monitors output power of the amplifier or a factor of variation in the power; and a controller which halts, if a monitoring result by the power monitor is smaller than a specified threshold value, the correction of the parameter. This arrangement makes it possible to accurately set the parameter relating to difference detection which is a factor of updating of distortion compensation coefficients of the distortion compensating apparatus.

Abstract: A method and apparatus provides an input structure for a power amplifier. In one example, the input structure has an input network and a predriver circuit to provide an input signal to the power amplifier. The input network includes a transformer for helping to maintain a constant input impedance. The predriver includes a limiting amplifier that provides isolation between the power amplifier and the RF input. A DC feedback circuit is used by the predriver that maintains the DC level of the inverters to a desired level.

Abstract: PWM signals having different polarities input from a +IN terminal and a ?IN terminal are output to a pre-driver and a switching signal generation circuit. The pre-driver outputs to switches a gate signal for actuating a driver obtained from the input PWM signal. The switching signal generation circuit inputs a PWM signal and outputs switching signals. A switching circuit, on input of the switching signals, changes over switches so that the gate signal is output to a first P-channel MOS transistor and a first N-channel MOS transistor in case the PWM signal is input from the +IN side, and to a second P-channel MOS transistor and a second N-channel MOS transistor in case the PWM signal is input from the ?IN side.

Abstract: A voltage regulation circuit intended to generate a regulated voltage for an electronic device, comprising: a transconductance amplifier based on a pair of MOS type differential amplifiers, said amplifier having a first input onto which a reference potential is applied and a second input onto which a counter reaction of said regulated voltage is input; a follower stage connected to the output from said transconductance amplifier; a MOS type transistor that will be used to make the output stage of the regulation circuit with a source connected to a first power supply potential. The transconductance amplifier comprises a resistive load 360 with a profile in K/gm, where gm is the transconductance coefficient of said input differential pair, said resistive load being connected to said first power supply potential.

Abstract: Variable gain amplifier (VGA) circuits and methods implemented in such circuits are disclosed. An example VGA circuit includes a differential transistor pair for receiving a differential input signal. The differential transistor pair, in operation, conducts a substantially constant current over a linear operating range of the variable gain amplifier circuit. The VGA circuit also includes a current source that is coupled with the differential transistor pair. The current source, in operation, provides the substantially constant current to the differential transistor pair. The VGA circuit further includes a variable resistance circuit coupled with the differential transistor pair. In operation, a resistance of the variable resistance circuit is adjusted such that a gain of the variable gain amplifier circuit is adjusted. Further, in operation, the VGA circuit produces a differential output signal, the differential output signal being an amplified version of the differential input signal.

Abstract: A differential signal receiver according to the present invention includes a waveform shaping circuit selectively outputting an upper limit value having a first potential difference from a first power supply potential, and a lower limit value having a second potential difference from the upper limit value, from a first and a second output terminals according to a differential signal input, and an amplifier comparing voltages of the first and the second output terminals and outputting one of a voltage almost the same as the first power supply potential or a voltage almost the same as a second power supply potential.

Abstract: The invention includes methods and systems for providing a multi-path common mode feedback loop in an amplifier system. Embodiments include techniques for dividing a common mode feedback current path to provide a slow common mode feedback current path and a fast common mode feedback current path. The slow and fast paths are configured for controlling common mode feedback current within a small bandwidth.

Abstract: A CMOS gain stage includes biasing circuitry configured to insure saturation of a subsequent stage without a source follower circuit. The CMOS gain stage is optionally powered by a supply voltage that is greater than a permitted supply voltage for a processes technology that is used to fabricate the CMOS gain stage. In order to protect CMOS devices within the CMOS gain stage, optional drain-to-bulk junction punch-through protection circuitry is disclosed. A variety of optional features can be implemented alone and/or in various combinations of one another. Optional features include process-voltage-temperature (“PVT”) variation protection circuitry, which renders a gain relatively independent of process, voltage, and/or temperature variations. Optional features further include bandwidth enhancement circuitry.

Abstract: An amplifier device including at least one operational amplifier, whereby a transformer is connected upstream from the input of the operational amplifier and the output signal of the operational amplifier or a signal generated from this output signal is fed back again to the input of the operational amplifier via a path with a predetermined resistance whereby the feedback signal is fed back before the input of the transformer whereby the transformer is designed or connected in a signal-inverting manner.

Abstract: A transconductance circuit, comprising: first and second field effect transistors, each having a drain, a source and a gate; wherein the first transistor is in a first current flow path between first and second nodes of the circuit, and is biased so as to operate in a saturation region of its transfer characteristic; the second field effect transistor is in a second current flow path between the first and second nodes of the circuit and is biased so as to operate in a linear region of its transfer characteristic; the gate of the first and second transistors are connected to receive an input signal; and wherein the second transistor is further in series with a voltage modulator adapted to reduce the drain-source voltage occurring across the second transistor in response to increased current flow in the second transistor.

Abstract: A repeater is configured so as to detect feedback oscillation conditions by detecting a gain parameter, and responding to the detected gain parameter by reducing the gain when the loop gain approaches unity. When used in a framed shared channel wireless communication systems, feedback oscillation conditions the loop gain of the repeater may be adjusted so as to permit operation of the repeater outside of the oscillation range. The invention is particularly useful when the repeater is used in a framed shared channel wireless communication system.

Abstract: A method and apparatus for an automatic gain control (AGC) loop that utilizes freezing and unfreezing states. A freezing process moves the AGC into a TRANSITION state from a NORMAL state, based on net change of VGA gain control codes over a monitoring time window. The freezing process then moves the AGC into a FROZEN state from the TRANSITION state, based on net change of VGA gain control codes over the monitoring time window. An unfreezing process moves the AGC into the NORMAL state from the FROZEN state, based on signal amplitude changes at the output of the VGA.

Abstract: An electronic device where the ratio between two amplification factors of two amplifiers, called main amplifiers, is adjusted using a control means. The control means constantly equalizes the output signals of the two main amplifiers by adapting one of the control signals. The output signals are acted on in order to adjust the control signals. Owing to the fact that the input signals are in a ratio N, this same ratio is obtained between the amplification factors of the two main amplifiers. The two main control signals, used to control the main amplifiers, are employed for controlling any other amplification factor of at least two other amplifiers or groups of amplifiers, so as to establish a ratio N between these other amplification factors. The main circuit thus allows N to be applied and regulated between the amplification factors of other amplifiers.

Abstract: A low noise amplifier has the properties of low noise figure and high gain under a high-frequency operation. The low noise amplifier includes a first transistor, a first inductive impedance, a first gate voltage source, a matching circuit, an input, a second inductive impedance, a second transistor, a first capacitive impedance, a second gate voltage source, a third transistor, a third gate voltage source, a second capacitive impedance, a first impedance, a second impedance, a direct current source, a first output, a second output, a first resistor, a second resistor, a third resistor, a first bulk voltage source, a second bulk voltage source, and a third bulk voltage source.

Abstract: A filter circuit arrangement comprising a circuit configuration having non-linear transmission characteristics for equalizing an input signal is disclosed. In one embodiment, the circuit configuration having the non-linear transmission characteristics is provided in a feedback loop of the filter circuit arrangement.

Abstract: Circuitry and methods for improved amplifiers with large bandwidth and constant gain are provided. The combination of a synthetic inductive drain load and a bridged-T matching network provide amplifiers that can drive a substantial capacitive load with the above mentioned improvements over prior amplifiers. Additionally, circuits presented allow for improved rise time and insensitivity to temperature variations.

Abstract: Signals outputted from oscillators (1-1, 1-2, . . . , 1-n) are in phase with signals as reflected by band elimination filters (3-1, 3-2, . . . , 3-n) at elimination frequencies of the band elimination filters (3-1, 3-2, . . . , 3-n), while they are in opposite phase with signals leaked from the corresponding band elimination filters (3-1, 3-2, . . . , 3-n). In this way, a stable oscillation can be performed with the oscillation frequencies of the oscillators (1-1, 1-2, . . . , 1-n) balanced as optimum frequencies between the natural frequencies of the oscillators (1-1, 1-2 , . . . , 1-n) and the elimination frequencies of the band elimination filters (3-1, 3-2, . . . , 3-n), while the oscillators (1-1, 1-2, . . . , 1-n) can be synchronized with the elimination frequencies being used as reference frequencies.

Abstract: A phase locked loop for stably operating in a matter that is insensitive to variation in PVT and a method of operating the same. The PLL according to the present invention includes a PFD, a charge pump circuit, a loop filter, a VCO, and a peak voltage detector. The PFD compares a phase or frequency of a reference signal with a phase or frequency of an output signal and outputs an up signal or a down signal based on the comparison result. The charge pump circuit generates a pumping current in response to the up signal or the down signal and increases or decreases the pumping current in response to a detection signal. The loop filter outputs control voltage according to the pumping current. The VCO outputs the output signal having a frequency determined based on the control voltage. The peak voltage detector detects the peak value of the control voltage and outputs the detection signal based on the detection result.

Abstract: A novel apparatus and method of extending the frequency tuning range and improving the modulation resolution of an RF digitally controlled oscillator (DCO). In addition to the coarse PVT MIM varactor bank, the DCO uses a single unified bank of varactors that is further subdivided divided into an MSB bank, LSB bank and sigma-delta (SD-LSB) bank. Any ratio mismatches between MSBs and LSBs are digitally calibrated out using a DCO step-size pre-distortion scheme wherein the LSB steps are adjusted to account for the ratio mismatch between the MSB/LSB step sizes. A harmonic characterization technique is used to estimate the mismatches in the minimal size CMOS tuning varactors of a digitally controlled RF oscillator (DCO), wherein the nominal ratio mismatch between the MSB and LSB devices is estimated using hybrid stochastic gradient DCO gain estimation algorithms. The nominal ratio mismatch and the mismatches in the MSB and LSB banks are used to determine the average MSB/LSB mismatch.

Abstract: A novel apparatus for and method of harmonic characterization and ratio correction of device mismatch between coarse and fine varactor tuning devices within a segmented unified varactor bank of a radio frequency (RF) digitally controlled oscillator (DCO). The DCO uses a single unified bank of varactors that is divided into an MSB bank, LSB bank and sigma-delta (SD-LSB) bank. Any ratio mismatches between MSBs and LSBs are digitally calibrated out using a DCO step-size pre-distortion scheme wherein the LSB steps are adjusted to account for the ratio mismatch between the MSB/LSB step sizes. A harmonic characterization technique is used to estimate the mismatches in the minimal size CMOS tuning varactors of a digitally controlled RF oscillator (DCO), wherein the nominal ratio mismatch between the MSB and LSB devices is estimated using hybrid stochastic gradient DCO gain estimation algorithms. The nominal ratio mismatch and the mismatches in the MSB and LSB banks are used to determine the average MSB/LSB mismatch.

Abstract: A method of calibrating an oscillator in order to compensate the dispersions generated, on the one hand, during the process of fabricating the oscillator circuit components and, on the other hand, by variations of operating conditions by modifying the parameters of a resonant component, for example a capacitor or an induction coil of the oscillator, in order to change the frequency range covered by the oscillator, according to the control voltage. Accordingly, calibrating the oscillator adjusts the output frequency of the oscillator according to an oscillator control signal. The calibration device determines the difference between the output frequency of the oscillator divided by a quantity and a reference frequency of the oscillator.

Abstract: An oscillator operable in various frequencies includes an oscillation unit generating a sine wave having a predetermined oscillation frequency, a feedback unit feeding the sine wave back to the oscillation unit, and a frequency control unit controlling an operating frequency of the feedback unit by controlling an amount of current flowing through the feedback unit in response to a frequency control signal. The oscillator can operate in various frequencies by controlling the operating frequency thereof. Consequently, the oscillator can sufficiently secure itself against a power noise margin.

Abstract: A resonator-synchronized oscillator for resonance mode selection is disclosed. In one embodiment, the resonator-synchronized oscillator comprises an oscillation loop, at least one capacitor switching circuit coupled to the oscillation loop, and a multi-mode resonator having an output coupled to the at least one capacitor switching circuit. The output signal of the resonator is used to synchronize the oscillator using switched capacitor structures to instantaneously reset the phase of the resonator-synchronized oscillator.

Abstract: An oscillator circuit providing quadrature outputs and enabling instantaneous control over phase, frequency and amplitude of the output waveforms is disclosed. In one embodiment, the oscillator circuit comprises an oscillation loop, at least one capacitor switching circuit coupled to the oscillation loop, and a synchronization signal having an output coupled to the at least one capacitor switching circuit. The synchronization signal may be derived internally from the oscillation loop or externally from an external oscillator.

Abstract: In a first aspect, a first method of adjusting capacitance of a semiconductor device is provided. The first method includes the steps of (1) providing a transistor including a dielectric material having a dielectric constant of about 3.9 to about 25, wherein the transistor is adapted to operate in a first mode to provide a capacitance and further adapted to operate in a second mode to change a threshold voltage of the transistor from an original threshold voltage to a changed threshold voltage such that the changed threshold voltage affects a capacitance provided by the transistor when operated in the first mode; and (2) employing the transistor in a circuit. Numerous other aspects are provided.

Abstract: An ultra low power relaxation CMOS oscillator for low frequency clock generation comprises a current source and a pair of capacitors that are alternatingly charged by the current source and discharged by thyristor-based inverters being used as comparators. No separate bias currents are needed.

Abstract: According to the present invention, there is provided a semiconductor device including: a phase locked loop circuit having, a phase frequency detector which receives a reference signal and a frequency-divided signal, and outputs a phase difference detection signal by performing phase comparison, a charge pump which receives the phase difference detection signal and outputs a charge pump signal by converting a voltage change into a current change, a loop filter which receives the charge pump signal, and outputs a control voltage by passing components having frequencies not more than a predetermined frequency, a voltage controlled oscillator which outputs a frequency signal having a frequency based on the control voltage, and a frequency divider which receives the frequency signal, and outputs the frequency-divided signal by dividing the frequency; a mask signal generator which generates a mask signal masking a timing at which the phase frequency detector compares phases of the frequency-divided signal and the

Abstract: A detection device for detecting an oscillator is provided. The detection device includes an oscillator control circuit, a frequency-decreasing circuit and a display circuit. The oscillator control circuit is used for outputting the oscillator signal of the oscillator. The frequency-decreasing circuit is connected to the output of the oscillator control circuit and has a capacitor suitable for charging and discharging and a resistor, which can adjust the time constant of the oscillator signal. The display circuit is connected to the frequency-decreasing circuit for showing the output signal of the frequency-decreasing circuit. The detection device can decide whether the oscillator is normal or broken by observing a component of the display circuit, for example, the twinkling of a light emitting diode of the display circuit.

Abstract: An integrated circuit comprises a microelectromechanical (MEMS) resonator circuit that generates a reference frequency. A temperature sensor senses a temperature of the integrated circuit. Memory stores calibration parameters and selects at least one of the calibration parameters as a function of the sensed temperature. A phase locked loop module receives the reference signal, comprises a feedback loop having a feedback loop parameter and selectively adjusts the feedback loop parameter based on the at least one of the calibration parameters.

Abstract: A crystal oscillator emulator integrated circuit comprises a first temperature sensor that senses a first temperature of the integrated circuit. Memory stores calibration parameters and selects at least one of the calibration parameters based on the first temperature. A semiconductor oscillator generates an output signal having a frequency that is based on the calibration parameters. A heater adjusts the first temperature to a predetermined temperature. A disabling circuit disables the heater after the calibration parameters are stored in the memory.

Abstract: A controlled oscillator generates an output signal having a frequency that is controllable by an input signal. The oscillator includes a switchable variable capacitor arrangement for tuning an output frequency of the controlled oscillator; and circuitry that, in combination with the switchable variable capacitor arrangement, generates an oscillating signal whose frequency is, at least in part, a function of a total capacitance of the switchable variable capacitor arrangement. The switchable variable capacitor arrangement includes a plurality of variable capacitors, each tunable by means of a tuning control signal and a switch arrangement that selectively opens or closes electrical paths to one or more of the variable capacitors under the control of one or more switch control signals, wherein the number of variable capacitors that contribute to the total capacitance of the switchable variable capacitor arrangement is controlled by states of the one or more switch control signals.

Abstract: An oscillator amplifier circuit is provided. The amplifier circuit can be used with a resonator to amplify and form a resonating oscillator. The amplifier circuit comprises an active circuit which includes an inverter and a current-controlled biasing circuit. One transistor of the inverter receives a voltage produced from the biasing circuit in order to place a gate terminal of that transistor at approximately a threshold voltage. The other transistor can be biased using a passive circuit element, such as a resistor. Therefore, both transistors are biased independent of each other within the optimal gain region. Large shunt capacitors are not required and the total current consumption is controlled through a variable resistor coupled to the source terminal of either the first transistor, second transistor, or possibly both transistors of the inverter to adjust the amplitude of the oscillating output.

Abstract: An electro-magnetically shielded slot-transmission line is formed by metallizing the opposing sides of a slot cut through a dielectric substrate. A ground plane is deposited on the bottom of the substrate. Conductive vias through the substrate and that contact the ground plane are located on both sides of the metallized slot surfaces. Conductive pads on the upper surface and which contact the vias provide additional shielding.

Abstract: A transition circuit includes: a waveguide having a notched portion formed by cutting away a portion of the tube wall of the waveguide from the end portion of the waveguide; a dielectric substrate in which a portion extending outside the waveguide through the notched portion of the waveguide is formed; a plurality of polygonal conductor patterns formed regularly disposed on the dielectric substrate; a ground conductor formed on the dielectric substrate; through holes electrically connecting this ground conductor and each of the conductor patterns; an open stub formed on the dielectric substrate; and the conductor of a microwave transmission line, which is formed on the portion of the dielectric substrate, extending outside the waveguide, and which is electrically connected to the open stub.

Abstract: An output match circuit is coupled between the terminal of a high-frequency device and a ground terminal. The output match circuit includes an LC shunt and an LC notch serially coupled to the LC shunt, wherein the LC notch includes a resonant capacitive element in series with a resonant inductive element. The LC notch may simply include a resonant inductive element coupled directly to the ground terminal. The series inductive element may have a terminal coupled between the resonant capacitive element and the resonant inductive element.

Abstract: The present invention provides a receiver input circuit capable of maintaining impedance matching with an antenna feeder wire within all frequency bands to be used and constituting parallel resonant circuits in multi-stage form without using additional circuit portions. The receiver input circuit includes a constant resistance branching filter, a coupling inductor and a tuning circuit. The constant resistance branching filter comprises a low-pass filter and a high-pass filter having termination resistors connected thereto. The low-pass filter and the high-pass filter respectively have equal cut-off frequencies selected to frequencies slightly lower than those lying in a used frequency band and include input ends connected in common to an input terminal of the constant resistance branching filter connected to the antenna feeder wire. The tuning circuit has a parallel resonant circuit constituted of a tuning inductor and a variable capacitance diode.

Abstract: A transmission line for high-frequency differential signals and having a transforming impedance is formed into a substrate. The transmission line is comprised of a slot, the opposing surfaces of which carry a conductive surface capable of carrying electrical signals. The conductive surface on the opposing surfaces is gradually receded along a length of the slot. An equivalent amount of metallization is applied on the substrate's surface and electrically continuous with conductive surfaces on the slot's opposing sidewalls. The metallization on the substrate's surface provide solder lands. Dielectric in the slot prevents solder wicking.

Abstract: Transmission line impedance matching for matching an impedance discontinuity on a transmission signal trace with one or more non-transmission traces disposed near the transmission signal trace at a region corresponding to the impedance discontinuity.

Abstract: A method for configuring a microwave multiplexing network having a first channel filter and a second channel filter and an interconnect in order to improve channel performance. The top ends of the first and second channel filters are coupled to the closer of the top and bottom surfaces of the interconnect according to interconnect spacing values and filter to interconnect values. Interconnect values and filter to interconnect values are determined by selecting interconnect spacing values and filter to interconnect values to ensure that a pole is formed causing an additional real reflection zero to be brought into the passband of the microwave multiplexing network thereby increasing the filter order by one. Then interconnect spacing values and filter to interconnect values as well as the internal filter dimensions are selected to ensure that the return loss of the microwave multiplexing network is less than a predetermined return loss level.

Abstract: Provided is a small-size phase shift circuit having a broad band characteristic. The phase shift circuit includes: a first switching element for switching between a through path and a capacitance capacity; a second switching element for switching the capacitance capacity for the through path and the ground; and a first and a second inductor having inductance. One end of the first switching element is connected to one end of the second switching element by the first inductor while the other ends of the first and the second switching element are connected to each other by the second inductor. One end of the first switching element is connected to a high-frequency signal input terminal while the other end of the first switching element is connected to a high-frequency signal output terminal. Thus, it is possible to constitute a phase device satisfying a predetermined condition.

Abstract: A coupled winding cancels parasitic inductance of first and second capacitors. In an EMI filter having common mode capacitors and a differential capacitors, first and second windings cancel parasitic inductance of the common mode and differential capacitors.

Abstract: An electrical filter has at least four terminals, two inductances and two capacitors. The first inductance is connected between the first terminal and the second terminal, and a second inductance is connected between the third terminal and the fourth terminal. The first capacitance is connected between the first terminal and a reference potential, and the second capacitance is connected between the third terminal and the reference potential. The first inductance and the second inductance form a transformer having a coupling coefficient of a magnitude such that the filter acts as a low-pass filter for differential signals and common mode signals, a cutoff frequency for differential signals being higher than a cutoff frequency for common mode signals.

Abstract: A noise filter has an element body, first to fourth terminal electrodes, and a connection conductor. The first to fourth terminal electrodes are disposed on the exterior of the element body. The connection conductor is also disposed on the exterior of the element body. A capacitor is formed in the element body and is electrically connected between the first and second terminal electrodes and the third and fourth terminal electrodes. The first and second terminal electrodes are electrically connected through the connection conductor. The connection conductor is covered by a resin containing ferrite. Since the connection conductor is covered by the resin containing ferrite, the connection conductor and the ferrite-containing resin function as a ferrite bead inductor.

Abstract: An electromechanical filter capable of achieving overall miniaturization by employing a micro oscillator such as a carbon nanotube with superior conductivity so as to enable selection of signals of a predetermined frequency. The apparatus includes an inner wall composed of a carbon nanotube that changes physically as a result of an input signal, and an outer wall composed of a carbon nanotube arranged so as to cover the inner wall and spaced by a microscopic gap from the inner wall. The outer wall detects an oscillation of the inner wall when a signal of a predetermined frequency is inputted from a connected signal input side electrode to the inner wall, so that this signal is outputted via a connected signal output side electrode.

Abstract: Thermally induced frequency variations in a micromechanical resonator are actively or passively mitigated by application of a compensating stiffness, or a compressive/tensile strain. Various composition materials may be selected according to their thermal expansion coefficient and used to form resonator components on a substrate. When exposed to temperature variations, the relative expansion of these composition materials creates a compensating stiffness, or a compressive/tensile strain.

Abstract: A film bulk acoustic resonator includes: a support substrate; and a laminated body provided on the support substrate, a portion of the laminated body being supported by the support substrate and another portion of the laminated body being spaced from the support substrate. The laminated body includes: a first electrode primarily composed of aluminum; a piezoelectric film laminated on the first electrode and primarily composed of aluminum nitride; and a second electrode laminated on the piezoelectric film. The second electrode is primarily composed of a metal having a density of 1.9 or more times the density of aluminum.

Abstract: In a balanced SAW filter, a second IDT and a fourth IDT of a five IDT type first longitudinally-coupled-resonator SAW filter element are connected via first and second wiring lines to a seventh IDT and a ninth IDT of a five IDT type second longitudinally-coupled-resonator SAW filter element, respectively. First, third, and fifth IDTs are connected to an unbalanced terminal. A sixth IDT and a first sub-IDT portion are connected to a first balanced terminal. A second sub-IDT portion and a tenth IDT are connected to a second balanced terminal. The IDTs are arranged such that the phase of an electrical signal transmitted through the first wiring line differs by 180 degrees from the phase of an electrical signal transmitted through the second wiring line.

Abstract: The invention provides a high-frequency torsion vibrator which can excite efficiently without having any paddle. The torsion vibrator is configured as a beam structure having an almost constant section and having no paddle and is disposed so as to be close to an electrode via a gap on the side surface of the beam thereof. An electrostatic capacitance between the vibrator and the electrode is adjusted so that the changing amount of the electrostatic capacitance per unit torsion vibration amount becomes maximum or the changing ratio of the electrostatic capacitance per unit AC voltage becomes maximum. This adjustment is made possible by controlling the thickness of the electrode in the case of using the semiconductor process. Further, when the vibrator is formed by monocrystalline silicon and the processing of the beam shape is performed by the anisotropic etching, the fine resonator which has a high Q value and has excellent surface property can be generated.

Abstract: In a band-pass filter using at least one resonant circuit, a resonant circuit having multiple matching frequencies, a filter circuit having an attenuation pole at a lower/higher frequency of a pass band using the resonant circuit, and a multilayered substrate using the resonant circuit are provided. The resonant circuit includes an input transmission line, an output transmission line of which an input terminal is connected to an output terminal of the input transmission line, a first capacitor of which one terminal is connected to an input terminal of the input transmission line and the other terminal is connected to an output terminal of the output transmission line, a main resonant transmission line of which one end of is connected to an output terminal of the input transmission line, and a second capacitor of which one end is connected to the other side of the resonance main transmission line and the other side is grounded.