Patents Issued in August 30, 2007
  • Publication number: 20070201226
    Abstract: An edge-light type backlight unit reduces the color unevenness on the display screen caused by the arrangement of point-shaped light sources (e.g., LEDs) in a point-shaped light source unit comprising a set of point-shaped light sources aligned. The backlight unit includes at least one point-shaped light source unit having point-shaped light sources arranged in a single direction in a predetermined order, the light sources emitting monochromatic light of different colors. The unit further comprises a first optical filter for limiting or controlling transmission of the monochromatic light emitted from one of the light sources disposed at one end of the light source unit, and a second optical filter for limiting or controlling transmission of the monochromatic light emitted from another of the light sources disposed at the other end thereof. The first and second filters are selectively formed on a first or second light guide plate or a diffusing plate.
    Type: Application
    Filed: February 14, 2007
    Publication date: August 30, 2007
    Applicant: NEC LCD TECHNOLOGIES, LTD.
    Inventor: Eitaro Nishigaki
  • Publication number: 20070201227
    Abstract: An accessory for an electronic device includes a cable, such as an audio cable having first and second ends, and a plurality of light guides attached to the cable. The light guides have first ends proximate the first end of the cable and extend along a length of the cable. Respective ones of the plurality of light guides terminate at different points along the length of the cable. The accessory may further include an interface adapter coupled to the cable and the plurality of light guides and at least one light emitting device, and the light guides may be configured to receive light emitted by the at least one light emitting device.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 30, 2007
    Inventors: William Camp, Hanqi Yang, Shuang Guo
  • Publication number: 20070201228
    Abstract: Device and wiring system of present invention allows for conversion of natural gas powered and 110 voltage post lantern lights to 12-volt or 24 volt electric energy by utilizing a copper bulb housing, attached to a CPVC stem, being hollow, wherein two center contact wires extend from stem, a third center contact wire being soldered to a copper ring, fitting into bulb housing sleeve groove. The soldered center contact wire being utilized for 12 volt wiring, and ignored for 24 volt wiring. Device wires are wired to separate center contact wires extending within post lantern pole, across residential lawns, to a transformer, plugging into a residential power line. Device replaces previous gas or 110 electric fixture components with utilization of inverted bulb device and invention's wiring procedure, comprising copper ring soldered to center contract wire for 12 volt, and ignoring soldered wire for 24 volts.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 30, 2007
    Inventor: Mark Young
  • Publication number: 20070201229
    Abstract: A light source apparatus comprises a mercury lamp having an arc tube having a light emitting portion and sealing portions extending from both sides of the light emitting portion, respectively and, a concave reflection mirror which reflects light emitting from the discharge lamp in a predetermined direction, and a front glass made from light transmissive material, which is arranged in an opening side of the concave reflection mirror, wherein a reflective surface of the concave reflection mirror is made of metal, and, wherein a reflective film which reflects infrared light and ultraviolet light, is formed on a surface of the front glass, and the infrared light and ultraviolet light which emitted from the extra-high mercury discharge lamp are reflected on the front glass so as to be returned to part of electrodes of the extra-high pressure mercury lamp or between the electrodes.
    Type: Application
    Filed: February 26, 2007
    Publication date: August 30, 2007
    Inventors: Koji Yamada, Tetsuji Hirao
  • Publication number: 20070201230
    Abstract: A lighting device can include a light source in line and a reflector behind the light source. In front of the light source, a transparent inner lens and a transparent outer lens can be provided with a gap formed therebetween. The shape of the lens can be defined by bending a plate member so as to have a projection portion that surrounds or opens towards the light source. The inner lens and the outer lens can each have a flat part at a position opposite the light source and in the illumination direction. When observed from different positions, the light source can appear as if it is displaced or deformed.
    Type: Application
    Filed: February 26, 2007
    Publication date: August 30, 2007
    Inventors: Daisuke Uchida, Toshiyuki Kondo
  • Publication number: 20070201231
    Abstract: A system and method for resetting a light source counter is provided. One embodiment includes a light source assembly having an opening, a light source in the light source assembly, and an alterable material to temporarily obstruct light passage through the opening in the light source assembly when a new light source is powered on and allow light passage after light exposure. Another embodiment provides a method comprising detecting a signal from a photodetector, determining if the signal indicates a new light source, resetting a light source timer, and tracking usage time of the light source. Some embodiments may comprise a light source, a photodetector to detect light from the light source, and a controller coupled with the light source and the photodetector, the controller to reset a light source counter that keeps track of usage time of the light source in response to a signal from the photodetector.
    Type: Application
    Filed: October 3, 2006
    Publication date: August 30, 2007
    Applicant: InFocus Corporation
    Inventor: Donald Rhodes
  • Publication number: 20070201232
    Abstract: An illumination apparatus includes a heat sink having a circuit-mounting side provided with a heat-conductive insulating film thereon. A lighting device includes a printed circuit provided on the circuit-mounting side of the heat sink and in thermal contact with the heat-conductive insulating film, and a lighting unit having a light emitting diode that is in the form of a chip die, that is connected electrically and wiredly to the printed circuit and that is in thermal contact with the heat-conductive insulating film.
    Type: Application
    Filed: June 28, 2006
    Publication date: August 30, 2007
    Inventor: Kuei-Fang Chen
  • Publication number: 20070201233
    Abstract: An illumination device can be configured to be capable of radiating light generated from a light emitting element while efficiently dissipating heat from the light emitting element. The illumination device can also efficiently utilize the light from the light emitting element. The illumination device can include a light emitting element, and a plurality of radially disposed radiation fins for dissipating heat generated by the light emitting element. An aperture for allowing light from the light emitting element to pass therethrough can be formed between adjacent ones of the radiation fins. In addition, a reflection surface for reflecting light which is blocked by the radiation fins when passing through the aperture can be formed on a surface of each of the radiation fins.
    Type: Application
    Filed: February 26, 2007
    Publication date: August 30, 2007
    Inventors: Yuji Sugiyama, Hitoshi Shoda, Takehiko Saigo, Yoshifumi Kawaguchi
  • Publication number: 20070201234
    Abstract: The invention provides a luminous element that includes a light-guiding device in which light is guided by reflection. The light-guiding device has at least one light-scattering area with light-scattering structures. The light-scattering structures can be applied to the surface of the light-scattering area. The luminous element also includes at least one light entry surface that is coupled to at least one organic light-emitting diode.
    Type: Application
    Filed: July 19, 2003
    Publication date: August 30, 2007
    Inventor: Clemens Ottermann
  • Publication number: 20070201235
    Abstract: A light-emitting module has: a single reflector having a plurality of concave reflection surfaces; and light emitters in a same number as a number of the concave reflection surfaces. Each of the concave reflection surface has an outer shape partially notched at a boundary thereof with the adjacent concave reflection surface. Each of the light emitters emits light toward the concave reflection surface.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 30, 2007
    Inventors: Yasumasa Sawai, Kenji Konno
  • Publication number: 20070201236
    Abstract: Some embodiments of the present invention provide a combination lighting and ventilating apparatus for installation in a structure. The apparatus can include a main housing having a first aperture that defines a ventilating inlet and a lighting outlet, a lamp housing recessed within the main housing, having first and second apertures spaced a distance from one another, and having a portion that extends outside of the main housing, and a lamp recessed within the lamp housing and the main housing. In some embodiments, the apparatus further includes a fan positioned to draw air into and through the first aperture of the lamp housing, around the lamp, and through the second aperture of the lamp housing. In another aspect of the invention, a method of lighting and ventilating a room using a combination lighting and ventilating apparatus is provided.
    Type: Application
    Filed: February 13, 2007
    Publication date: August 30, 2007
    Inventors: Gary Craw, Daniel Karst
  • Publication number: 20070201237
    Abstract: A method and system for deterring theft of a vehicle lamp component can include a flexible member that can be permanently or semi-permanently attached to a vehicle lamp such that valuable portions of the vehicle lamp are destroyed if/when unauthorized detachment of the lamp occurs. The vehicle lamp can include a light source, electronic circuitry such as a ballast, and electrical wiring interconnecting the light source and the ballast. The antitheft method and system can include connecting a cable at one end to a vehicle structural member, and forming a loop in the cable to encircle the electrical wiring interconnecting the light source and the ballast without allowing passage of at least one of the light source or the ballast through the loop in the cable.
    Type: Application
    Filed: February 28, 2006
    Publication date: August 30, 2007
    Inventor: Jay Sizemore
  • Publication number: 20070201238
    Abstract: A marine light mounting system for attaching at least one light to a marine vehicle includes a support structure for supporting one or more lights on the marine vehicle. The support structure includes a light mounting portion configured to receive a housing of one of the lights, and to facilitate attachment of the housing to the support structure. The light mounting portion includes a surface that may be generally arcuate, and which is configured to cooperate with the housing such that the surface does not completely surround a housing of the light. This facilitates attachment of the housing to the support structure while the light is electrically wired to a power source remote from the housing. This provides flexibility with regard to mounting the light in the first instance, and changing the orientation of the bracket in the second.
    Type: Application
    Filed: April 27, 2007
    Publication date: August 30, 2007
    Inventor: Todd Hurley
  • Publication number: 20070201239
    Abstract: A display device for a motor vehicle is used to display a number relating to the motor vehicle or a symbol relating to the motor vehicle. The display device has a layer made of a light-emitting polymer for emitting light of a first colour, a transparent carrier layer and a mask which is arranged on the transparent carrier layer and provided with an opening in the form of the number or signal, or the display device has a layer made of a first light-emitting polymer for emitting light of a first colour and a second layer, which is arranged close to the first layer and which is made of a second light-emitting polymer for emitting light of a second colour.
    Type: Application
    Filed: January 22, 2007
    Publication date: August 30, 2007
    Inventors: Daniel Rosario, Cedric Dupont, Arne Stoschek
  • Publication number: 20070201240
    Abstract: A vehicle headlamp. The headlamp comprises a light source and a reflector to direct light received from the light source out of the headlamp. A movable shade is positionable to control the light received by the reflector. A shade driver is coupled to the movable shade to position the shade. A first shade position configures the headlamp for high beam lighting. A second shade position configures the headlamp for low beam lighting. A third shade position configures the headlamp for daytime running lights.
    Type: Application
    Filed: February 24, 2006
    Publication date: August 30, 2007
    Inventor: Steven Kovach
  • Publication number: 20070201241
    Abstract: A lamp unit of a vehicle headlamp characterized in a lamp unit of a vehicle headlamp includes a projecting lens arranged on an optical axis extended in a front and rear direction of a vehicle, a first light emitting element arranged on a rear side of a rear side focal point of the projecting lens, and a reflector for reflecting light from the first light emitting element to a front side to be proximate to an optical axis. A vicinity of a rear side focal face of the projecting lens is arranged with a plurality of second light emitting elements for emitting light to the projecting lens.
    Type: Application
    Filed: February 8, 2007
    Publication date: August 30, 2007
    Applicant: KOITO MANUFACTURING CO., LTD.
    Inventor: Motohiro Komatsu
  • Publication number: 20070201242
    Abstract: A backlight unit includes a planar light source member that has a light-emitting surface and that emits light having directivity in a perpendicular direction to the light-emitting surface. An optical member has a light-receiving surface opposed to the light-emitting surface of the planar light source member and a light-emitting surface opposite to the light-receiving surface. The light-receiving surface has a multiplicity of prisms. By the prism action, the optical member emits the light having directivity in the perpendicular direction from the planar light source member as light having directivity in at least two directions on opposite sides of the perpendicular direction. The directions of light directivity are changed by varying the apex angle of the prisms.
    Type: Application
    Filed: February 23, 2007
    Publication date: August 30, 2007
    Inventor: Takashi Shimura
  • Publication number: 20070201243
    Abstract: A backlight assembly and an LCD having the same are disclosed to prevent wrinklings of optical sheets due to close contact of optical sheets or prism sheets. The backlight assembly includes multiple optical sheets disposed between a light guiding plate and a display unit, for the diffusion of light, collection of light and securing of horizontal viewing angle. The front surface or the rear surface of each of the optical sheets each has an embossing structure or a matte structure to decrease a contact area between the multiple optical sheets and to minimize frictions.
    Type: Application
    Filed: April 25, 2007
    Publication date: August 30, 2007
    Inventor: Jeong-Hwan LEE
  • Publication number: 20070201244
    Abstract: A backlight module (10) includes a light source and a light guide plate (12). The light source defines a number of light units (11) for emitting light beams. The light guide plate includes a light incident surface (121), an emission surface (123) adjacent to the light incident surface, a bottom surface (124) opposite to the emission surface, a plurality of side surfaces (122) between the emission surface and the bottom surface, and a plurality of diffusion units (13) formed on the bottom surface. A dot size of each diffusion unit/dot is inversely proportional to a summation of the sum of reciprocals of squares of distances between the diffusion unit and each of the light units and the sum of reciprocals of squares of distances between the diffusion unit and corresponding images of each of the light units formed, respectively, by the side surfaces.
    Type: Application
    Filed: September 22, 2006
    Publication date: August 30, 2007
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventor: Kun-Jung Tsai
  • Publication number: 20070201245
    Abstract: An optical sheet (20) includes a main body. The main body includes an incident surface (22), an emitting surface (23) at the opposite side of the incident surface, and a plurality of inverted pyramid depressions (24) formed on the emitting surface.
    Type: Application
    Filed: September 15, 2006
    Publication date: August 30, 2007
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventor: Shao-Han Chang
  • Publication number: 20070201246
    Abstract: A light transmitting diffusing sheet can be used in backlighting systems for liquid crystal displays (LCDs). Such displays are typically used in televisions, computer monitors, laptop computers and handheld devices such as mobile phones. Embodiments of the light diffusing sheets are suitable for use with both cold-cathode fluorescent (CCFL) and light emitting diode based backlighting systems. Desired light transmitting properties in the light transmitting diffusing sheet have been achieved by modifying both the volume and surface features of the sheet. Embodiments of this invention when used as part of the backlighting assembly for a LCD system results in improved brightness and controlled viewing angles. In one embodiment, substantially asymmetric particles in the volume of the sheet are combined with a ridged structure on one surface of the sheet.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 30, 2007
    Applicant: FUSION OPTIX, INC.
    Inventors: Terence Yeo, Zane Coleman
  • Publication number: 20070201247
    Abstract: In a spread illuminating apparatus including: an LED at a side surface of a light conductor plate; and an FPC having a land formed on a side thereof for mounting the LED, throughholes are formed at the land, and solder is contained at least partly in each of the throughholes, whereby the LED can be mounted solidly on the FPC with a high precision in height position from the FPC, and at the same time the heat emitted from the LED can be efficiently conducted to a conductive pattern at the rear side of the FPC through an electrode terminal of the LED and the throughholes filled with the solder composed of a metallic material having a high heat conductance.
    Type: Application
    Filed: February 20, 2007
    Publication date: August 30, 2007
    Applicant: MINEBEA CO., LTD.
    Inventors: Yasuo Ohno, Chiharu Ota
  • Publication number: 20070201248
    Abstract: A portable display device minimizes protrusions of a light emitting display panel, such as an organic light emitting display panel, and an integrated circuit to allows the thickness thereof to be reduced. The portable display device includes a light emitting display panel, such as an organic light emitting display panel. A metal plate is located on a rear surface of the organic light emitting display panel. A bottom chassis receives another light emitting display panel, such as a liquid crystal display panel and a backlight assembly. A first printed circuit board is located between the organic light emitting display panel and the bottom chassis. At least a part of either the organic light emitting display panel or the metal plate is arranged in opening portions of the bottom chassis and the first printed circuit board.
    Type: Application
    Filed: January 3, 2007
    Publication date: August 30, 2007
    Inventors: Youn Hwan Jung, Mun Hee Lee, Jae Mo Chung
  • Publication number: 20070201249
    Abstract: A power converter for converting an input voltage (Vin) into an output voltage (Vout), comprising a first supply potential and a second supply potential established by the input voltage, and at least one primary winding having two terminals, a center tap arranged between the two terminals and connected to the first supply potential, and at least one secondary winding magnetically coupled to the primary winding for providing at least one output voltage (Vout) and a first controllable switch connected between the second supply potential and one terminal of the primary winding and a second controllable switch connected between the second supply potential and the other terminal of the primary winding and a third controllable switch connected between the second supply potential and the one terminal of the primary winding and a fourth controllable switch connected between the second supply potential and the other terminal of the primary winding, and a control unit for controlling the switches such that the first, s
    Type: Application
    Filed: January 18, 2007
    Publication date: August 30, 2007
    Inventor: Arnold Knott
  • Publication number: 20070201250
    Abstract: A switching power supply unit is provided, in which a convertible voltage range can be more widened. A transformer having four windings at a high-voltage side, the windings having the number of turns equal to one another, and four inductors are provided in correspondence with four switching circuits. Four current paths assume one of the states of a 4-parallel connection state, a 4-series connection state, or a 2-series/2-parallel connection state with one another depending on magnitude of an input voltage in forward operation, and a target voltage value of an output voltage in reverse operation.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 30, 2007
    Applicant: TDK CORPORATION
    Inventor: Wataru Nakahori
  • Publication number: 20070201251
    Abstract: The present invention may provide a switching power supply circuit for converting primary side direct-current voltage to secondary side direct-current voltage. The switching power supply circuit may include a choke coil, a converter transformer; a switching element, a primary side series resonant capacitor, a primary side parallel resonant capacitor, an oscillating and driving circuit, a secondary side rectifier circuit, and a control circuit. Resonance frequency of the primary side first series resonant circuit may be set at a frequency substantially twice resonance frequency of the primary side second series resonant circuit. Resonance frequency of the primary side parallel resonant circuit may be set at a frequency substantially equal to or higher than 1.5 times the resonance frequency of the primary side first series resonant circuit.
    Type: Application
    Filed: February 13, 2007
    Publication date: August 30, 2007
    Applicant: Sony Corporation
    Inventor: Masayuki Yasumura
  • Publication number: 20070201252
    Abstract: The invention presents a switching power control circuit including two levels of under voltage lockout to improve the protection of the power supply. An input terminal of control circuit is connected to a supplied capacitor to supply the power of the control circuit. The supplied capacitor is charged through a start resistor for the start-up. Once the input voltage reaches a start-up voltage, the control circuit will start the operation. After that, the power is further supplied from a transformer of the power supply. If a fault condition is occurred, the switching of the control circuit will be stop and the supplied capacitor will be discharged. When the input voltage is discharged lower than a first under-voltage lockout threshold, the circuits of control circuit are shut down to consume lower power. Furthermore, once the input voltage is discharged lower than a second under-voltage lockout threshold, the control circuit will enable the start-up again.
    Type: Application
    Filed: February 24, 2006
    Publication date: August 30, 2007
    Inventors: Ta-yung Yang, Wei-Hsuan Huang
  • Publication number: 20070201253
    Abstract: Disclosed is a synchronous rectification type switching power supply apparatus, including: a transformer that receives input voltage on a primary side; a switching element that is to be turned on or off for rectifying current of a secondary coil of the transformer; a control circuit to drive the switching element. The control circuit includes a first timing detection circuit to detect first timing at which forward current flows through a body diode of the switching element, and a second timing detection circuit to detect second timing with counter electromotive voltage that is generated at an instant when the body diode is turned off. The control unit is to generate an on/off control signal for the switching element to turn on the switching element at the first timing, to turn off the switching element before the second timing and to bring off-timing of the switching element close to the second timing.
    Type: Application
    Filed: January 31, 2007
    Publication date: August 30, 2007
    Applicant: Mitsumi Electric Co. Ltd.
    Inventors: Naoto Endo, Koji Edamura
  • Publication number: 20070201254
    Abstract: To provide a motor drive adapted to operate stably and suffer essentially no damage, even when a high voltage is applied between grounding terminals of upper and lower arms. The motor drive of this invention includes: an arm with a first electric power semiconductor-switching element and a second electric power semiconductor-switching element, both connected in series between major terminals; and a level-shifting circuit that transmits a control signal of the first semiconductor-switching element connected to the high-voltage side of the arm, from a low-voltage circuit to a high-voltage circuit; the motor drive employing an insulated-gate bipolar transistor as the signal-transmitting high-withstand-voltage element formed in the level-shifting circuit.
    Type: Application
    Filed: January 19, 2007
    Publication date: August 30, 2007
    Inventor: Naoki Sakurai
  • Publication number: 20070201255
    Abstract: The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximately 700 mV. The invention also provides a method of changing and resetting the constant current value in a constant current device by either applying a positive potential to decrease the constant current value, or by applying a voltage more negative than the existing constant current's voltage upper limit, thereby resetting or increasing its constant current level to its original fabricated value. The invention further provides a method of forming and converting a memory device into a constant current device. The invention also provides a method for using a constant current device as an analog memory device.
    Type: Application
    Filed: January 17, 2007
    Publication date: August 30, 2007
    Inventors: Kristy Campbell, Terry Gilton, John Moore, Joseph Brooks
  • Publication number: 20070201256
    Abstract: A semiconductor memory module (1) includes a circuit substrate (2), a first (100), a second (200), a third (300) and a fourth (400) rank of memory chips (3), a first register (10) and a second register (20). The first register (10) and the second register (20) each comprise a first input (11, 21) for receiving a respective chip select signal (CS0, CS2), a second input (12, 22) for receiving a respective other chip select signal (CS1, CS3) at least one third input (13, 23) for receiving command/address signals (CA), and at least one third output (16, 26).
    Type: Application
    Filed: February 28, 2006
    Publication date: August 30, 2007
    Inventor: Siva RaghuRam
  • Publication number: 20070201257
    Abstract: An integrated circuit includes memory circuitry with a number of bit line structures, each including at least three bit lines; a number of word lines that intersect with the bit line structures at a number of sites; and a number of switching devices located at the sites. A number of VSS planes are interconnected with the switching devices. The switching devices and the VSS planes are formed at a first level. The VSS planes can be formed as substantially complementary interlocking regions that also form functional portions of the switching devices. The switching devices can be connected between an adjacent one of the word lines and a selected one of the bit lines of an adjacent one of the bit line structures for selective electrical conduction therebetween upon activation by the adjacent one of the word lines.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 30, 2007
    Inventors: Dennis Dudeck, Donald Evans, Hai Pham, Wayne Werner, Ronald Wozniak
  • Publication number: 20070201258
    Abstract: An example embodiment provides a semiconductor memory device. The semiconductor memory device may include an output driver, a delay circuit and an output driver controlling circuit. The output driver may output an external output signal in response to an internal output signal. The delay circuit may receive the internal output signal to generate one or more delay signals. The output driver controlling circuit may receive the external output signal to generate control signals synchronized with the delay signals. The drive ability of the output driver is controlled by the generated control signals.
    Type: Application
    Filed: January 9, 2007
    Publication date: August 30, 2007
    Inventor: Chang-Il Son
  • Publication number: 20070201259
    Abstract: An device for programming and reading codes onto an array of binary data storage element includes: a shift register for receiving, sequentially, a binary data series to be written onto the data storage elements; and control logic circuit for determining whether or not data is to be applied to each of the data storage elements in turn, by reading sequentially the data stored in the shift register and if it is determined that data is to be stored on a respective data element, applying a write signal to that data element. The control logic circuit applies a permanent locking signal to the array of data storage elements such that further writing to the elements is prohibited when it has been determined that data has been written to each of the elements which require data to be written thereto.
    Type: Application
    Filed: March 2, 2007
    Publication date: August 30, 2007
    Applicant: CAVENDISH KINETICS LIMITED
    Inventor: Leon Van Gorsel
  • Publication number: 20070201260
    Abstract: The present invention relates to a memory device with a hierarchy bit line. In a FeRAM with folded bit lines and opened bit lines, it has a hierarchy bit line where bit line signals in two or more columns commonly share one global bit line signal. In the hierarchy bit line, cell array blocks with the folded bit lines transferred with cell data of FeRAM cells are arranged between a pair of global bit lines in two or more columns, each of sense amps is arranged on the upper and lower edges of each of the cell array blocks, each of the sense amps is shared in the folded bit lines of the top cell array block and the folded bit lines of the bottom cell array block while being alternatively arranged in the neighboring columns, and the sense amps share the pair of global bit lines.
    Type: Application
    Filed: February 22, 2007
    Publication date: August 30, 2007
    Inventor: Hee Bok KANG
  • Publication number: 20070201261
    Abstract: Techniques are provided for employing independent gate control in asymmetrical memory cells. A memory circuit, such as an SRAM circuit, can include a number of bit line structures, a number of word line structures that intersect the bit line structures to form a number of cell locations, and a number of asymmetrical memory cells located at the cell locations. Each of the asymmetrical cells can be selectively coupled to a corresponding one of the bit line structures under control of a corresponding one of the word line structures. Each of the cells can include a number of field effect transistors (FETS), and at least one of the FETS can be configured with separately biased front and back gates. One gate can be biased separately from the other gate in a predetermined manner to enhance read stability of the asymmetrical cell.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 30, 2007
    Applicant: International Business Machines Corporation
    Inventors: Ching-Te Chuang, Jae-Joon Kim, Keunwoo Kim
  • Publication number: 20070201262
    Abstract: A static random access memory (SRAM) cell with improved stability that can handle half select operations. The disclosed cell includes: a pair of cross-coupled inverters coupled to a write bit line via a pass transistor, the pass transistor including a gate coupled to a pseudo write word line; a pair of serially coupled transistors coupled to a read bit line, a gate of a first serially coupled transistor being coupled to a read word line and a gate of a second serially coupled transistor being coupled to the pair of cross-coupled inverters; and a word line driver having an output coupled to the pseudo write word line and an input coupled to a write word line, the word line driver being controllable by a bit select input.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 30, 2007
    Applicant: International Business Machines Corporation
    Inventors: Rajiv Joshi, Leland Chang
  • Publication number: 20070201263
    Abstract: Included are first and second inverters 1L, 1R, a first selection transistor N1 controlling a connection of an output terminal of the first inverter 1L to a bit line 11, and a second selection transistor N2 controlling a connection of an output terminal of the second inverter 1R to a bit line 12, wherein the first inverter 1L having a first load transistor P1 and a first drive transistor N3 and the second inverter 1R having a second load transistor P2 and a second drive transistor N4, function as a memory cell 1, and a ratio of a driving current quantity that can be outputted in an ON-state of the first drive transistor N3 to a driving current quantity that can be outputted in an ON-state of the first selection transistor N1, is larger than a first predetermined value.
    Type: Application
    Filed: July 28, 2006
    Publication date: August 30, 2007
    Inventor: Yasuhiko Maki
  • Publication number: 20070201264
    Abstract: A magnetic memory device includes a plurality of first metal lines arranged in parallel on a substrate and including a plurality of magnetic domains with variable magnetization directions. A plurality of second metal lines is arranged on the substrate perpendicular to the first metal lines. The plurality of second metal lines each has a tunnel through which the plurality of first metal lines pass. First input units are connected to the plurality of first metal lines and supply a current to drag or move the plurality of magnetic domains. Second input units are connected to the plurality of second metal lines to supply a current for switching the magnetization directions of magnetic domains inside the tunnels. Sensing units are connected to the plurality of second metal lines for sensing an electromotive force caused by magnetic domain walls passing through the tunnels.
    Type: Application
    Filed: September 19, 2006
    Publication date: August 30, 2007
    Inventors: Sang-Min Shin, Yong-Su Kim, Yoon-Dong Park
  • Publication number: 20070201265
    Abstract: One embodiment of the present invention includes a multi-state current-switching magnetic memory element having a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.
    Type: Application
    Filed: February 23, 2007
    Publication date: August 30, 2007
    Inventors: Rajiv Yadav Ranjan, Mahmud Assar, Parviz Keshtbod
  • Publication number: 20070201266
    Abstract: A magnetoresistive random access memory (MRAM) device includes a memory cell corresponding to one read bit line, one read word line, one write word line, and two or more write bit lines. The memory cell includes a first memory unit and a second memory unit each corresponding to a respective write bit line. Each of the first and second memory units comprises: a free magnetic region having a first easy axis, a pinned magnetic region having a second easy axis, and a tunneling barrier between the free magnetic region and the pinned magnetic region.
    Type: Application
    Filed: February 16, 2007
    Publication date: August 30, 2007
    Applicant: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Yuan-Jen Lee, Ming-Jer Kao
  • Publication number: 20070201267
    Abstract: A memory includes a phase-change memory cell and a circuit. The phase-change memory cell can be set to at least three different states including a substantially crystalline state, a substantially amorphous state, and at least one partially crystalline and partially amorphous state. The circuit applies a first voltage across the memory cell to determine whether the memory cell is set at the substantially crystalline state and applies a second voltage across the memory cell to determine whether the memory cell is set at a partially crystalline and partially amorphous state.
    Type: Application
    Filed: February 24, 2006
    Publication date: August 30, 2007
    Inventors: Thomas Happ, Matthew Breitwisch, Hsiang-Lang Lung
  • Publication number: 20070201268
    Abstract: A spin based device can be used as a magnetic field sensor. The device uses ferromagnetic materials for implementing a variable spin resistance to a spin injected current having a particular spin value. An external magnetic field can change the magnetization state of the device by orienting the magnetization of the ferromagnetic layers to be parallel or antiparallel, thus changing the resistance of the device to an electron current of a particular spin orientation.
    Type: Application
    Filed: April 30, 2007
    Publication date: August 30, 2007
    Inventor: Mark Johnson
  • Publication number: 20070201269
    Abstract: Methods and apparatuses for protecting charge trapping memory cells from over-erasing in response to an erase command are disclosed.
    Type: Application
    Filed: April 30, 2007
    Publication date: August 30, 2007
    Applicant: Macronix International Co., Ltd.
    Inventors: Yi Liao, Chih Yeh, Wen Tsai, Tao-Cheng Lu
  • Publication number: 20070201270
    Abstract: A memory chip configuration aims that reduces the bitline leakage in standby as well as dynamic operation mode. The chip design comprises of—a n×m FET matrix, vertically running bitlines—each shared by a column in the array, horizontally running wordlines—each shared by a row in the array, horizontally running sourcelines—each shared by a row in the array. The sourceline signal for a row is generated by complementing the wordline signal for the same row. The memory cell read operations with the proposed configuration, substantially control the bitline leakage current thereby enhancing the memory speed by reducing the noise during read operations. Also the configuration is unconstrained by design parameters that include size and geometries of memory chips, cell densities, complexity of memory structures, fabrication technologies, etc.
    Type: Application
    Filed: December 29, 2006
    Publication date: August 30, 2007
    Applicant: STMICROELECTRONICS PVT. LTD.
    Inventors: Kallol Chatterjee, Vivek Asthana, Jitendra Dasani
  • Publication number: 20070201271
    Abstract: The present invention relates to a memory device with a hierarchy bit line. In a DRAM with folded bit lines and opened bit lines, it has a hierarchy bit line where bit line signals in two or more columns commonly share one global bit line signal. In the hierarchy bit line, cell array blocks with the folded bit lines transferred with cell data of DRAM cells are arranged between a pair of global bit lines in two or more columns, each of sense amps is arranged on the upper and lower edges of each of the cell array blocks, each of the sense amps is shared in the folded bit lines of the top cell array block and the folded bit lines of the bottom cell array block while being alternatively arranged in the neighboring columns, and the sense amps share the pair of global bit lines.
    Type: Application
    Filed: February 22, 2007
    Publication date: August 30, 2007
    Inventor: Hee KANG
  • Publication number: 20070201272
    Abstract: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.
    Type: Application
    Filed: May 1, 2007
    Publication date: August 30, 2007
    Inventors: Tsutomu Okazaki, Daisuke Okada, Kyoya Nitta, Toshihiro Tanaka, Akira Kato, Toshikazu Matsui, Yasushi Ishii, Digh Hisamoto, Kan Yasui
  • Publication number: 20070201273
    Abstract: Techniques are provided for back-gate control in an asymmetrical memory cell. In one aspect, the cell includes five transistors and can be employed for static random access memory (SRAM) applications. An inventive memory circuit can include a plurality of bit line structures, a plurality of word line structures that intersect the plurality of bit line structures to form a plurality of cell locations, and a plurality of cells located at the plurality of cell locations. Each cell can be selectively coupled to a corresponding one of the bit line structures under control of a corresponding one of the word line structures. Each cell can include a first inverter having first and second field effect transistors (FETS) and a second inverter with third and fourth FETS that is cross-coupled to the first inverter to form a storage flip-flop. One of the FETS in the first inverter can be configured with independent front and back gates and can function as both an access transistor and part of one of the inverters.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 30, 2007
    Applicant: International Business Machines Corporation
    Inventors: Ching-Te Chuang, Jae-Joon Kim, Keunwoo Kim
  • Publication number: 20070201274
    Abstract: A flash memory has multi-level cells (MLC) that can each store multiple bits per cell. Blocks of cells can be downgraded to fewer bits/cell when errors occur, or for storing critical data such as boot code. The bits from a single MLC are partitioned among multiple pages to improve error correctability using Error Correction Code (ECC). An upper reference voltage is generated by a voltage reference generator in response to calibration registers that can be programmed to alter the upper reference voltage. A series of decreasing references are generated from the upper reference voltage and are compared to a bit-line voltage. Compare results are translated by translation logic that generates read data and over- and under-programming signals. Downgraded cells use the same truth table but generate fewer read data bits. Noise margins are asymmetrically improved by using the same sub-states for reading downgraded and full-density MLC cells.
    Type: Application
    Filed: April 19, 2007
    Publication date: August 30, 2007
    Applicant: SUPER TALENT ELECTRONICS INC.
    Inventors: Frank Yu, Charles Lee, Abraham Ma, Ming-Shiang Shen
  • Publication number: 20070201275
    Abstract: A semiconductor device includes a semiconductor substrate, a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a second insulating film comprising a plurality of insulating films provided on the charge storage layer and comprising a nitride film as an uppermost layer, and a single-layer control gate electrode provided on the second insulating film and comprising metal silicide.
    Type: Application
    Filed: January 30, 2007
    Publication date: August 30, 2007
    Inventors: Wakako Takeuchi, Hiroshi Akahori, Murato Kawai