Abstract: In one embodiment, a method is provided for preventing reverse input current from flowing into a power source.

Abstract: An integrated circuit is provided that contain n-channel and p-channel metal-oxide-semiconductor transistors having body terminals. Adjustable transistor body bias circuitry is provided on the integrated circuit that provides body bias voltages to the body terminals to minimize power consumption. The adjustable body bias circuitry can be controlled using programmable elements on the integrated circuit that are loaded with configuration data. The integrated circuit may be a programmable logic device integrated circuit containing programmable logic. The adjustable body bias circuitry can produce an adjustable negative body bias voltage for biasing n-channel metal-oxide-semiconductor transistors. The adjustable body bias circuitry contains a bandgap reference circuit, a charge pump circuit, and an adjustable voltage regulator.

Abstract: A loop filter (30) includes a first capacitor (31) provided between an input terminal for a current signal and a reference voltage, a switched capacitor circuit (32) provided between the input terminal and the first capacitor (31) and a second capacitor (33) provided in parallel to the first capacitor (31) and the switched capacitor circuit (32). In the switched capacitor circuit (32), when a third capacitor (321) is connected to the first capacitor (31), a fourth capacitor (322) is connected to the second capacitor (33). In the loop filter (30) having the above-described configuration, a capacitance value of the second capacitor (33) is set to be larger than respective capacitance values of the third and fourth capacitors (321 and 322).

Abstract: A system and method for demodulating amplitude modulated input signals uses two comparators and a charge pump circuit, which is positioned between the two comparators, to produce a demodulated signal of an amplitude modulated input signal. The two comparators and the charge pump circuit form a demodulating unit that may be a part of an infrared remote control receiver. The first comparator converts the input signal from a waveform to a pulse form. The charge pump circuit then converts the pulse signal into an integrated signal in a triangular pulse form. The second comparator converts the integrated signal from a triangular pulse form to a rectangular pulse form to produce the demodulated signal.

Abstract: A Doherty amplifier is described which comprises: a power splitter (120) having a first output and a second output, wherein the first output is connected to a main power splitter (392) having first and second outputs which differ in phase by 90°; and the second output is connected to an auxiliary power splitter (342) having first and second outputs which differ in phase by 90°; a main final stage amplifier (234) comprising first (324) and second (325) main paired amplifiers, the inputs of which are connected to the first and second outputs of the main power splitter (352); an auxiliary final stage amplifier (244) comprising first (344) and second auxiliary (345) paired amplifiers, the inputs of which are connected to the first and second outputs of the auxiliary power splitter (342); wherein the output from the first main paired amplifier (334) is connected to the output from the first auxiliary paired amplifier (344) by an impedance inverter (250); and the output from the second main paired amplifier (345) i

Abstract: A switched-mode Class F power amplifier is provided for parallel connection with at least one other like amplifier, within a Chireix architecture, for combining the signals output therefrom. An input component includes at least one active device configured to be alternately switched by a signal input thereto to present an amplified signal corresponding to the input signal and constituting a low output impedance voltage source. A lumped element impedance inverter is provided between the input component and an output resonator component, the impedance inverter being configured for transforming the low output impedance voltage source to instead constitute a high output impedance current source configured for said parallel connection. In accordance with the invention, the negative reactive component values required by the impedance inverter are eliminated and effectively provided by incorporating those values into pre-selected reactive components of the input and output components.

Abstract: A single-ended input to differential-ended output amplifier circuit comprises an amplifier for amplifying an input signal into an amplified signal comprises an input for receiving the input signal; and a first input and a single-ended input to differential-ended output conversion circuit to convert the amplified signal to a differential signal pair, comprising a first transistor for receiving the amplified signal having a first gate coupled to the first output, a first first terminal coupled to a second output, and a first second terminal coupled to a first node; a second transistor having a second gate, a second first terminal coupled to a third input, and a second second terminal coupled to the first node; a second capacitor coupled between the second output and the second gate; a first and a second resistors and the voltage source; and a current source coupled between the first node and a ground.

Abstract: A semiconductor integrated circuit device is disclosed that includes a signal processing unit having a nonvolatile memory and a detection unit; plural oscillation sources outputting plural oscillation signals; a selection control unit that selects one of the oscillation signals output by the oscillation sources according to a selection signal, and controls a transfer timing for transferring circuit setting information from the nonvolatile memory to the detection unit and an operations start timing for starting signal processing operations of the signal processing unit according to the selected oscillation signal.

Abstract: A multimode-based phase modulating apparatus capable of reducing the degradation of modulation precision and suppressing the unnecessary power consumption. The phase modulating apparatus has a switch (9) for switching the modulation modes of a PLL circuit (15) between a single-point modulation and a double-point modulation. In a case of a narrow modulation bandwidth such as in a GSM mode, the switch (9) is turned off to cease a second digital baseband signal (S2), thereby causing the PLL circuit (15) to perform the single-point modulation in which only a first digital baseband signal (S1) from a frequency division rate generating part (10) is used for the modulation. Contrarily, in a case of a wide modulation bandwidth such as in a UMTS mode, the switch (9) is turned on, thereby performing the double-point modulation using both the first digital baseband signal (S1) and the second digital baseband signal (S2).

Abstract: A programmable reference-less oscillator provides a wide range of programmable output frequencies. The programmable reference-less oscillator is implemented on an integrated circuit that includes a free running controllable oscillator circuit such as a voltage controlled oscillator (VCO), a programmable divider circuit coupled to divide an output of the controllable oscillator circuit according to a programmable divide value. A non-volatile storage stores the programmed divide value and a control word that controls the output of the controllable oscillator circuit. The control word provides a calibration capability to achieve a desired output frequency in conjunction with the programmable divider circuit. Open loop temperature compensation is achieved by adjusting the control word according to a temperature detected by a temperature sensor on the integrated circuit. Additional clock accuracy may be achieved by adjusting the control word for process as well as temperature.

Abstract: An adaptive cycle-slipped detector (“ACSD”) for use in a Phase-Locked Loop (“PLL”) circuit. The ACSD may include a phase comparator, a phase shifter in signal communication with the phase comparator, and a cycle-slipped detector (“CSD”) in signal communication with the phase shifter.

Abstract: Various systems and methods for drift compensation are disclosed. As one example, a system for compensating drift in a control circuit is disclosed that includes at least two control signals. One of the control signals is provided by a circuit that is susceptible to drift. This control signal is provided both to a systems or device under control, and to a detection circuit. The detection circuit is operable to detect a drift in the control signal. In addition, the detection circuit provides another control signal that varies as a function of the drift in the received control signal.

Abstract: Systems and methods for tuning a phase locked loop (PLL) having a segmented voltage controlled oscillator (VCO) to an input frequency are provided. The PLL is reset and its VCO is coarse tuned until the input frequency is within a first predetermined threshold of the VCO center frequency. The input frequency is then compared to a clock reference signal to determine whether the input frequency has stabilized. After the input frequency has stabilized, the input frequency is continuously monitored by comparing it to the clock reference signal to determine whether the input frequency is varying, and if the input frequency is varying by more than a second predetermined threshold, then the PLL is reset.

Abstract: A phase-locked loop (200) includes a sampler (202), a phase detector (210), a loop filter (212), and a VCO (214). The loop achieves frequency multiplication without the need for a divider in the loop's feedback path. The VCO (214) is operated above the Nyquist rate of the sampler, causing the loop to lock on an aliased signal. Any variations in the VCO output frequency (i.e., jitter or phase noise) are fed back to the phase detector (210) 1-for-1, without attenuation normally associated with frequency dividers. Loop gain can therefore be kept high, even in loops that provide high closed loop frequency multiplication. According to one variation, a harmonic generator (540) is placed between the VCO and the sampler, thus causing the loop to lock on harmonics of the VCO frequency. Open loop gain and precision are thus further improved.

Abstract: In various embodiments, the invention provides a clock generator and/or a timing and frequency reference, with multiple operating modes, such power conservation, clock, reference, and pulsed modes. The various apparatus embodiments include a resonator adapted to provide a first signal having a resonant frequency; an amplifier; a temperature compensator adapted to modify the resonant frequency in response to temperature; and a process variation compensator adapted to modify the resonant frequency in response to fabrication process variation. In addition, the various embodiments may also include a frequency divider adapted to divide the first signal having the resonant frequency into a plurality of second signals having a corresponding plurality of frequencies substantially equal to or lower than the resonant frequency; and a frequency selector adapted to provide an output signal from the plurality of second signals.

Abstract: An oscillator coupling system includes a plurality of oscillating members and a plurality of delay members connecting at least two of the oscillating members. Between the delay members is a specific phase or time delay relationship such that characteristics of phase or frequency noise suppression correlation of the two oscillating members are coupled to each other by the delay members, thereby reducing noise autocorrelation while the oscillator coupling system is in operation, enhancing phase or frequency noise suppression, using no bulky elements such as solid state circulators, isolators and resonators, reducing signal distortion, and increasing system stability.

Abstract: A method for fabricating a quartz nanoresonator which can be integrated on a substrate, along with other electronics is disclosed. In this method a quartz substrate is bonded to a base substrate. The quartz substrate is metallized so that a bias voltage is applied to the resonator, thereby causing the quartz substrate to resonate at resonant frequency greater than 100 MHz. The quartz substrate can then be used to drive other electrical elements with a frequency equal to its resonant frequency. The quartz substrate also contains tuning pads to adjust the resonant frequency of the resonator. Additionally, a method for accurately thinning a quartz substrate of the resonator is provided.

Abstract: The present invention discloses an automatic page detector, to determine which page of a book is open. The automatic page detector uses a magnet and an inductor as a sensor. In the invention, there is a magnet at each page of the book and the locations of the magnets for different pages are different. There is an array of inductors just beneath the magnets when the book is closed. The inductors are connected to the feedback loop of a LC oscillator through analog switches. The proximity of a magnet to an inductor will change the frequency of the LC oscillator. Scanning the analog switches by a microprocessor and detecting the variation of frequency of the LC oscillator during each scanning time period, the status of each magnet will be detected and we can determine which page of a book is opened.

Abstract: A voltage-controlled current source includes a current source having temperature dependency, a voltage source having process dependency, a first signal conversion circuit which generates second voltage having temperature dependency and process dependency by use of current of the current source and first voltage of the voltage source, a second signal conversion circuit which converts a first control signal used to control transfer conductance into a second control signal by using the second voltage as a reference, and a voltage-controlled current source circuit whose transfer conductance is controlled according to the second control signal.

Abstract: In various embodiments, the invention provides a frequency controller and a temperature compensator for frequency control and selection in a clock generator and/or a timing and frequency reference. The various apparatus embodiments include a resonator adapted to provide a first signal having a resonant frequency; an amplifier; a temperature compensator adapted to modify the resonant frequency in response to temperature; and a process variation compensator adapted to modify the resonant frequency in response to fabrication process variation. In addition, the various embodiments may also include a frequency divider adapted to divide the first signal having the resonant frequency into a plurality of second signals having a corresponding plurality of frequencies substantially equal to or lower than the resonant frequency; and a frequency selector adapted to provide an output signal from the plurality of second signals.

Abstract: A phase modulation section (101) generates a first modulated signal including phase information. An amplitude signal control section (103) generates a second modulated signal including amplitude information. A waveform shaping section (104), when an amplitude of the second modulated signal is larger than a regulated value generates a waveform-shaped modulated signal. An amplitude modulated voltage supply section (105) amplifies the waveform-shaped modulated signal based on the supply voltage from a voltage control section (106) and supplies the amplified signal to a power amplification section (102). The power amplification section (102) amplifies the first modulated signal based on the amplitude modulated voltage, and outputs the resultant signal.

Abstract: The present invention relates to a frequency multiplying arrangement (10) comprising a transistor arrangement with a first and a second transistor (T1, T2), each with an emitter (e), a base (b) and a collector (c), a voltage (current) source, output means for extracting an output signal (Vout) comprising a multiplied output frequency harmonic of an input signal (Vin), and impedance means. The impedance means comprises a first impedance means (3) connected to the collectors of the respective transistors, the transistors operating in phase opposition, and the waveform of the current for each transistor is half wave shaped such that the transistor is conducting only the half of each period, and the output signal (Vout) is extracted (P) between the first impedance means (3; 31; 32; 33; 34; 35) and the collectors (c) of the transistors.

Abstract: A device for coupling high-frequency signals between a first component and a second component is adapted to supply a first bias voltage-current pair to the first component and a second bias voltage-current pair to the second component.

Abstract: A filter circuit includes a signal source, an inductor, a load, and a compensator. The inductor and the load are connected between two terminals of the signal source in series. The compensator is connected in parallel with the inductor.

Abstract: A via transmission line for a multilayer printed circuit board (PCB) in which a wave guiding channel is formed by a signal via or a number of signal vias, an assembly of ground vias surrounding the signal via or corresponding number of coupled signal vias, a set of ground plates from conductor layers of the multilayer PCB, and a clearance hole.

Abstract: A termination circuit is connected to an input buffer receiving a data signal, and includes at least one termination resistor connected to the input buffer for impedance matching. At least one switch controls a connection between the input buffer and a corresponding one of the at least one termination resistors. A control signal generator generates a control signal for selectively enabling the termination circuit by controlling each of the at least one switches. The control signal has an input period less than or equal to an input period of a data signal.

Abstract: The frequency-selective transformer comprises a capacitative transformer and an electromechanical resonator. The capacitative transformer comprises a first port, a second port, and a third port. The electromechanical resonator is connected between the second port and the third port of the capacitative transformer and has a series resonance and a parallel resonance that are closely spaced in frequency.

Abstract: Film bulk acoustic resonators (FBARs) having frame elements and filters including the resonators are described.

Abstract: A stacked resonator and a filter are provided which are capable of achieving miniaturization and minimum loss, and also capable of transmitting a balanced signal with superior balance characteristics. There are provided a pair of quarter-wave resonators which are interdigital-coupled to each other. One quarter-wave resonator is constructed of a plurality of conductor lines which are stacked and arranged so as to establish a comb-line coupling. By the stacked arrangement so as to establish a comb-line coupling of the plurality of conductor lines, the conductor thickness of this quarter-wave resonator can be increased virtually thereby reducing the conductor loss. Similarly, the other quarter-wave resonator is constructed of a plurality of conductor lines stacked and arranged so as to establish a comb-line coupling, and hence the conductor thickness of this quarter-wave resonator can be increased virtually thereby reducing the conductor loss.

Abstract: A circuit breaker includes separable contacts, an operating mechanism structured to open and close the separable contacts, and a magnetic trip mechanism cooperating with the operating mechanism to trip open the separable contacts. The magnetic trip mechanism includes a support structure including a slotted support portion therein, and a plunger assembly. The plunger assembly includes a movable core resting in the support portion of the support structure, and a plunger member including a first portion cooperating with the operating mechanism, a second portion coupled to the movable core, and a third portion engaging the support structure.

Abstract: A membrane actuator includes a magnetically actuatable membrane and a magnetic trigger. The membrane includes a shape memory alloy (SMA), and the magnetic trigger is configured to induce a martensitic transformation in the SMA, to produce a larger force than would be achievable with non-SMA-based materials. Such a membrane actuator can be beneficially incorporated into a wide variety of devices, including fluid pumps, shock absorbing systems, and synthetic jet producing devices for use in an aircraft. The membrane/diaphragm can be formed from a ferromagnetic SMA, or a ferromagnetic material can be coupled with an SMA such that the SMA and the ferromagnetic material move together. A hybrid magnetic trigger, including a permanent magnet and an electromagnet, is preferably used for the magnetic trigger, as hybrid magnetic triggers are easy to control, and produce larger magnetic gradients than permanent magnets or electromagnets alone.

Abstract: A permanent magnetic male and female levitation support has a first part with a cavity and a plurality of retainment mechanisms incorporated therein, and a plurality of first permanent magnets evenly distributed around the perimeter of the cavity and held in place by the retainment mechanisms, wherein the first permanent magnets produce a first rotationally invariant magnetic field around a first axis. A second part is rigidly connected to a base and produces a second rotationally invariant magnetic field around a second axis. When the first axis is aligned with the second axis, the first magnetic field and the second magnetic field simultaneously produce a repulsive force and a restorative force to levitate the first part relative to the second part.

Abstract: An electronic substrate includes: a base substrate having an active face and a rear face; inductor elements formed on or above the active face, and formed on or above the rear face; and a conductive member electrically connected to the inductor element formed on or above the rear face, penetrating through the base substrate from the active face to the rear face.

Abstract: A coil component includes a first coil block and a second coil block that are sandwiched between magnetic substrates so as to form a chip body, and external electrodes that are attached to the chip body. The first coil block includes a coil body and an insulating body. The coil body includes an outer coil portion and an inner coil portion. The outer coil portion includes a first pattern group and a second pattern group, which are connected helically vertically in an alternating fashion. The inner coil portion includes a first spiral pattern and a second spiral pattern, which are connected to each other in series. In other words, low stray capacitance is achieved by the outer coil portion, while high inductance is achieved by the inner coil portion.

Abstract: According to a first aspect the present invention relates to a fault current limiter formed by a conductor tape (11, 41, 51, 61,71) coated with a high temperature superconductor and having at least one mounting element (12, 42, 52, 62, 72) which is essentially holding the conductor tape solely on one or more edge regions in such a way that the principal surfaces of the tape cannot get in touch with the mounting element. According to a second aspect the present invention relates to a fault current limiter formed by a conductor tape coated with a high temperature superconductor and comprising at least one mounting element (23, 24) which is contacting the conductor tape on one or on both major surfaces in an electrically conducting manner such that the conductor tape (21) in its normal conducting state is electrically shunted by the mounting element (23) in the contact region.

Abstract: Provided are a method and apparatus for providing state information of a digital device in a home network. The apparatus includes a first network interface module receiving changed state information data from the digital device in the home network, and a control module updating state information of the digital device on the basis of the received state information data.

Abstract: A shopping cart conveyor that inhibits the loading of a non-compliant shopping cart onto the conveyor. In one aspect, the invention provides a conveyor comprising a track operable to guide the shopping cart between a first location and a second location, a gate assembly including a door movable between a closed position inhibiting entry to the track and an open position allowing entry to the track, a lock for securing the door in the closed position, and a sensor (e.g., an ultrasonic sensor, an optical sensor, a radar sensor, an infrared sensor, an RFID reader, a magnetic sensor, and a mechanical sensor) positioned to detect the presence of a shopping cart. In another aspect, the conveyor is configured to move the gate from the closed position to the open position when the sensor detects the presence of a shopping cart. Preferably this is done using a drive mechanism coupled to the gate.

Abstract: The claimed subject matter provides a system and/or a method that facilitates initiating a sequence within an industrial automation environment. A radio frequency identification (RFID) component can receive data from an RFID tag. An event control component can invoke at least one event related to a device in a designated control sequence.

Abstract: The claimed subject matter provides a system and/or a method that facilitates providing a safety mechanism associated with a protective zone in an industrial automation environment. An radio frequency identification (RFID) component can receive data from an RFID tag to identify a location. A safety component can employ a safe mode to a device based at least in part upon the location to employ a protected zone in proximity with the device.

Abstract: To avoid the untimely locking of the exits of a vehicle 1 using a hands-free locking/unlocking device by detecting the proximity to the vehicle of an identifying device 2, the method comprises measurement of the radio frequency noise level present on the antenna of the identifying device in the frequency range of the request signals transmitted by the system on board the vehicle 1. When the noise level is sufficiently high and the request signal is not received by the identifying device 2, the transmission of the locking signal, which is normally transmitted when the request signal stops being received because of the distance of the identifying device 2 from the vehicle 1, is inhibited.

Abstract: A vehicle, particularly a motor vehicle, has a flap, which automatically opens as a result of an opening command. The opening command takes place without a manual operation of an unlocking/locking mechanism. A proximity sensor and a control device coupled therewith are present, the control device being constructed such that it recognizes the presence of a valid access authorization device within a surrounding area and, if a valid access authorization device is recognized, as a function of the presence of an unlocking signal of the proximity sensor, activates the unlocking/locking mechanism for releasing the automatically opening flap.

Abstract: Radio frequency identification (RFID) system comprising a read-write device 1, including a memory unit 3 for storing a plurality of basic opcodes ba-op, an RFID tag 5, including a memory unit 8 for storing data item and a plurality of opcodes cr-op; the basic opcodes ba-op and opcodes cr-op drives the communication between the read-write device 1 and the RFID tag 5 according to a standard air interface. The memory unit 3 comprises a mapping function fx for transforming said basic operands ba-op in said operands cr-op; the opcodes cr-op are in crypted format and the mapping function fx authorises the communicative connection between the RFID tag 5 and the read-write device 1. The memory unit 3 also comprises a plurality of optional operating codes opt-op and the memory unit 8 also comprises a plurality of further optional operating codes opt-cr-op in crypted format. The mapping function fx also transforms the optional operating codes opt-op in such further optional operating codes opt-cr-op.

Abstract: A wireless communication device is provided with both a transceiver and a low-cost RFID reader. The RFID reader is operable to generate a first outbound radio frequency (RF) signal from first outbound data, to receive a first inbound RF signal responsive to the outbound RF signal and to convert the first inbound RF signal into inbound RFID digital data. The transceiver is operable to generate a second outbound radio frequency (RF) signal, to receive a second inbound RF signal and to convert the second inbound RF signal into inbound transceiver data.

Abstract: A wireless tag determination system includes a detection information storage configured to store information detected from a wireless tag by a tag reader, as detection information. A determination requesting unit is configured to request a determination for reliability of existence of the wireless tag within a detection range of the tag reader. A reliability determination unit is configured to determine the reliability by use of the detection information, in response to the request.

Abstract: A method associated with a UWB RFID system provides for receiving a data transmission transmitted using UWB and accessing data within the data transmission using a communications protocol. An initial portion of the data transmission defines a structure of the data transmission such that subsequent data in the data transmission is directly accessible without additional decoding.

Abstract: The present invention includes a no-response detecting unit, an interference channel detecting unit, a post-transmission stop time setting unit, and a transmission control unit. The no-response detecting unit performs carrier sense. Then, after communication from an open channel is started, the no-response detecting unit detects the communication state with the tag. The interference channel detecting unit performs carrier sense on all channels, detects a channel with a high interference level, and outputs the detected channel to an external control device, when the no-response detecting unit detects that the communication state is degraded. The post-transmission stop time setting unit updates and sets the stop time after transmission (Tsleep) when an interferer notification, notifying that the tag communication device is an interferer, is given by the control device. The transmission control unit notifies the control device of the channel used at the start of the transmission to the tag.

Abstract: A tag communication device for which maximum continuous transmission time for one transmission to a tag is determined includes a detecting unit that detects a no-response state of the tag after data transmission to the tag using an open channel detected by carrier sense; a judging unit that judges, when the detecting unit detects the no-response state, whether a timeout has occurred by determining whether a predetermined timeout time has elapsed in the no-response state; and a control unit that starts, when the judging unit judges that the timeout has occurred, the carrier sense after transmission to the tag is stopped for a predetermined stop time.

Abstract: To support a tag information reader to read information from radio communication tags, attached to each of a plurality of structural objects in a plant and to provide the locations of unread radio communication tags, a tag information acquisition unit acquires information on radio communication tags actually read by the tag information reader. Next, an unread tag extraction unit extracts radio communication tags which are a plurality of radio communication tags stored in a tag arrangement data file but from which information cannot be acquired by the tag information acquisition unit, and an unread tag arrangement calculation unit acquires arrangement data on the extracted radio communication tags. The arrangement data on those radio communication tags is sent to a display unit for displaying the radio communication tags.

Abstract: A radio frequency (RFID) reader may modulate a clock signal onto the carrier wave that it transmits to one or more RFID tags, and maintain that clock signal throughout all or most of its transmission (which in some embodiments may also be modulated additionally for the transmission of data). An RFID tag receiving that signal may synchronize its own internal clock to that received clock signal, and use its own internal clock as a reference clock for its own transmission. By continuing to synchronize on the clock signal from the RFID reader, the RFID tag's transmission data rate may be prevented from drifting excessively.

Abstract: Provided is a low-power wireless communication apparatus and method. In the apparatus, a low-noise amplifier amplifies an RF signal in an on state, the low-noise amplifier be turned on/off according to a predetermined control signal. A wake-up signal detector detects a wake-up signal from the amplified RF signal. A controller provides the predetermined control signal such that the low-noise amplifier and the wake-up signal detector operate at a predetermined on-off duty ratio in a sleep mode corresponding to an Rx waiting state, and switching to an Rx mode to maintain the on state of the low-noise amplifier when the wake-up signal is detected.