Patents Issued in October 2, 2007
  • Patent number: 7276960
    Abstract: A charge pump circuit with a regulated charge current where the amount of current flowing into the flying capacitor depends on the magnitude of the output voltage error, using an OTA to convert the output voltage error into a current. Thus the flying capacitor is not charged when the output load is very low or when the output voltage error is minimal. Voltage overshoots are reduced by a stop circuit which forces pulse skipping and which inhibits the charging of the flying capacitor. Current limiting devices further limit the charge current into the flying capacitor. Full short-circuit protection is provided in one preferred embodiment by current limiting the driver stage of the charge pump circuit. Except for pulse skipping, the charge pump runs at a constant frequency supplied by a clock.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: October 2, 2007
    Assignee: Dialog Semiconductor GmbH
    Inventor: Carlo Eberhard Peschke
  • Patent number: 7276961
    Abstract: A constant voltage outputting circuit has a differential amplification circuit having two inputs and an output that is connected to a gate of an output transistor. The output transistor is connected between a power supply voltage and an output terminal and controls an output voltage at the output terminal based on an output of the differential amplification circuit. A voltage division resistor divides the output voltage and applies a divided voltage to one input of the differential amplification circuit, and a reference voltage is applied to the other input thereof. A capacitor connected between the power supply voltage and the gate of the output transistor stabilizes the output voltage when the power supply voltage changes.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: October 2, 2007
    Assignee: Seiko Instruments Inc.
    Inventor: Ryohei Kimura
  • Patent number: 7276962
    Abstract: A switched-capacitor programmable gain amplifier (PGA) has improved circuit performance that avoids impracticably small capacitors, while providing low total harmonic distortion (THD) and reasonable gain linearity. The sampling capacitor (CS) in the PGA is designed with a C-2C capacitor array. Gain settings from the C-2C capacitor array arranged for selection with constant VGS switches. The gain of the resulting PGA corresponds to the ratio of the effective capacitance of the C-2C array and the effective capacitance value of the feedback capacitor (CF). The resulting performance of the PGA has reduced charge injection and clock feed-through errors, and thus reduced THD.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: October 2, 2007
    Assignee: National Semiconductor Corporation
    Inventor: Loren Justin Tomasi
  • Patent number: 7276963
    Abstract: Switching power amplifier includes a first signal path having a pulse modulator for modulating an input signal, and a switching power unit for amplifying the modulated signal to generate an amplified output signal; a second signal path for generating a reference signal in response to the input signal; and a sigma delta feedback loop having a substractor for substracting the generated reference signal from the amplified input signal to generate an error signal, an analogue noise shaper for integrating the error signal to generate an integrated error signal, and a quantizer for converting the integrated error signal into a digital feedback signal which is fed back to the first signal path.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: October 2, 2007
    Assignee: Cameo Produktions-und Vertriebs GmbH fuer Beschallungs und Beleuchtungsanlagen
    Inventor: Carsten Wegner
  • Patent number: 7276964
    Abstract: The present invention provides a PWM power amplifier and a method for controlling the same which can improve the sound quality significantly in real time. There is provided a PWM power amplifier and a method for controlling the same that PWM-power-amplifies an input audio signal to supply thus amplified audio signal to a speaker, which power-amplifies the audio signal, removes high frequency signal components included in the audio signal which is power-amplified, detects a distortion error raised in the audio signal which has its high frequency signal components removed based on the audio signal just about to be power-amplified, adjusts a voltage supplied from an external power source depending on a detected distortion error, and adjusts a voltage to be supplied at the time of the power amplification by a value corresponding to the distortion error so as to reduce the output impedance of the audio signal which has its high frequency signal components removed.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: October 2, 2007
    Assignee: Sony Corporation
    Inventor: Chitoshi Ishikawa
  • Patent number: 7276965
    Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an input that communicates with the output of the zero-order TIA and an output. A first feedback resistance has one end that communicates with the input of the zero-order TIA and an opposite end that communicates with the output of the first opamp. A first feedback capacitance has a first end that communicates with the input of the zero-order TIA and a second end that communicates with the output of the zero-order TIA. A capacitor has one end that communicates with the input of the zero-order TIA.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: October 2, 2007
    Assignee: Marvell International Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7276966
    Abstract: Improved radio frequency (RF) envelope tracking apparatus for use in wireless and wired systems. In one exemplary embodiment, a transmitter upconversion stage receives input digital I and Q values, the output of the upconversion stage being fed to both an envelope tracking circuit and a power amplifier (before or after optional filtering). The envelope tracking circuit controls the operation of a power modulator, which adjusts the power amplifier. The envelope tracking circuit is specifically configured to provide improved linearity and power efficiency. The envelope tracking apparatus and methods of the present invention may be applied to heterodyne/super-heterodyne architectures as well as others.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: October 2, 2007
    Assignee: STMicroelectronics N.V.
    Inventors: Andrew Tham, Steven R. Norsworthy, Jason Rupert Redgrave
  • Patent number: 7276967
    Abstract: A signal level adjusting apparatus comprises an amplifier that amplifies an input signal with a gain of a first gain value and outputs an amplified signal; a gain calculator that obtains a second gain value according to a signal level of the input signal; and a gain updater that updates the first gain value stepwise such that the first gain value approaches the second gain value by steps corresponding to an error between the first gain value and the second gain value.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: October 2, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Seiji Kawano
  • Patent number: 7276968
    Abstract: A drive signal that matches the bias of a transistor is generated. A differential amplifier calculates the difference between a specified voltage of negative power supply and another input signal. Then, a resistor that realizes a pull-down function level-shifts it towards a negative power supply voltage having a higher absolute voltage value to generate another differential signal, which is in turn amplified in another amplifier, to generate another drive signal that matches the bias of another transistor. Respective current mirror circuits detect a falling voltage occurring at both ends of a resistor connected between the transistor and the higher positive power supply voltage and a falling voltage occurring at both ends of a resistor connected between the other transistor and the higher negative power supply voltage, respectively. Then, the presence of an excessive electric current is detected by generating electric currents in accordance with to the falling voltages.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: October 2, 2007
    Assignee: Pioneer Corporation
    Inventors: Akio Ozawa, Kazuyuki Kudo
  • Patent number: 7276969
    Abstract: A transimpedance amplifier circuit includes a first amplifier with an input, an output and a first transconductance. A second amplifier has an input that communicates with the output of the first amplifier, an output and a second transconductance. A first resistance has one end that communicates with the input of the first amplifier. An inverter has an input that communicates with the output of the second amplifier and an output that communicates with an opposite end of the first resistance. A second resistance has one end that communicates with the input of the second amplifier and an opposite end that communicates with the output of the second amplifier. A third resistance has one end that is connected to the output of the second amplifier. A first capacitance has one end that communicates with the one end of the first resistance and an opposite end that communicates with the opposite end of the first resistance.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: October 2, 2007
    Assignee: Marvell International Ltd
    Inventor: Farbod Aram
  • Patent number: 7276970
    Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: October 2, 2007
    Assignee: Broadcom Corporation
    Inventor: Haideh Khorramabadi
  • Patent number: 7276971
    Abstract: A multi-operational amplifier system comprises a plurality of operational amplifiers and a controller to configure the plurality of operational amplifiers. The operational amplifiers may be selectively configured to operate individually or in combination with other of the operational amplifiers. The operational amplifiers may have different common node inputs. In one aspect, the different inputs may be selected from groups of PMOS, N-type NMOS and NZ NMOS inputs. The operational amplifiers may include the different inputs that are arranged as differential pairs.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: October 2, 2007
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Anh Ly, Sang Thanh Nguyen, Vishal Sarin
  • Patent number: 7276972
    Abstract: A distributed amplifier with a simple structure that permits miniaturization of circuit in which the input-side transmission line of the distributed amplifier is constituted by a coplanar line having a signal line and a ground face formed on the upper face of a dielectric substrate and the output-side transmission line of the distributed amplifier is constituted by a microstrip line having a signal line formed on the upper face of the dielectric substrate and a ground face formed on the lower face of the dielectric substrate. In addition, a plurality of amplification transistors is formed on the upper face of the dielectric substrate and each of the electrodes is connected to the signal line or the ground face that is formed on the upper face of the dielectric substrate. Because a large transistor-drive current does not flow to the input-side transmission line, the signal line can be made narrow and there is no increase in the required surface area even in the case of a coplanar line.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: October 2, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Makoto Kosugi, Akira Nishino, Yasunori Ogawa
  • Patent number: 7276973
    Abstract: According to an exemplary embodiment, an amplification module includes a power amplifier configured to receive an RF input signal and provide an RF output signal. The amplification module further includes an autobias control circuit configured to receive and convert the RF output signal to a control signal. The control signal can cause the power amplifier to have a quiescent current that increases substantially linearly in response to an increase in the RF output power of the RF output signal. The autobias control circuit can include a peak detector/log converter circuit coupled to a first input of a differential amplifier, where the differential amplifier outputs the control signal. The autobias control circuit can further include a DC reference circuit coupled to a second input of the differential amplifier. The amplification module further includes an analog bias circuit coupling the control voltage to a bias input of said power amplifier.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: October 2, 2007
    Assignee: Skyworks Solutions, Inc.
    Inventors: David S. Ripley, Paul R. Andrys, Keith Nellis
  • Patent number: 7276974
    Abstract: Method and apparatus are provided for protecting radio frequency (RF) power amplifiers. A circuit (10) is provided for limiting a supply current to a first stage (Q3) of the RF power amplifier having a second stage (Q2) coupled to the first stage. The circuit comprises a comparator (14) having first and second inputs and an output, and a switching circuit (12, 20, 22, 24) having an input coupled to the output of the comparator (14) and having an output configured to couple to the first stage (Q3). The first input of the comparator (14) is configured to receive the supply current, and the second input is configured to receive a current supplied to the second stage (Q2). The comparator (14) is configured to compare a ratio of the supply current to the first stage to the current supplied to the second stage (Q2) with a predetermined value. The switching circuit (12, 20, 22, 24) is configured to limit the supply current to the first stage (Q3) when the ratio exceeds the predetermined value.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: October 2, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: David A. Newman, Benjamin R. Gilsdorf, David S. Peckham
  • Patent number: 7276975
    Abstract: A transistor integrated circuit apparatus generating less noise, having superb RF characteristics, and preventing thermal runaway of transistors is provided. Owing to capacitors C11 through C1n having one end commonly connected to an RF signal input terminal RFin and the other end connected to a base electrode of a corresponding transistor, and inductors L11 through L1n having one end commonly connected to a DC power supply input terminal DCin and the other end connected to a base electrode of a corresponding transistor, RF noise generated in a DC power supply circuit is reduced. This can reduce the RF noise output from the transistors Tr11 through Tr1n. The inductors L11 through L1n prevent an RF signal input from the RF input terminal RFin from flowing toward the DC power supply circuit. This can prevent the RF signal from being lost by the flow thereof toward the DC power supply circuit.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: October 2, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuki Tateoka, Katsushi Tara, Kaname Motoyoshi
  • Patent number: 7276976
    Abstract: Provided is a power amplifier which fits to a deep-submicron technology in radio frequency wireless communication. The power amplifier includes a cascode including a first transistor which receives and amplifies an input signal, and a second transistor which is connected to the first transistor in series and operated by a DC bias voltage; a third transistor which is connected between the cascode and an output end, operated by a dynamic gate bias and outputting a signal; and a voltage divider which includes first and second capacitors that are connected between the output end, i.e. a drain of the third transistor, and a ground in series, and provides the dynamic bias to a gate of the third transistor.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: October 2, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hyoung-Seok Oh, Hyun-Kyu Yu, Mun-Yang Park, Cheon-Soo Kim
  • Patent number: 7276977
    Abstract: Embodiments of the present invention reduce static phase offset in timing loops. In one embodiment, the present invention includes a timing loop comprising first and second phase detectors, wherein during a first time period, the first phase detector is coupled in a closed timing loop and the second phase detector is decoupled from the closed timing loop and calibrated, and during a second time period, the second phase detector is coupled in a closed timing loop and the first phase detector is decoupled from the closed timing loop and calibrated.
    Type: Grant
    Filed: August 9, 2005
    Date of Patent: October 2, 2007
    Inventor: Paul William Ronald Self
  • Patent number: 7276978
    Abstract: The invention is directed to a phase locked loop with a ?? modulator. A multimodulus divider in the feedback path of the PLL is actuated by the ?? modulator. The latter has a design which can be described by a complex transfer function H(s) in the Laplace plane, said transfer function having a complex-conjugate pair of pole points. The arrangement allows a significant reduction in the noise in critical frequency domains and hence allows adherence to transmission masks based on radio specification even when the PLL bandwidth is as large as the modulation bandwidth.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: October 2, 2007
    Assignee: Infineon Technologies AG
    Inventors: Giuseppe Li Puma, Elmar Wagner
  • Patent number: 7276979
    Abstract: A differential type voltage control oscillator is formed of a differential tank circuit, an oscillation transistor, and a differential variable capacitance circuit. The differential variable capacitance circuit has a configuration wherein at least one pair of varactor diodes are connected in an anti-parallel manner, and are separated by means of a plurality of capacitors in a direct current manner. In addition, a differential control voltage is generated by a charge pump circuit which is controlled by the output of a phase comparator, and the differential control voltage is directly applied across the anodes and the cathodes of the varactor diodes.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: October 2, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Ishida, Toshiakira Ando
  • Patent number: 7276981
    Abstract: A three dimensional (3D) microwave monolithic integrated circuit (MMIC) multi-push voltage controlled oscillator (VCO) and methods of making the same is provided. The 3D MMIC multi-push oscillator includes a plurality of matching frequency oscillators coupled to a phasing ring in substantially equidistantly spaced apart locations. A combined VCO output signal is provided at a central output connection point of the phasing ring. The central output connection point resides on a first plane. An output conductor transition has a first end coupled to the central output connection point and a second end provided as an output to the quad-push VCO. The output conductor transition extends transverse to the first plane and terminates at a second plane separated from the first plane. The multi-push oscillator can be a push-push, quad-push or N-push type VCO based on a particular implementation.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: October 2, 2007
    Assignee: Northrop Grumman Corporation
    Inventors: Mark Kintis, Flavia S. Fong, Thomas T. Y. Wong, Xing Lan
  • Patent number: 7276982
    Abstract: A High Frequency Digital Oscillator contains a ring oscillator having an output fn, and having coarse and fine frequency adjustments, wherein the input signal f1 is the input to both the ring oscillator and the High-Frequency Digital Oscillator, which has a multiplicity of output signals including f2, f4, and f8 at one-half, one fourth, and one-eighth the frequency of fn respectively, and wherein an input gating signal causes the oscillator to start or stop, a signal fc=1/4*(f4) causing a coarse frequency adjustment and a signal A=(1/f1?1/fc) making a fine adjustment, and by stopping the new output before the rising edge of f1; and then restarting starting the new output at the rising edge of so that the output and input are synchronized.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: October 2, 2007
    Inventor: Chris Karabatsos
  • Patent number: 7276983
    Abstract: A system and method are disclosed for generating a synthesized signal. A frequency synthesizer is used. The frequency synthesizer includes an input interface configured to receive an input signal having a reference frequency; a phase locked loop (PLL) coupled to the input interface, having a fractional N configuration and comprises a voltage controlled oscillator; wherein the voltage controlled oscillator is configured to generate the synthesized signal; and the voltage controlled oscillator includes an on-chip inductor.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: October 2, 2007
    Assignee: Qualcomm, Incorporated
    Inventors: Beomsup Kim, Cormac S. Conroy
  • Patent number: 7276984
    Abstract: An oscillation circuit includes a constant current source, a current mirror circuit configured to receive a constant input current from the constant current source and to output a current proportional to the constant input current, a first inverter configured to be driven with a quartz resonator to oscillate, an operational amplifier configured to supply power to the first inverter with a voltage equal to an input voltage of the operational amplifier and a second inverter having a power supply terminal connected to the current mirror circuit and to the operational amplifier and configure to generate the input voltage for the operational amplifier.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: October 2, 2007
    Assignee: Ricoh Company, Ltd.
    Inventor: Kohichi Hagino
  • Patent number: 7276985
    Abstract: Provided is a transmission modulation apparatus, using polar modulation of two-point modulation scheme, capable of completing a timing adjustment of a BB phase modulation signal and BB amplitude modulation signal in a short time. A phase modulation section (10) that performs two-point modulation with a PLL circuit is provided with a switch (17) to make the PLL circuit open loop, and when a first delay section (5) corrects the deviation in synchronization between the BB phase modulation signal and BB amplitude modulation signal, the switch (17) is turned off to make the PLL circuit open loop.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: October 2, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shunsuke Hirano
  • Patent number: 7276986
    Abstract: A method for decreasing high-frequency attenuation effects in a flexible cable includes communicatively coupling signal-enhancing circuitry to a signal layer of the flexible cable.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: October 2, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Jeremy I. Wilson, Robert W. Dobbs
  • Patent number: 7276987
    Abstract: A high frequency line-waveguide converter comprises a high frequency line including a dielectric layer, a line conductor disposed on an upper surface of the dielectric layer, and a ground conductor layer disposed on the same surface so as to surround one end of the line conductor, a slot formed in the ground conductor layer so as to be substantially orthogonal to the one end of the line conductor and coupled to the line conductor, a shield conductor part disposed on a side of or in an inside of the dielectric layer so as to surround the one end of the line conductor and the slot, and a waveguide disposed at the lower side of the dielectric layer so that an opening is made opposite to the one end of the line conductor and the slot, and electrically connected to the shield conductor part.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: October 2, 2007
    Assignee: Kyocera Corporation
    Inventor: Shinichi Koriyama
  • Patent number: 7276988
    Abstract: A method and apparatus for coupling a conductor-based transmission line, such as a strip transmission line, to a waveguide. The transmission line may be separated from a corresponding conducting ground plane by a first dielectric substrate layer. The ground plane may be adhesively coupled to a portion of the waveguide, and may be offset from the interior of the waveguide, so that adhesive squeezed out between the ground plane and the waveguide may be at least partially shielded from the waveguide, and thus does not significantly perturb electromagnetic signals within the waveguide.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: October 2, 2007
    Assignee: Endwave Corporation
    Inventor: Edward B. Stoneham
  • Patent number: 7276989
    Abstract: A microwave attenuator circuit is disclosed, including a combination of a plurality of quarter wave transformers and a plurality of resistive elements.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: October 2, 2007
    Assignee: Raytheon Company
    Inventors: Clifton Quan, Stephen M. Schiller, Yanmin Zhang
  • Patent number: 7276990
    Abstract: A switch arrangement comprises a plurality of MEMS switches arranged on a substrate about, and close to, a central point, each MEMS switch being disposed on a common imaginary circle centered on the central point. Additionally, and each MEMS switch is preferably spaced equidistantly along the circumference of the imaginary circle and within one quarter wavelength of the central point for frequencies in the passband of the switch arrangement. Connections are provided for connecting a RF port of each one of the MEMS switches with the central point.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: October 2, 2007
    Assignee: HRL Laboratories, LLC
    Inventor: Daniel F. Sievenpiper
  • Patent number: 7276991
    Abstract: A multiple switch MEMS structure has a higher resistance, higher durability switch arranged in parallel with a lower resistance, less durable switch. By closing the higher resistance, high durability switch before the lower resistance, less durable switch, the lower resistance, less durable switch is protected from voltage transients and arcing which may otherwise damage the lower resistance, less durable switch. By appropriate selection of dimensions and materials, the high resistance, high durability switch may be assured to close first, as well as open first, thereby also protecting the lower resistance, less durable switch from voltage transients upon opening as well as upon closing.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: October 2, 2007
    Assignee: Innovative Micro Technology
    Inventor: Paul J. Rubel
  • Patent number: 7276992
    Abstract: An antenna duplexer includes two surface acoustic wave filters having different center frequencies and a phase matching circuit that matches phases of the two surface acoustic wave filters. A matching line pattern is provided on at least two layers between the two surface acoustic wave filters and transmission and reception terminals, and within an area specified by a sheet-like ground in a multilayered package, the multilayered package comprising multiple layers including a bonding layer on which wire bonding pads are provided for connecting to the two surface acoustic wave filters, and the matching line pattern having no portion provided on bonding layer.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: October 2, 2007
    Assignees: Fujitsu Media Devices Limited, Fujitsu Limited
    Inventors: Yasuhide Iwamoto, Shogo Inoue, Jun Tsutsumi, Masanori Ueda
  • Patent number: 7276993
    Abstract: A circuit topology is configured to flatten out a phase- and amplitude-response over a specified range of frequencies. The circuit topology also provides a large cumulative phase-shift. In one embodiment, the circuit topology cascades a plurality of all-pass sections, with the center-frequencies of each all-pass section staggered to create a substantially flat phase-response over a frequency range. Further, in one embodiment the plurality of all-pass sections has at least one all-pass section that is different from another all-pass section. Each all-pass section includes a tunable capacitor and has a center-frequency that can be varied by electronically tuning the capacitor. Each center frequency is selected to obtain substantially constant amplitude and phase response over a desired frequency range and capacitance tuning range.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: October 2, 2007
    Assignee: Agile RF, Inc.
    Inventor: Robert A. York
  • Patent number: 7276994
    Abstract: A piezoelectric thin-film resonator includes a supporting substrate. A piezoelectric thin-film is formed on the supporting substrate. A lower electrode and an upper electrode are formed with the piezoelectric thin-film therebetween. The stiffness of at least one of the lower and upper electrodes is higher than that of the piezoelectric thin-film.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: October 2, 2007
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masaki Takeuchi, Hajime Yamada, Hideki Kawamura, Daisuke Nakamura, Yukio Yoshino, Yoshihiko Gotoh, Seiichi Arai
  • Patent number: 7276995
    Abstract: A filter includes first and second line patterns each having a length substantially equal to ½ of the wavelength of a pass-band frequency, and a resonator that is interposed between the first and second line patterns and is coupled therewith so that the first and second line patterns have open stubs in which connection points between input/output terminals and the first and second line patterns appear to be short-circuited when viewed from ends of the first and second line patterns.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: October 2, 2007
    Assignee: Eudyna Devices, Inc.
    Inventors: Tomoko Hamada, Hiroshi Nakano
  • Patent number: 7276996
    Abstract: In accordance with the principles of the present invention, a resonator puck is provided with one or more vertical and/or horizontal, radial slits that improve the quality factor, Q, of circuits constructed from the resonators. In some embodiments of the invention, the surfaces of the resonators that define the slit are left relatively rough and may even contact each other such that the slit is not of uniform thickness, but essentially comprises a plurality of pockets between the two portions of the resonator.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: October 2, 2007
    Assignee: M/A-Com, Inc.
    Inventors: Kristi Dhimiter Pance, Eswarappa Channabasappa
  • Patent number: 7276997
    Abstract: An apparatus for magnetic resonance imaging having a magnetic assembly with a main magnet, a shielding system positioned outside the main magnet, and a first and second space for positioning the imaged and non-imaged extremity. Various apparatus with distinct vessels and casings are described with a magnetic assembly and ferromagnetic shielding systems. In yet a further aspect, an apparatus for resonance imaging having additional shim elements for compensating effects from non-axisymmetrical shape of ferromagnetic shielding casing is disclosed. Additionally, an apparatus for magnetic resonance imaging is described having a dedicated space outside the imaging region and where the dedicated space has support element for resting non-image extremity as part of the structure of the imager.
    Type: Grant
    Filed: January 29, 2005
    Date of Patent: October 2, 2007
    Assignee: General Electric
    Inventors: Yuri Lvovsky, Rory John Warner
  • Patent number: 7276998
    Abstract: An encapsulatable package for a magnetic device that includes a magnetic core. In one embodiment, the encapsulatable package for the magnetic device also includes a shielding structure located about the magnetic core configured to create a chamber thereabout. The shielding structure is configured to limit an encapsulant entering the chamber.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: October 2, 2007
    Assignee: Enpirion, Inc.
    Inventors: Ashraf W. Lotfi, Mathew Wilkowski, John D. Weld
  • Patent number: 7276999
    Abstract: An energy transfer element having windings. In one aspect, the energy transfer element includes a first winding wound around a core, the first winding has a first end and a second end. A second winding is wound around the core. The second winding has a first end and a second end. The first winding is capacitively coupled to the second winding to provide a transfer of energy from the first winding to the second winding. A third winding is wound around the core. The third winding has a first end and a second end. The first end of the third winding is electrically coupled to the first end of the second winding. The second end of the third winding is uncoupled such that an influence of an electrostatic field to be produced by the first and second windings relative to the core are to be cancelled by an electrostatic field to be created by the third winding.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: October 2, 2007
    Assignee: Power Integrations, Inc.
    Inventors: Arthur B. Odell, Chan Woong Park
  • Patent number: 7277000
    Abstract: In an inductor having a core and first and second coils wound upon the core, the wire of the first coil and the wire of the second coil lie are wound so as to lie parallel to each other and contact the core. The winding starting position of the first coil is made to coincide with the winding starting position of the second coil along the axial direction of the core and is offset from the winding starting position of the second coil along the winding direction of the core. As a result, the area factor of the coils in the winding area of the inductor can be improved and the size of the inductor reduced.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: October 2, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masaki Suzui, Fumitaka Toyomura
  • Patent number: 7277001
    Abstract: A coil-embedded dust core of the present invention is provided with a molded coil component including a coil main body having a structure in which a flat type conductor wire is wound edgewise, one end side terminal portion disposed by being lead in the thickness direction of the coil main body, the other end side terminal portion, one end side leading electrode portion disposed by extending the one end side terminal portion, and the other end side leading electrode portion disposed by extending the other end side terminal portion; and a dust core composed of a soft magnetic alloy powder disposed covering the coil main body, the one end side terminal portion, and the other end side terminal portion of the molded coil component.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: October 2, 2007
    Assignee: Alps Electric Co., Ltd.
    Inventors: Takao Mizushima, Yutaka Naito, Kazuo Aoki, Hidetaka Kemmotsu, Satoshi Watabe
  • Patent number: 7277002
    Abstract: The present invention relates to transformer inductor devices and to the methods of construction for inductive components such as inductors, chokes, and transformers. Plural via holes 12 are formed through a ferromagnetic substrate 10. Primary 32 and secondary 34 conductors are placed through common vias to form a plurality of cell transformers have a 1:1 turns ratio. Circuits connect these primary and secondary winding in parallel and serial combustion to provide a transformer having the desired turns ratio.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: October 2, 2007
    Assignee: Multi-Fineline Electronix, inc.
    Inventor: Philip A. Harding
  • Patent number: 7277003
    Abstract: An electrostatic discharge protection component of an array type includes ceramic insulating substrate 12; varistor region 10 which is pasted on ceramic insulating substrate 12 and then is sintered integrally with ceramic insulating substrate 12; and at least one ground outer electrode 15A and a plurality of input/output outer electrodes 15B. Varistor region 10 includes at least one ground inner electrode 14A, varistor layer 10C and the plurality of input/output outer electrodes 15B so as to form the plurality of varistors. Ground inner electrode 14A is connected with ground outer electrode 15A. This structure enables the protection component to be extremely thin.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: October 2, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tatsuya Inoue, Hidenori Katsumura, Hiroshi Kagata
  • Patent number: 7277004
    Abstract: A system and method for a bi-directional deflectable resistor. The bi-directional deflectable resistor has a first layer of conductive material on a top surface of a substrate and a second layer of conductive material on a bottom surface of a substrate, each layer having a resistance that changes predictably when an electrical signal is applied thereto. The change of resistance of either the first layer of conductive material or the second layer of conductive material reflects an amount of deflection of the respective layer. Having two layers of conductive material allows for the measurement of deflection in all directions.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: October 2, 2007
    Assignee: Sensitron, Inc.
    Inventors: David B. Beck, John A. Sindt, Thomas E. Danielson
  • Patent number: 7277005
    Abstract: Disclosed is a PCB including an embedded resistor and a method of fabricating the same. The PCB includes a plurality of circuit layers in which circuit patterns are formed. A plurality of insulating layers is each interposed between the circuit layers. The embedded resistor is made of a resistive material and received in a receiving hole formed in the plurality of circuit layers and the plurality of insulating layers such that walls defining the receiving hole extends from one of the circuit layers to another circuit layer. The receiving hole has a closed section, and a conductive material is plated on the opposite walls of the walls defining the receiving hole.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: October 2, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Myung Sam Kang, Chang Sup Ryu, Jong Kuk Hong
  • Patent number: 7277006
    Abstract: Chip resistor includes the rectangular first substrate made of ceramics and having surfaces, the rectangular second substrate made of ceramics and having surfaces, and a joint layer interposed between the surfaces, and electrodes are formed on two opposing sides of the substrate and resistor is formed between the electrodes. Further, electrodes are formed on two opposing sides of the substrate and resistor is formed between the electrodes.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: October 2, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideo Yokoo
  • Patent number: 7277007
    Abstract: An automotive keyless smart-start assembly 10 for use in an automobile 22 is provided including an automotive engine 18 having an operating condition and a stopped condition. An ignition controller 16, having a locked state and an unlocked state, is in communication with the automotive engine 18. A receptacle bin 20 is mounted to the automobile 22 and is in communication with the ignition controller 16. The receptacle bin 20 is movable between a closed position 34 and an open position 32. A portable electronic transmitter element 12, including a security code 14, communicates the security code 14 to the ignition controller 16 upon being positioned within the receptacle bin 20. The ignition controller 16 verifies the security code 14 and moves to the unlocked state upon verification. The receptacle bin 20 moves to the closed position 34 upon verification.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: October 2, 2007
    Assignee: Lear Corporation
    Inventors: Nantz John, Tom Tang, Riad Ghabra, Ronald King, Thomas LeMense, Mike Fawaz, David Hein
  • Patent number: 7277008
    Abstract: A sensor unit for recording the direction of rotation of a wheel is embodied to record a variable that is characteristic for a direction of flow of an air stream in a tire of the wheel. To determine a side of a vehicle on which a wheel is disposed, a variable is recorded which is characteristic for a direction of flow of an air stream in a tire of the wheel. Further a direction of movement and an acceleration of the vehicle is recorded. The side of the vehicle is determined depending on the variable, the direction of movement of the vehicle and the acceleration of the vehicle.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: October 2, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventor: Herbert Froitzheim
  • Patent number: 7277009
    Abstract: A security apparatus is disclosed which provides for a cargo asset monitoring and tracking capability. The security apparatus may contain a physical locking function which provides a physical deterrent to an attached item such as a shipping drum. A microcontroller is provided within the security apparatus which monitors and coordinates locking/unlocking functions of the security apparatus, monitors an associated sensor to detect alarm conditions, monitors information from an RF transceiver with respect to proximity alerts and monitors information from one or more sensors incorporated within the security apparatus, the sensors providing information which may indicate tampering or damage to the cargo. The security apparatus is able to provide an audible alarm as well as communicate with a remote monitoring station upon detection of an alarm condition. A tracking system and process of monitoring and controlling the security apparatus from a remote location are also disclosed.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: October 2, 2007
    Assignee: Services LLC
    Inventors: Larry L. Hall, Duane S. Schmoker
  • Patent number: 7277010
    Abstract: Monitoring apparatus and method including a processor, associated with a web site and capable of providing audio and video, which receives audio information recorded or obtained at a vehicle or premises. The processor, located remote from the vehicle or premises, receives a signal from a device located remote from the processor and the vehicle or premises. The audio information is transmitted to the device over the Internet and/or World Wide Web in response to the signal. Monitoring apparatus and method including a processor, associated with a web site, which receives video information recorded or obtained at a vehicle or premises. The processor, located remote from the vehicle or premises, receives a signal transmitted from a device located remote from the processor and the vehicle or premises. The video information is transmitted to the device on or over the Internet and/or World Wide Web in response to the signal.
    Type: Grant
    Filed: October 3, 2002
    Date of Patent: October 2, 2007
    Inventor: Raymond Anthony Joao