Abstract: A PCM cell structure comprises a first electrode, a phase change element, and a second electrode, wherein the phase change element is inserted in between the first electrode and the second electrode and only the peripheral edge of one of the first and second electrodes contacts the phase change element thereby reducing the contact area between the phase change element and one of the electrodes thereby increasing the current density through the phase change element and effectively inducing the phase change at a first programming power.

Abstract: A switching device includes at least one bottom electrode and at least one top electrode. The top electrode crosses the bottom electrode at a non-zero angle, thereby forming a junction. A metal oxide layer is established on at least one of the bottom electrode or the top electrode. A molecular layer including a monolayer of organic molecules and a source of water molecules is established in the junction. Upon introduction of a forward bias, the molecular layer facilitates a redox reaction between the electrodes, thereby reducing a tunneling gap between the electrodes.

Abstract: There is provided: a semiconductor film formed on a base material, containing a group 13 element, nitrogen, and oxygen in an amount of about 15 atomic % or more; a manufacturing method thereof; a light receiving element using the semiconductor film; an electrophotographic photoreceptor; a process cartridge; and an image forming device.

Abstract: A transistor-like electronic device operates somewhat as a triode vacuum tube. Two electrodes (source and drain) sandwich an intermediate layer of organic semiconductor material in which fine metallic particles are dispersed. Due to the fineness and number of the particles, they are close enough to each other that electrons can tunnel from one to the nest, so that a voltage impressed at the edge of the intermediate layer causes current to flow through the dispersed particles, and causes the entire layer to reach the impressed voltage. By varying the impressed voltage, the voltage of the intermediate layer is caused to vary, which controls conduction between the source and drain. By making the particles small, the proportion of open area between the particles remains large so the electrons have room to move around the particles and through the organic material in intermediate layer, allowing high currents to flow through the device.

Abstract: A method of forming an electrical interconnect, which includes a first electrode, an interlayer of a programmable material disposed over at least a portion of the first electrode, and a second electrode disposed over the programmable material at a non-zero angle relative to the first electrode. The interlayer includes a modified region having differing electrical properties than the rest of the interlayer, sandwiched at the junction of the first electrode and the second electrode. The interlayer may be exposed to a focused beam to form the modified region.

Abstract: A radiation-emitting device includes a nanowire that is structurally and electrically coupled to a first electrode and a second electrode. The nanowire includes a double-heterostructure semiconductor device configured to emit electromagnetic radiation when a voltage is applied between the electrodes. A device includes a nanowire having an active longitudinal segment selectively disposed at a predetermined location within a resonant cavity that is configured to resonate at least one wavelength of electromagnetic radiation emitted by the segment within a range extending from about 300 nanometers to about 2,000 nanometers. Active nanoparticles are precisely positioned in resonant cavities by growing segments of nanowires at known growth rates for selected amounts of time.

Abstract: A light emitting apparatus includes a substrate, a first metal layer, at least one light emitting device and a protective layer for covering the light emitting device. The first metal layer is disposed on the substrate and includes a structure for increasing the light emitting efficiency. The light emitting device is disposed at a predetermined position of the first metal layer and on the substrate. The light emitting device emits a light and the light is then reflected and concentrated to project out by the structure of the first metal layer. Thus, the light emitting efficiency is improved.

Abstract: A semiconductor detector has a tunable spectral response. These detectors may be used with processing techniques that permit the creation of “synthetic” sensors that have spectral responses that are beyond the spectral responses attainable by the underlying detectors. For example, the processing techniques may permit continuous and independent tuning of both the center wavelength and the spectral resolution of the synthesized spectral response. Other processing techniques can also generate responses that are matched to specific target signatures.

Abstract: A nitride semiconductor light-emitting device according to the present invention comprises a first nitride semiconductor layer; an active layer formed on the first nitride semiconductor layer; a second nitride semiconductor layer formed on the active layer; and a third nitride semiconductor layer having AlIn, which is formed on the second nitride semiconductor layer. And a nitride semiconductor light-emitting device comprises a first nitride semiconductor layer; an n-AlInN cladding layer formed on the first nitride semiconductor layer; an n-InGaN layer formed on the n-AlInN cladding layer; an active layer formed on the n-InGaN layer; a p-InGaN layer formed on the active layer; a p-AlInN cladding layer formed on the p-InGaN layer; and a second nitride semiconductor layer formed on the p-AlInN cladding layer.

Abstract: A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest width of less than 500 nanometers. Such a semiconductor may comprise an interior core comprising a first semiconductor; and an exterior shell comprising a different material than the first semiconductor. Such a semiconductor may be elongated and may have, at any point along a longitudinal section of such a semiconductor, a ratio of the length of the section to a longest width is greater than 4:1, or greater than 10:1, or greater than 100:1, or even greater than 1000:1.

Abstract: A non-volatile ferroelectric memory device is proposed which comprises a combination of an organic ferroelectric polymer with an organic ambipolar semiconductor. The devices of the present invention are compatible with—and fully exploit the benefits of polymers, i.e. solution processing, low-cost, low temperature layer deposition and compatibility with flexible substrates.

Abstract: An electronic device comprising a semiconductive material containing a polyacene of Formula (I) wherein R is a suitable hydrocarbon, a halogen, or a heteroatom containing group; each R? and R? are independently a suitable hydrocarbon, a heteroatom containing group, or a halogen; x and y each represent the number of groups; a and b each independently represent the number of groups; and n represents the number of repeating units.

Abstract: A polymer comprising an optionally substituted first repeal unit off formula (1): wherein F is a divalent residue; each Gin each occurrence is independently a divalent residue; r is at least 1; each p is independently 0 or 1 and each corresponding q is the other of 0 or 1: and G comprises a het-eroatom in the case where n is 1.

Abstract: The present invention relates to heterocyclic radicals or diradicals, the dimers, oligomers, polymers, dispiro compounds and polycycles thereof, to the use thereof to organic semiconductive materials and to electronic and optoelectronic components.

Abstract: A fluoranthene compound has 6 fused rings. An organic light-emitting element uses the fluoranthene compound.

Abstract: A method of manufacturing a thin film transistor (“TFT”) array panel includes forming a first conductive layer, gate insulating layer, and first insulating layer on a substrate, patterning the first insulating layer to form a first insulating pattern including an opening, etching the gate insulating layer and first conductive layer to form a gate insulating member and a gate line, forming an organic semiconductor in the opening, forming a passivation layer and a second insulating pattern thereon, patterning the second insulating layer to form a second insulating pattern, etching the passivation layer, depositing a second conductive layer thereon, forming a pixel electrode by removing the second insulating pattern and the second conductive layer deposited on the second insulating pattern, and forming a drain electrode and a data line by depositing and patterning a third conductive layer on the resultant structure.

Abstract: An example memory includes an address control portion, a protection film, a property deterioration material layer, data storage areas, and bonding pads. The protection film protects an organic semiconductor layer of a semiconductor circuit and prevents intrusion of moisture or chemical molecules in the air, light, or the like, into the organic semiconductor layer. Deterioration of the organic semiconductor layer is started by breaking the protection film and using a specified means, thus starting operation of the lifetime period. The property deterioration material layer contains a material for deteriorating the property of the organic semiconductor and deterioration of the organic semiconductor layer is started, for example, by diffusing the material into the organic semiconductor layer.

Abstract: By appropriately orienting the channel length direction with respect to the crystallographic characteristics of the silicon layer, the stress-inducing effects of strained silicon/carbon material may be significantly enhanced compared to conventional techniques. In one illustrative embodiment, the channel may be oriented along the <100> direction for a (100) surface orientation, thereby providing an electron mobility increase of approximately a factor of four.

Abstract: An image display device of reduced cost is provided. A plurality of gate lines, a plurality of signal lines formed to cross the gate lines in a matrix fashion, and a plurality of thin-film transistors are formed on an insulating substrate, and the plurality of gate lines are laminated electrodes. The plurality of thin-film transistors are configured of transistors of two types of an n-channel conductivity type and a p-channel conductivity type. Gate electrodes of thin-film transistors of one type are laminated electrodes of the same configuration as the gate lines, and gate electrodes of thin-film transistors of the other type are configured of electrodes of the same layer as bottom electrodes of the gate lines.

Abstract: The present invention provides a liquid crystal display having a plurality of gate lines, a plurality of source lines, a plurality of pixel electrodes provided in a matrix form, first TFTs having a first gate electrode connected to a gate line, a first source electrode connected to a source line and a first drain electrode connected to a pixel electrode for each pixel electrode, and second TFTs having a second gate electrode, a second source electrode and a second drain electrode for each pixel electrode. Second TFT does not have a portion which overlaps with at least one of gate line and pixel electrode in a plane, and second gate electrode and gate line and/or second drain electrode and pixel electrode are not electrically connected.

Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3)·y(In2O3)·z(ZnO)??Formula 1 wherein, about 0.75?x/z?about 3.15, and about 0.55?y/z?about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.

Abstract: An exemplary TFT substrate (300) includes a substrate (310), a silicon layer (320), a insulating layer (330, 340), and a metal layer (350), the metal layer, the insulating layer, the silicon layer being formed on the substrate in that order from top to bottom. The insulating layer comprises a first insulating layer (330) and a second insulating (340), the second insulating layer covering part of the first insulating layer.

Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device comprising an insulated gate field effect transistor provided with a region having added thereto an element at least one selected from the group consisting of carbon, nitrogen, and oxygen, said region having established at either or both of the vicinity of the boundary between the drain and the semiconductor layer under the gate electrode and the vicinity of the boundary between the source and the semiconductor layer under the gate electrode for example by ion implantation using a mask. It is free from the problems of reverse leakage between the source and the drain, and of throw leakage which occurs even at a voltage below the threshold ascribed to the low voltage resistance between the source and the drain.

Abstract: A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.

Abstract: A polysilicon thin film transistor device includes a gate metal pattern including a gate electrode and a gate line formed on a substrate, the gate metal pattern having a stepped portion, a gate insulating film formed on the gate metal pattern, a polysilicon semiconductor layer formed on the gate insulating film, the polysilicon semiconductor layer including an active region, lightly doped drain regions, a source region, and a drain region, a source electrode connected to the source region and a drain electrode connected to the drain region on the polysilicon semiconductor layer, and a pixel electrode connected with the drain electrode.

Abstract: An electro-optical device includes a thin-film transistor in each of a plurality of pixel regions on an element substrate, the thin film transistor including a gate electrode, a gate insulating layer disposed above the gate electrode, and a semiconductor layer disposed above the gate insulating layer, a pixel electrode that is electrically connected to a drain region of the thin-film transistor, and a storage capacitor including a lower electrode and an upper electrode, the lower electrode and the upper electrode facing each other, the gate insulating layer being disposed between the lower electrode and the upper electrode. The gate insulating layer including a lower gate insulating layer having one or a plurality of insulating films, and an upper gate insulating layer having one or a plurality of insulating films.

Abstract: In a conventional analog buffer circuit composed of polycrystalline semiconductor TFTs, a variation in the output is large. Thus, a measure such as to provide a correction circuit has been taken. However, there has been such a problem that a circuit and driver operation are complicated. Therefore, a gate length and a gate width of a TFT composing an analog buffer circuit is set to be larger. Also, a multi-gate structure is adopted thereto. In addition, the arrangement of channel regions is devised. Thus, the analog buffer circuit having a small variation is obtained without using a correction circuit, and a semiconductor device having a small variation can be provided.

Abstract: The present invention relates to a semiconductor chip manufacturing method in which a semiconductor thin film can be cut in a relatively short time and the cut surface can be relatively smoothly formed. When an Si substrate having a diamond thin film formed on the surface thereof is cut in the chip form, a modified region based on multiphoton absorption is formed as a cutting starting point region formed along a cutting planned line by irradiating at least the Si substrate with a laser beam whose condense point is focused to the inside of the Si substrate, along the cutting planned line. The diamond thin film is cut in connection with the cutting of the Si substrate along the cutting starting point region defined by the modified region.

Abstract: A multi-layer composite electrode for a light-emitting device, comprising: a transparent, conductive layer; a reflective, conductive layer in electrical contact with the transparent, conductive layer; and a light-scattering layer formed between the transparent, conductive layer and the reflective, conductive layer over only a first portion of the transparent, conductive layer, wherein the light-scattering layer is relatively less conductive than the reflective, conductive layer and the reflective, conductive layer is in electrical contact with the transparent, conductive layer over a second portion of the transparent, conductive layer where the light-scattering layer is not formed. Also disclosed is a method of making such a multi-layer composite electrode in a light emitting device, and an organic light-emitting diode (OLED) device comprising such a composite electrode.

Abstract: A composite semiconductor device includes a semiconductor thin film, a substrate, connection pads, and a light blocking layer. The semiconductor thin film includes light emitting elements. The driver circuits are formed on the substrate and the semiconductor thin film is fixed on the substrate, the driver circuit driving the light emitting element. The connection pads are formed on the substrate, electrical connection being made through which the connection pads. The light blocking layer is formed in an area between the light emitting element and the connection pad, the light blocking layer. The light blocking layer prevents light emitted from the light emitting element from reaching wires connected to the connection pad.

Abstract: A light emitting apparatus includes a substrate, a first metal layer, an insulating layer and at least one light emitting device. The first metal layer is disposed on the substrate. The insulating layer is disposed on the first metal layer. The light emitting device is disposed on the insulating layer.

Abstract: A semiconductor light-emitting device has a first conductivity type semiconductor layer, a luminous layer formed on the first conductivity type semiconductor layer, a second conductivity type semiconductor layer formed on the luminous layer, and a transmissive semiconductor layer formed on the second conductivity type semiconductor layer. The transmissive semiconductor layer is pervious to light coming from the luminous layer. The second conductivity type semiconductor layer and the transmissive semiconductor layer have different carrier concentrations, and the carrier concentration of the second conductivity type semiconductor layer is higher than the carrier concentration of the transmissive semiconductor layer.

Abstract: A light emitting apparatus includes a substrate, an insulating layer and at least one light emitting device. The insulating layer is disposed over the substrate and has a patterned area exposing at least a portion of the substrate. The light emitting device is disposed over the substrate and is located in the patterned area.

Abstract: The present invention relates to a light emitting device for preventing a cross-talk phenomenon and a pectinated pattern. The light emitting device includes data lines, scan lines, pixels and a discharging circuit. The data lines are disposed in a first direction, and the scan lines are disposed in a second direction different from the first direction. The pixels are formed in cross areas of the data lines and the scan lines. The discharging circuit discharges at least one data line to a first discharge voltage during a first sub-discharging time of a discharging time, and changes the first discharge voltage into a second discharge voltage during a second sub-discharging time of the discharging time. The light emitting device discharges data lines to discharge voltages corresponding to cathode voltage of pixels, and so cross-talk phenomenon and pectinated pattern is not occurred in the light emitting device.

Abstract: An LED assembly may include a substrate, an elongate mounting structure that is formed in or on the substrate, and an LED that is mechanically secured to the elongate mounting structure. A light producing apparatus may include a substrate, an elongate mounting structure that may be formed in or on the substrate, and a plurality of LEDs that may be removably secured to the elongate mounting structure. A light producing array may include a substrate, a first elongate mounting structure that is formed in or on the substrate, and a second elongate mounting structure that is formed in or on the substrate. A first plurality of LEDs may be removably secured to the first elongate mounting structure. A second plurality of LEDs may be removably secured to the second elongate mounting structure.

Abstract: To provide a light-emitting device using a nitride semiconductor which can attain high-power light emission by highly efficient light emission and a manufacturing method thereof, the light-emitting device includes a GaN substrate and a light-emitting layer including an InAlGaN quaternary alloy on a side of a first main surface of GaN substrate.

Abstract: A light source that has improved light mixing. The light source uses a nanolens layer in conjunction with an LED light source to enhance the mixing of the colored light emitting from the LED light source.

Abstract: A method of fabricating an optoelectronic device, comprising growing an active layer of the device on an oblique surface of a suitable material, wherein the oblique surface comprises a facetted surface. The present invention also discloses a method of fabricating the facetted surfaces. One fabrication process comprises growing an epitaxial layer on a suitable material, etching the epitaxial layer through a mask to form the facets having a specific crystal orientation, and depositing one or more active layers on the facets. Another method comprises growing a layer of material using a lateral overgrowth technique to produce a facetted surface, and depositing one or more active layers on the facetted surfaces. The facetted surfaces are typically semipolar planes.

Abstract: A light emitting device having a vertical structure, which includes a semiconductor layer having a first surface and a second surface, a first electrode arranged on the first surface of the semiconductor layer, a transparent conductive oxide (TCO) layer arranged on the second surface of the semiconductor layer and a second electrode arranged on the TCO layer.

Abstract: A light emitting apparatus includes a substrate, at least one light emitting device and a protective layer. The substrate has a surface formed with a structure for increasing light emitting efficiency. The light emitting device is disposed on a predetermined position of the substrate. The light emitting device emits lights and the lights are reflected and concentrated to project out by the structure of the substrate. Thus, the light emitting efficiency is improved.

Abstract: A surface mounting optoelectronic device is provided. The surface mounting optoelectronic device comprises a circuit board, a conductive layer, an auto-focus LED chip, a flash LED chip, a reflector and an encapsulant. The auto-focus LED chip and the flash LED chip are located on the conductive layer. The reflector is located on the edge of the circuit board. The encapsulant is filled into the reflector to hermetically seal the auto-focus LED chip and the flash LED chip.

Abstract: An electrostatic discharge protection element and a protection resistor, which are formed on an N-drain region with a field oxide film interposed therebetween for the purpose of preventing electrical breakdown of a field effect transistor, are composed as a stacked bidirectional Zener diode of one or a plurality of N+ polycrystalline silicon regions of a first layer and a P+ polycrystalline silicon region of a second layer, and a stacked resistor of one or a plurality of N+ resistor layers of the first layer and an N+ resistor layer of the second layer, respectively. One end of the plurality of N+ polycrystalline silicon regions of the first layer is connected to an external gate electrode terminal, and the other end is connected to a source electrode. One end of the plurality of N+ resistor layers of the first layer is connected to a gate electrode, and the other end is connected to the external gate electrode terminal.

Abstract: The present invention provides an electric circuit device in which it is possible to achieve simultaneously the improvement of cooling performance and reduction in operating loss due to line inductance. The above object can be attained by constructing multiple plate-like conductors so that each of these conductors electrically connected to multiple semiconductor chips is also thermally connected to both chip surfaces of each such semiconductor chip to release heat from the chip surfaces of each semiconductor chip, and so that among the above conductors, a DC positive-polarity plate-like conductor and a DC negative-polarity plate-like conductor are opposed to each other at the respective conductor surfaces.

Abstract: An electrostatic discharge protection device for an optical drive is a circuit on a printed circuit board, which is disposed between a tray and a panel of the optical drive and attached to a front end surface of the tray. The panel has a button, an indicator hole and an emergency ejecting hole. The electrostatic discharge protection device includes a push switch circuit enabled by the button to make the optical drive eject a disk, a light-emitting diode circuit, and at least one bare wire, which is formed on a grounding bare circuit on the printed circuit board and disposed near the push switch circuit, the light-emitting diode circuit and the emergency ejecting hole. A metallic bottom plate contacting the bare wire covers a backside of the tray, and is connected to a main circuit board through a flexible cable to form a grounding path for discharging electrostatic charges.

Abstract: As semiconductor regions in contact with a first main surface of a semiconductor base composed by forming an N? silicon carbide epitaxial layer on an N+ silicon carbide substrate connected to a cathode electrode, there are provided both of an N+ polycrystalline silicon layer of a same conduction type as a conduction type of the semiconductor base and a P+ polycrystalline silicon layer of a conduction type different from the conduction type of the semiconductor base. Both of the N+ polycrystalline silicon layer and the P+ polycrystalline silicon layer are hetero-joined to the semiconductor base, and are ohmically connected to the anode electrode.

Abstract: A semiconductor device, includes: 1) a semiconductor base having a first face; 2) a hetero semiconductor region configured to contact the first face of the semiconductor base and different from the semiconductor base in band gap, the semiconductor base and the hetero semiconductor region defining therebetween a junction part in the hetero semiconductor region, a concentration of an impurity introduced in at least a first certain region including the junction part being less than or equal to a solid solution limit to a semiconductor material included in the hetero semiconductor region; 3) a gate electrode formed, via a gate insulation film, in a certain position adjacent to the junction part; 4) a source electrode configured to be connected to the hetero semiconductor region; and 5) a drain electrode configured to be connected to the semiconductor base.

Abstract: A semiconductor device is provided with: a semiconductor substrate of a predetermined electroconduction type; a hetero semiconductor region contacted with a first main surface of the semiconductor substrate and comprising a semiconductor material having a bandgap different from that of the semiconductor substrate; a gate electrode formed through a gate insulator layer at a position adjacent to a junction region between the hetero semiconductor region and the semiconductor substrate; a source electrode connected to the hetero semiconductor region; and a drain electrode connected to the semiconductor substrate; wherein the hetero semiconductor region includes a contact portion contacted with the source electrode, at least a partial region of the contact portion is of the same electroconduction type as the electroconduction type of the semiconductor substrate, and the partial region has an impurity concentration higher than an impurity concentration of at least that partial region of a gate-electrode facing port

Abstract: After a polycrystalline silicon as a hetero-semiconductor region forming a heterojunction with a semiconductor base is formed on an epitaxial layer configuring the semiconductor base, the unevenness on the surface of the polycrystalline silicon is planarized before a gate insulating film is formed. Alternatively, as the hetero-semiconductor region, amorphous or microcrystal hetero-semiconductor of which crystal grain diameter is small is used. When an amorphous or microcrystal hetero-semiconductor is deposited as the hetero-semiconductor region, a recrystallization annealing process of transforming into the polycrystalline silicon can be applied after the deposition. As a material of the semiconductor base, silicon carbide, gallium nitride or diamond can be used. As a material of the hetero-semiconductor region, silicon, silicon germanium, germanium, or gallium arsenide can be used.

Abstract: The invention includes floating body transistor constructions containing U-shaped semiconductor material slices. The U-shapes have a pair of prongs joined to a central portion. Each of the prongs contains a source/drain region of a pair of gatedly-coupled source/drain regions, and the floating bodies of the transistors are within the central portions. The semiconductor material slices can be between front gates and back gates. The floating body transistor constructions can be incorporated into memory arrays, which in turn can be incorporated into electronic systems. The invention also includes methods of forming floating body transistor constructions, and methods of incorporating floating body transistor constructions into memory arrays.

Abstract: A field effect transistor for detecting ionic material and a method of detecting ionic material using the field effect transistor. The field effect transistor for detecting ionic material includes a substrate formed of a semiconductor material, a source region and a drain region spaced apart from each other in the substrate and doped with an opposite conductivity type to that of the substrate, a channel region interposed between the source region and the drain region, an insulating layer disposed on the channel region and formed of an electrically insulating material, a first reference electrode disposed at an edge of the upper portion of the insulating layer and a second reference electrode disposed to be spaced apart from the insulating layer.