Patents Issued in December 18, 2007
  • Patent number: 7309898
    Abstract: A method and apparatus for improving the latchup tolerance of circuits embedded in an integrated circuit while avoiding the introduction of noise from such tolerance into the power rails.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: December 18, 2007
    Assignee: International Business Machines Corporation
    Inventors: Raminderpal Singh, Steven Howard Voldman
  • Patent number: 7309899
    Abstract: A semiconductor device includes a semiconductor substrate, a gate insulating layer, a gate electrode structure and a side wall structure. The gate insulating layer is formed on the semiconductor substrate. The gate electrode structure is formed on the gate insulating layer, and includes a lower gate electrode layer and a cap gate layer. The side wall structure includes a nitride side wall spacer, and an oxide layer formed between the semiconductor substrate and the nitride side wall spacer and between the lower gate electrode layer and the nitride side wall spacer. A thickness of the oxide layer is greater than a thickness of the gate insulating layer, so as to prevent diffusion of nitrogen from the nitride side wall spacer to the semiconductor substrate. A height of the gate electrode structure is substantially equal to a height of the side wall structure after completion of the semiconductor device.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: December 18, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Masahiro Yoshida, Shunichi Tokitoh
  • Patent number: 7309900
    Abstract: There is provided a thin-film transistor that is formed on an insulating substrate, is capable of a high-speed operation, has small non-uniformity among devices, is hardly susceptible to device destruction due to high voltage, and is free from the effect of a parasitic transistor that forms at an edge part of an Si island. The thin-film semiconductor device is formed using a thin-film semiconductor provided on the insulating substrate and includes a gate region for formation of a channel region through which a drain current flows. The gate region has a ring shape in plan on the insulating substrate. High concentration impurity-doped regions are dividedly provided on an inside and an outside of the ring-shaped gate region, and the channel region is formed of a plurality of fan-shaped semiconductor single-crystal portions.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: December 18, 2007
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Fumiki Nakano, Genshiro Kawachi, Yoshiaki Nakazaki, Shinzo Tsuboi, Takahiko Endo, Tomoya Kato
  • Patent number: 7309901
    Abstract: A semiconductor structure and method for forming the same. The semiconductor structure comprises a field effect transistor (FET) having a channel region disposed between first and second source/drain (S/D) extension regions which are in turn in direct physical contact with first and second S/D regions, respective. First and second silicide regions are formed such that the first silicide region is in direct physical contact with the first S/D region and the first S/D extension region, whereas the second silicide region is in direct physical contact with the second S/D region and the second S/D extension region. The first silicide region is thinner for regions in contact with first S/D extension region than for regions in contact with the first S/D region. Similarly, the second silicide region is thinner for regions in contact with second S/D extension region than for regions in contact with the second S/D region.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: December 18, 2007
    Assignee: International Business Machines Corporation
    Inventors: Xiangdong Chen, Sunfei Fang, Zhijiong Luo, Haining Yang, Huilong Zhu
  • Patent number: 7309902
    Abstract: One embodiment of a microelectronic device includes a movable plate including a lower surface, a bump positioned on the lower surface, and an anti-stiction coating positioned only on the bump.
    Type: Grant
    Filed: November 26, 2004
    Date of Patent: December 18, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Paul F. Reboa
  • Patent number: 7309903
    Abstract: A pin junction element (10) includes a ferromagnetic p-type semiconductor layer (11) and a n-type semiconductor layer (12) which are connected via an insulating layer (13), and which shows a tunneling magnetic resistance according to the magnetization of the ferromagnetic p-type semiconductor layer (11) and the magnetization of the ferromagnetic n-type semiconductor layer (12). In this pin junction element (10), an empty layer is formed with an applied bias, thereby generating tunnel current via an empty layer. As a result, it is possible to generate tunnel current even when adopting a thicker insulating layer than that of the conventional tunnel magnetic resistance element.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: December 18, 2007
    Assignee: Japan Science and Technology Agency
    Inventors: Hidekazu Tanaka, Tomoji Kawai
  • Patent number: 7309904
    Abstract: A semiconductor device, comprising a semiconductor chip; a pad electrode; an electrode portion; a wiring portion. An insulating portion is formed from electrically insulating material, covering the surface of the semiconductor chip and sealing the sensor element, wiring portion and electrode portion, in a state which exposes at least the electrode portion on the surface of the semiconductor chip. The electrode portion is placed in a position which does not overlap with the sensor element in the thickness direction of the semiconductor chip.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: December 18, 2007
    Assignee: Yamaha Corporation
    Inventors: Hiroshi Naito, Hideki Sato
  • Patent number: 7309905
    Abstract: A system and method is disclosed for implementing a new bipolar-based silicon controlled rectifier (SCR) circuit for an electrostatic discharge (ESD) protection. The SCR circuit comprises a bipolar device to be formed on a semiconductor substrate. The bipolar device comprises at least an N-well for providing a high resistance and a P+ material to be used as a collector thereof for further providing a high resistance. At least an Nmoat guard ring and a Pmoat guard ring surround the bipolar device, wherein when an ESD event occurs, the high resistance provided by the N-well and the P+ material of the bipolar device increases a turn-on speed.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: December 18, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Kuo-Feng Yu, Jian-Hsing Lee, Jiaw-Ren Shih, Fu Chin Yang
  • Patent number: 7309906
    Abstract: Improved decoupling capacitor designs and layout schemes are provided that generate high effective capacitance and high area efficiency at higher frequencies than that of previously known decoupling capacitor designs. The improved decoupling capacitor designs utilize transistor gates with shorter channel lengths to reduce the total parasitic resistance of the channel, thereby providing higher effective capacitance at higher frequencies. To enable higher area efficiency of this decoupling capacitor design, excess contacts are replaced with polysilicon in a grid or waffle pattern.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: December 18, 2007
    Assignee: Altera Corporation
    Inventors: Jeffrey Tyhach, Bonnie I Wang, Yan Chong, Chiakang Sung
  • Patent number: 7309907
    Abstract: The semiconductor device (11) of the invention comprises a circuit that is covered by a passivation structure. It is provided with a first security element (12) that comprises a local area of the passivation structure and which has a first impedance. Preferably, a plurality of security elements (12) is present, whose the impedances differ. The semiconductor device (11) further comprises measuring means (4) for measuring an actual value of the first impedance, and a memory (7) comprising a first memory element (7A) for storing the actual value as a first reference value in the first memory element (7A). The semiconductor device (11) of the invention can be initialized by a method wherein the actual value is stored as the first reference value. Its authenticity can be checked by comparison of the actual value again measured and the first reference value.
    Type: Grant
    Filed: November 28, 2002
    Date of Patent: December 18, 2007
    Assignee: NXP B.V.
    Inventors: Petra Elisabeth De Jongh, Edwin Roks, Robertus Adrianus Maria Wolters, Hermanus Leonardus Peek
  • Patent number: 7309908
    Abstract: To prevent the potential inversion of a dynamic node attributed to the fact that any wiring line among standard cells as is made of a wiring layer at the same level as that of the dynamic node within a standard cell is laid in adjacency to the dynamic node. In adjacency to a dynamic node 101 within a standard cell, shield wiring lines 102a and 102b which are made of wiring layers at the same level as that of the dynamic node are laid so as to prevent any wiring line among standard cells from passing in adjacency to the dynamic node. The shield wiring lines can be replaced with a shield region or a wiring inhibition region.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: December 18, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsushi Nozoe, Noriyuki Kimura, Mika Nakata
  • Patent number: 7309909
    Abstract: A semiconductor device has a leadframe with a structure made of a base metal (105), wherein the structure consists of a chip mount pad (402) and a plurality of lead segments (403). Covering the base metal are, consecutively, a nickel layer (301) on the base metal, and a continuous layer of noble metal, which consists of a gold layer (201) on the nickel layer, and an outermost palladium layer (202) on the gold layer. A semiconductor chip (410) is attached to the chip mount pad and conductive connections (412) span from the chip to the lead segments. Polymeric encapsulation compound (420) covers the chip, the connections, and portions of the lead segments. In QFN devices with straight sides (501), the compound forms a surface (421) coplanar with the outermost palladium layer (202) on the un-encapsulated leadframe surfaces.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: December 18, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Donald C. Abbott
  • Patent number: 7309910
    Abstract: A microelectronic package includes a microelectronic element having contacts, a dielectric element, at least a portion of the dielectric element extending beneath the microelectronic element, and a structure including portions of a lead frame. The structure includes a plurality of terminals and leads formed integrally with the terminals, at least some of the terminals and at least some of the leads being disposed entirely beneath the microelectronic element, and at least some of the contacts being connected to at least some of the terminals by at least some of the leads. The leads and terminals are at least about 50 microns thick.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: December 18, 2007
    Assignee: Tessera, Inc.
    Inventors: Craig S. Mitchell, Belgacem Haba
  • Patent number: 7309911
    Abstract: A method and structure are provided for implementing enhanced cooling of a plurality of memory devices. The memory structure includes a stack of platters. A sub-plurality of memory devices is mounted on each platter. At least one connector is provided with each platter for connecting to the sub-plurality of memory devices. A heat sink is associated with the stack of platters for cooling the plurality of memory devices.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: December 18, 2007
    Assignee: International Business Machines Corporation
    Inventors: Gerald Keith Bartley, John Michael Borkenhagen, William Hugh Cochran, William Paul Hovis, Paul Rudrud
  • Patent number: 7309912
    Abstract: A package substrate is provided with a side/edge-mounted decoupling capacitor that can provide substantially instant power or control simultaneous switching noise (SSN) associated with a semiconductor device package. A fabrication method for such a package substrate is also provided. Further, a semiconductor device package that includes such a package substrate is provided. According to various embodiments, the decoupling capacitor is connected to edges or sides of a power plane and a ground plane in the package substrate for connection via the semiconductor device package's power delivery system to a power source or component.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: December 18, 2007
    Assignee: Altera Corporation
    Inventors: Hong Shi, Yuanlin Xie, Tarun Verma
  • Patent number: 7309913
    Abstract: A stacked semiconductor package includes a substrate and a first semiconductor device on the substrate. An interposer is supported above the first semiconductor device opposite the substrate. The interposer is electrically connected to the substrate. A second semiconductor device is mounted on the interposer.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: December 18, 2007
    Assignee: St Assembly Test Services Ltd.
    Inventors: Il Kwon Shim, Kambhampati Ramakrishna, Seng Guan Chow, Byung Joon Han
  • Patent number: 7309914
    Abstract: Two or more integrated circuits are stacked into a high density circuit module. The lower IC is inverted. Electrical connection to the integrated circuits is made by module contacts on a flexible circuit extending along the lower portion of the module. In one embodiment, the flexible circuit provides a balanced electrical connection to two CSP integrated circuits. In another embodiment, the flexible circuit provides a balanced electrical connection to inter-flex contacts of additional flexible circuits on two submodules. The additional flexible circuits provide further balanced connections to CSP integrated circuits in each submodule.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: December 18, 2007
    Assignee: Staktek Group L.P.
    Inventor: Paul Goodwin
  • Patent number: 7309915
    Abstract: Development efficiency and mass production efficiency of a semiconductor chip (LSI) is improved, whereby the LSI on which an integrated circuit is formed has plural pad parts connecting the integrated circuit with an external circuit. The pad part is provided with a first junction consisting of a window formed in the protective film and the pad exposed from the window, and a second junction consisting of a window formed in the protective film and a bump deposited on the pad exposed from the window. When it is required that the LSI is to be connected with an external circuit by wire bonding, the first junction is connected with the external circuit usina a wire. When it is required to connect the LSI with an external circuit by the TAB method or the COG method, the second junction is directly connected to the external circuit.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: December 18, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Masao Sasaki
  • Patent number: 7309916
    Abstract: A semiconductor package includes a metal plate in which one or more openings are formed, the metal plate mounting a semiconductor chip and a printed wire pattern substrate, e.g. a PCB, mounting one or more decoupling capacitors. The semiconductor chip is in direct contact with the metal plate to improve thermal characteristics, and the substrate is supported by the metal plate to increase mechanical stability of the package. The one or more openings in the metal plate accommodate the passing therethrough of plural pins electrically connected via the printed wire pattern substrate to the semiconductor chip. The semiconductor package can be usefully applied to a digital micro-mirror device (DMD) semiconductor package for use in a projection display device.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: December 18, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Suk-Chae Kang, Sa-Yoon Kang, Dong-Han Kim, Si-Hoon Lee
  • Patent number: 7309917
    Abstract: Preparing a bottom grounding layer eliminates grounding pins, thereby the number of signal pins can be increased in a multilayer board that includes a grounding layer, a signal layer, a power supply layer, a grounding via, a signal via, a power supply via and the like in the insulation material of the multilayer board, the bottom grounding layer being electrically connected to the grounding layer.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: December 18, 2007
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Kimura, Atsushi Kikuchi, Yoshihiko Ikemoto
  • Patent number: 7309918
    Abstract: This invention relates to a chip package structure comprising of a chip, multiple leads with inner and outer ends, an exposed chip upper surface, an encapsulated body encloses the peripherals of the chip, and multiple conducting wires used to connect electrically the chip and leads, wherein said leads extends internally to the surfaces on the two sides of the chip, in the mean time, pasting method is used to connect the two side surfaces of the chip to the leads in order to carry the chip, therefore, traditional die pad is replaced, furthermore, the outer ends or lower surfaces of the leads are exposed out of encapsulated body, this is to prevent solder overflow and enhance solder aggregation effect, in the mean time, packaging cost can be saved and easier visual positioning and rework can be obtained from this package structure, leads are used as terminals to be electrically connected to the external; therefore, through the internally extended leads structure, die pad is replaced, and the effects of package
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: December 18, 2007
    Assignee: Optimum Care International Tech.Inc.
    Inventor: Jeffrey Lien
  • Patent number: 7309919
    Abstract: A sealing apparatus for sealing by resin a semiconductor wafer having semiconductor elements on its surface. The apparatus includes an upper mold and a lower mold having an area where the semiconductor wafer is mounted, the lower mold having an uneven surface in the area and a shock absorber under the lower mold.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: December 18, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Jiro Matsumoto
  • Patent number: 7309920
    Abstract: A chip or wafer comprises a semiconductor substrate, first and second transistors on the semiconductor substrate, first and second metal layers over the semiconductor substrate, an insulating layer on the first and second metal layers, a third and fourth metal layers on the insulating layer, a passivation layer over the third and fourth metal layers, and a fifth metal layer over the passivation layer. A signal is suited to be transmitted from the first transistor to the second transistor sequentially through the first, third, fifth, fourth and second metal layers.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: December 18, 2007
    Assignee: MEGICA Corporation
    Inventors: Mou-Shiung Lin, Jin-Yuan Lee, Ching-Cheng Huang
  • Patent number: 7309921
    Abstract: Leakage current generated in a PN junction diode is reduced, and charge-up current caused by plasma treatment in formation of wiring connected to the PN junction diode is controlled. An N+ region as a first conductive type impurity region provided in a Si substrate with an upper surface being exposed on one main surface of the Si substrate, a P+ polysilicon plug provided with a bottom being contacted with an upper surface of the N+ region, and wiring connected to a top of the P+ polysilicon plug are included.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: December 18, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Taketo Fukuro
  • Patent number: 7309922
    Abstract: In a lower substrate, a display apparatus having the lower substrate and a method of manufacturing the lower substrate, the lower substrate includes a pixel area and a circuit area. An image is displayed in the pixel area. A first signal electrode is disposed in a circuit area. A first insulating layer includes an opening, through which the first signal electrode is exposed. A second signal electrode is disposed on the first insulating layer in the circuit area, and spaced apart from the first signal electrode. A second insulating layer is disposed on the first insulating layer, and includes a contact hole, through which the first and second signal electrodes are exposed. A conductive layer electrically connects the first signal electrode to the second signal electrode. Therefore, a manufacturing process is simplified so that a yield of the lower substrate is increased.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: December 18, 2007
    Assignee: Samsun Electronics Co., Ltd.
    Inventors: Hyun-Young Kim, Joo-Sun Yoon, Bong-Ju Kim, Seung-Gyu Tae
  • Patent number: 7309923
    Abstract: Improved approaches to stacking integrated circuit chips within an integrated circuit package are disclosed. The improved approaches enable increased integrated circuit density within integrated circuit packages, yet the resulting integrated circuit packages are thin or low profile. These improved approaches are particularly useful for stacking same size (and often same function) integrated circuit chips with integrated circuit packages. One example of such an integrated circuit package is a non-volatile memory integrated circuit package that contains multiple, like-sized memory storage integrated circuit chips stacked on one or both sides of a leadframe.
    Type: Grant
    Filed: June 16, 2003
    Date of Patent: December 18, 2007
    Assignee: SanDisk Corporation
    Inventor: Soochok Kee
  • Patent number: 7309924
    Abstract: A flip-chip package for implementing a fine solder ball, and a flip-chip packaging method using the same. The flip-chip package includes a first wafer having a first electrode and a first under bump metal (UBM) formed on the first electrode and electrically connected to the first electrode; and second wafer opposing the first wafer and having a second electrode located in a position corresponding to the first electrode, and a second UBM formed on the second electrode and electrically connected to the second electrode. The first wafer has a depression formed on one or more areas adjacent to the first UBM, which depression partly receives a solder ball that connects the first and the second UBMs upon flip-chip bonding of the first and second wafers. Since the UBM is formed as an embossing pattern, a fine solder ball can be implemented. Additionally, the reliability of the package can be improved.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: December 18, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hoon Song, Dong-sik Shim
  • Patent number: 7309925
    Abstract: A dicing die-bonding film has a supporting substrate, an adhesive layer formed on the supporting substrate, and a die-bonding adhesive layer formed on the adhesive layer, and further has a mark for recognizing the position of the die-bonding adhesive layer. It is possible to provide a dicing die-bonding film in which in the case a semiconductor wafer and the dicing die-bonding film are stuck onto each other, the position of the die-bonding adhesive layer in the film can be recognized.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: December 18, 2007
    Assignee: Nitto Denko Corporation
    Inventors: Takeshi Matsumura, Masayuki Yamamoto
  • Patent number: 7309926
    Abstract: A solar-powered pumping device comprising: a solar power converter for generating power from sunlight; a pump driven by power from said solar power converter; an actuator for controlling the orientation of said solar power converter; and a controller for controlling said actuator to orient said solar power converter for optimum generation of power, said controller comprising a receiver for receiving broadcast time data, and an ephemerides calculator for calculating the position of the sun on the basis of the received time data.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: December 18, 2007
    Assignee: Mono Pumps Limited
    Inventor: Stephen Bruce Watt
  • Patent number: 7309927
    Abstract: A framework of an engine generator can be made up of a front frame and a rear frame which can be made from aluminum die castings. Securing frames can be configured to removeably connect the opposing bottom edges of the front frame and the rear frame, on their both sides through bolts and nuts. Handles can be configured to removeably connect the opposing top edges of the front frame and the rear frame, on their both sides through bolts and nuts. The front frame and the rear frame can be formed integral with rib portions for mounting panels respectively, and handle mounting portions and respectively, for mounting the handles.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: December 18, 2007
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Takahide Sugiyama, Naoto Mazuka
  • Patent number: 7309928
    Abstract: A portable electrical generator has a manually movable frame. An internal combustion engine and a generator device that generates AC power are supported on the frame. The internal combustion engine drives the generator device. An electrically powered starting device is coupled to the internal combustion engine. A control panel is coupled to the frame and includes at least one AC outlet and a battery receptacle that is electrically coupled to the starting device. The battery receptacle is materially the same as a foot of a cordless power tool that receives a battery pack. The battery pack for the cordless power tool is received in the battery receptacle and provides electrical power to the starting device. In another aspect, the battery receptacle is disposed in an enclosure supported by the frame. In an aspect, the enclosure further includes a battery charger.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: December 18, 2007
    Assignee: Black & Decker Inc.
    Inventors: Jeffrey P. Grant, Michael K. Forster
  • Patent number: 7309929
    Abstract: A system and method of starting or restarting an engine on a locomotive having at least one of another engine, a fuel cell system and an energy storage system. The method is applicable to large systems such as trucks, ships, cranes and locomotives utilizing diesel engines, gas turbine engines, other types of internal combustion engines, fuel cells or combinations of these that require substantial power and low emissions utilizing multiple power plant combinations. The method is directed, in part, at a flexible control strategy for a multi-engine systems based on a common DC bus electrical architecture so that prime power sources need not be synchronized.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: December 18, 2007
    Assignee: Railpower Technologies Corporation
    Inventors: Frank Donnelly, Andrew Tarnow
  • Patent number: 7309930
    Abstract: A vibration damping technique for a wind turbine system is described. The wind turbine system includes a vibration damper, which provides a variable signal to control torque produced by a generator of the wind turbine system. The variable signal is based on generator speed and has a first local peak value based on a resonant frequency of tower side-to-side oscillation.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: December 18, 2007
    Assignee: General Electric Company
    Inventors: Shashikanth Suryanarayanan, Aaron Avagliano, Corneliu Barbu
  • Patent number: 7309931
    Abstract: The invention relates to a motor part of a linear motor, i.e. the primary part or secondary part of an asynchronous or synchronous linear motor. According to the invention, it is proposed to configure a cooling coil (K), which has a meandering flat structure, from pipe sections (10) of a material with high heat conductivity, as well as plastic deflections (12, 13). The deflections are preferably configured as pre-fabricated molded plastic parts, and the motor element is preferably cast with the attached cooling coil. According to the invention, cooling coils can be configured from modules in accordance with the required dimensions, and problems caused by bending the metal parts are avoided.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: December 18, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventor: Thomas Hoppe
  • Patent number: 7309932
    Abstract: A voice coil motor apparatus for positioning is disclosed. The voice coil motor is used by the auto-focus lens control module of a miniature camera. The apparatus contains a voice coil motor, a position feedback sensor, and a positioning controller. The voice coil of the voice coil motor can be either movable or stationary, where in the former case the attached power cable is a flexible circuit board, and in the latter case the power cable is fixed. The position feedback sensor includes a photo interrupter, a light reflector, and a bias circuit used for tracking any displacement of the movable part of the motor. The positioning controller uses the voltage signals to be processed through a proportional-integral-differential computation unit to manipulate an output current for accurate positioning of the movable part of the motor within a prescribed range.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: December 18, 2007
    Assignee: Vasstek International Corporation
    Inventor: Yu-Kuang Tseng
  • Patent number: 7309933
    Abstract: The invention relates to a vibrator for acting on an object in a predetermined direction, comprising a casing and two identical, synchronously driven, electric linear motor coils arranged mirror-symmetrically therein, between which coils there is an armature which can be moved to and fro in an oscillatory fashion by driving the linear motor coils appropriately in their longitudinal direction, the armature being mounted via wires arranged under spring bias in the casing, and also to an apparatus for producing concrete blocks which uses vibrators of this type.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: December 18, 2007
    Assignee: Hess Maschinenfabrik GmbH & Co. KG
    Inventor: Ulrich Backs
  • Patent number: 7309934
    Abstract: Linear electric generators include stationary windings and armature magnets arranged to reciprocate axially relative to the windings, or stationary magnet structures and movable windings arranged to reciprocate relative to the stationary magnet structures. The armature magnets or stationary magnet structures are in the form of multiple pole magnets made up of a plurality of individual pole structures, each pole structure including a pair of magnets joined to each other with facing poles of like polarity. In addition, the windings may be in the form of a double winding structure including at least one first clockwise winding and at least one second counterclockwise winding arranged in a multi-layered stacked arrangement.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: December 18, 2007
    Assignee: Sunyen Co., Ltd.
    Inventors: Yu-Ta Tu, Show-Jong Yeh
  • Patent number: 7309935
    Abstract: The present invention relates to a fan wheel (11) for electrical machines, in particular for alternators of motor vehicles, with a fan disk (10) that, on its axially outwardly directed end face, has a number of fan blades (13, 18) distributed around the circumference in the shape of a circular ring, the fan blades extending away from the fan disk in the axial direction, so that cooling air beneath the fan blades can be drawn in axially and blown radially outwardly between air channels (20, 21) formed between them. One part (18) of each of the fan blades is joined in a fixed manner with the fan disk (10) via only its radially outward end section (18a), so that each inner end section (18b) is swiveled radially increasingly outwardly by a centrifugal force (22) occurring there as rotational speeds increase, to reduce the cooling air stream.
    Type: Grant
    Filed: October 19, 2002
    Date of Patent: December 18, 2007
    Assignee: Robert Bosch GmbH
    Inventors: Horst Braun, Hans-Joachim Lutz
  • Patent number: 7309936
    Abstract: To obtain a resolver in which the winding portion is prevented from breaking by corrosion caused by water.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: December 18, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshinobu Utsumi, Shinji Nishimura
  • Patent number: 7309937
    Abstract: The spindle motor described herein comprises a rotor having a rotor hub and a shaft connected to the rotor hub, a cylindrical bearing sleeve having a central bore to accommodate the shaft and a collar disposed at the receiving aperture, a cup-shaped bearing housing closed at one end to accommodate the bearing sleeve, a baseplate to hold the bearing receiving portion, a stopper ring disposed at the inside circumference of the rotor hub between the collar and the baseplate, and at least one radial bearing region formed between the outside diameter of the shaft and the inside diameter of the bore and defined by surface patterns. According to the invention, an annular axial bearing region is provided formed between a lower face of the collar and an upper face of the stopper ring. This design and construction makes it possible to realize spindle motors having small dimensions and, in particular, low overall heights.
    Type: Grant
    Filed: February 14, 2006
    Date of Patent: December 18, 2007
    Assignee: Minebea Co., Ltd.
    Inventors: Joerg Hoffmann, Olaf Winterhalter
  • Patent number: 7309938
    Abstract: A rotary power converter apparatus for coupling power between a prime driver and plural generators. The apparatus includes a frame having a first and second bearing aligned along an axis of rotation and a rotor assembly supported thereby. The rotor assembly includes a shaft fabricated from a light weight material that is rotatably supported along the axis of rotation by the first and second bearings. There is a prime-driver rotor assembly, that has a magnetic structure supported by a light weight non-magnetic alloy hub that is fixed to rotate with the shaft. There are also plural generator rotor assemblies, each having a permanent magnet structure supported by a light weight non magnetic alloy hub also fixed to rotate with the shaft. A prime driver stator assembly is fixedly supported by the frame and aligned concentric with the prime driver rotor assembly to enable magnetic coupling of power therewith.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: December 18, 2007
    Inventor: Kelly S. Smith
  • Patent number: 7309939
    Abstract: The invention provides means of limiting maximum current conducted through windings of an electric machine having a rotor and a stator. By encouraging an appropriate leakage flux around a winding, a leak impedance can be achieved which may be used, according to the invention, to limit the maximum current in the winding as a matter of machine design.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: December 18, 2007
    Assignee: Pratt & Whitney Canada Corp.
    Inventor: Kevin Allan Dooley
  • Patent number: 7309940
    Abstract: The invention concerns a rotor arrangement for an electrical drive motor of a compressor, particularly a refrigerant compressor, with a rotor having a rotor lamination of stacked sheet plates, and a shaft, which is inserted in an axial recess of the rotor lamination and is unrotatably connected with the rotor lamination, the recess being formed by openings in adjacent sheet plates. It is endeavoured to simplify the manufacturing of such rotor arrangements. For this purpose, it is ensured that openings of different sizes are provided in the sheet plates, at least two sheet plates forming a first group, each having an opening, which is smaller than the cross-section of the shaft, the remaining sheet plates forming a second group, each having an opening, which is larger than the cross-section of the shaft.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: December 18, 2007
    Assignee: Danfoss Compressors GmbH
    Inventors: Marten Nommensen, Frank Holm Iversen, Heinz Otto Lassen, Beate Sönksen, legal representative, Christian Petersen, deceased
  • Patent number: 7309941
    Abstract: A rotating electric machine according to the present invention includes: a rotation axis extending along a first direction; a first rotor for coupling with the rotation axis to rotate together with the rotation axis; a first stator disposed so as to oppose the first rotor; and a moving mechanism for moving the first rotor so that relative positions of the first rotor and the first stator are changed.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: December 18, 2007
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Keiko Murota, Shinya Naito, Hiroyuki Ishihara, Haruyoshi Hino, Junji Terada, Tomohiro Ono
  • Patent number: 7309942
    Abstract: A transducer assembly has a generally planar resonator (12) (such as a disc) bonded on one face to a sheet of piezoelectric material (12B) and having a mounting flange (12C) (which may extend all around the periphery of the resonator) to mount the resonator between inner (13) and outer (11) mounting elements such as rings. An electric circuit (24) drives the piezoelectric sheet (12B) and, when used for sound generation, a tuned acoustic structure is provided for directing sound away from the resonator (12).
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: December 18, 2007
    Assignee: Sportzwhistle Pty Ltd
    Inventor: John Allen Hilton
  • Patent number: 7309943
    Abstract: An optical assembly that contains an optical device movably attached to a apparatus for driving a threaded shaft assembly. The apparatus contains of a threaded shaft with an axis of rotation and, engaged therewith, a threaded nut. The assembly contains a device for subjecting the threaded nut to ultrasonic vibrations and thereby causing said the shaft to simultaneously rotate and translate in the axial direction.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: December 18, 2007
    Assignee: New Scale Technologies, Inc.
    Inventors: David Henderson, James Guelzow, Conrad Hoffman, Robert Culhane
  • Patent number: 7309944
    Abstract: A piezoactuator, includes at least one stacked piezoelement, with at least two electrode layers, arranged one over the other along a stacking direction of the piezoelement, at least one piezoelectric layer, arranged between two of the electrode layers and at least one pre-tensioning device, for introduction of force into a volume of the piezoelectric layer via at least one force introduction surface on the piezoelectric layer, which is arranged on at least one of the surface sections facing the pretensioning device. The force introduction surface is smaller than the surface section of the piezoelectric layer and the volume is a partial volume of the piezoelectric layer. The production of the piezoactuator is achieved by introduction of a force into the partial volume of the piezoelectric layer via the force introduction surface on the piezoelectric layer.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: December 18, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventors: Karl Lubitz, Hedwig Murmann-Biesenecker, Andreas Wolff
  • Patent number: 7309945
    Abstract: The invention provides a laminate-type piezoelectric element comprising a ceramic laminate 10 with ceramic layers 11 and internal electrode layers 12 respectively stacked alternately, and a pair of external electrodes respectively connecting with a pair of connecting areas 15 formed at an outer peripheral area of the ceramic laminate 10. The internal electrode layer comprises an internal electrode part 120 with electric conductivity, and a non-pole part 120 where the internal electrode part 120 does not exist at the inside near an outer peripheral area. The ceramic laminate 10 comprises stress relaxation parts 13 able to modify more easily their shapes than the ceramic layers 11, along at least a part of said internal electrode layers. This stress relaxation part 13 is placed so as to overlap with the non-pole part 129 of either of the internal electrode layers 12, in a stacking direction of the ceramic laminate 10.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: December 18, 2007
    Assignee: Denso Corporation
    Inventors: Akio Iwase, Tetsuji Ito, Toshio Ooshima, Shige Kadotani
  • Patent number: 7309946
    Abstract: A motion actuator comprises a cylindrical movable shaft and a stage that contains an expansible/contractible device and two clamps. The expansible/contractible device can be controlled to drive the axial motion of the movable shaft, and the two clamps can be controlled to grip/release the shaft. The two clamps and the expansible/contractible device are each controlled by a bimorph structure, which comprises a cut cylindrical piezoelectric tube section in a hole enclosed by a thin wall in the stage. By sequentially activating the three piezoelectric tube sections, axial motions of the movable shaft relative to the stage in small steps are made. Each of the two clamps can be adjusted by a screw, which presses a spring structure that makes contact with the top surface of the movable shaft, so that the clamps can grip the movable shaft firmly when actuated, but not when not actuated. The flat top surface of the movable shaft is designed to inhibit the possible rotation along its axis during its axial motion.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: December 18, 2007
    Assignee: Academia Sinica
    Inventors: Ing-Shouh Hwang, Shao-Kang Hung, Cheng-Shing Tin, And De Hu
  • Patent number: 7309947
    Abstract: A piezoelectric transducer for an ultrasonic scan is provided. The transducer includes a plurality of piezoelectric members arrayed. The plurality of piezoelectric members have different compositions parts in a slice direction so that an ultrasonic beam is focused in the slice direction.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: December 18, 2007
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventors: Takashi Takeuchi, Tomohisa Imamura, Takashi Owaga