Abstract: A system or apparatus for monitoring an Integrated Circuit (IC) chip, comprises: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.

Abstract: A system is provided for testing a first integrated circuit chip associated with at least a second integrated circuit chip in a semiconductor device, wherein at least some external terminals for the semiconductor device are to be shared by the first and second integrated circuit chips, and wherein the first integrated circuit chip is designed for normal operation and a test mode. The system includes a plurality of multiplexer circuits. Each multiplexer circuit is operable to receive a respective signal from the second integrated circuit chip when the first integrated circuit chip is in normal operation. Each multiplexer circuit is further operable to receive a respective signal from either the second integrated circuit chip or an associated external terminal when the first integrated circuit chip is in test mode. An external terminal of the semiconductor device operable to receive a signal for causing the first integrated circuit chip to transition between normal operation and the test mode.

Abstract: Systems and methods of testing integrated circuits are disclosed. The systems include a test module configured to operate between an automated testing equipment and an integrated circuit to be tested. The testing interface is configured to test the integrated circuit at a higher clock frequency than the automated testing equipment is configured to operate. In order to do so, the testing interface includes components configured for generating addresses and test data to be provided to the integrated circuit. A variety of test data patterns can be produced and the test data can be address dependent.

Abstract: A current sensing device for sensing current flowing through a MOSFET has a voltage divider circuit composed of a series circuit of a first resistor and a second resistor having different resistance temperature coefficients, with a voltage division ratio designed to change depending on temperature. The sensing device is connected between a source and a drain of said MOSFET. A sensing circuit takes out the source-to-drain voltage divided with the voltage divider to sense the current flowing through the MOSFET.

Abstract: A method of measuring the counter-electromotive force of the motor accurately is disclosed. The counter-electromotive force of the motor changes with the rotational position and the rotational speed. The value of the counter-electromotive force measured during the inertial rotation is a value associated the simultaneous change of the rotational position and the rotational speed and required to be corrected. The change rate of the rotational speed is set as a deceleration function, and the data are statistically processed using the measurement value of the counter-electromotive force at minuscule time intervals. In this way, the error elements are eliminated for each motor measured thereby to determine the corrected counter-electromotive force at a predetermined rotational speed. Even a miniature motor rapidly decreased in speed can be accurately measured within a short time.

Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). The IC includes a first set of circuits and a second set of circuits interspersed among the first set of circuits. Each set of circuits includes at least ten volatile configurable circuits. Several circuits in at least one of the sets are user multiplexers. Each particular user multiplexer has input and output terminals and has a set of select terminals for receiving a set of user-design signals that directs the particular multiplexer to connect a set of the input terminals to a set of the output terminals. The user-design signals are signals generated internally by the IC.

Abstract: An apparatus and methods for interconnecting a plurality of nanoscale programmable logic array (PLA) clusters are disclosed. The appartus allows PLA clusters to be built at nanoscale dimensions, signal restoration to occur at the nanoscale, and interconnection between PLA clusters to be performed with nanoscale wiring. The nanoscale PLA, restoration, and interconnect arrangements can be constructed without using lithographic patterning to produce the nanoscale feature sizes and wire pitches. The nanoscale interconnection of the plurality of nanoscale PLA clusters can implement any logic function or any finite state machine. The nanoscale interconnect allows Manhattan (X,Y grid) routing between arbitrary nanoscale PLA clusters. The methods teach how to interconnect nanoscale PLAs with nanoscale interconnect and how to build arbitrary logic with nanoscale feature sizes without using lithography to pattern the nanoscale features.

Abstract: Provided are a receiver and a transceiver for multi-level current-mode signaling, which together may reduce the number of bus lines and increase a data bandwidth. A transmitter transmits one reference current and a multi-level data current. On the basis of the reference current signal received from the transmitter, a receiver generates plural internal reference currents for determining the multi-level data current received from the transmitter, and converting the received multi-level data current into a data voltage having the desired level corresponding to the data that was transmitted.

Abstract: To provide an output MOS transistor from breaking due to dump surge and counter electromotive, a semiconductor integrated circuit according to an embodiment of the invention includes an output MOS transistor controlling current flowing through a load, a dynamic clamp circuit clamping an overvoltage applied to the output MOS transistor, a delay circuit generating a reference signal by adjusting a level of a gate voltage of the output MOS transistor, and a clamp controlling circuit making the dynamic clamp circuit operate based on the reference signal when a counter electromotive force is applied to the output MOS transistor.

Abstract: A logic circuit includes a first flip-flop configured to include a first input terminal introducing a clock, a first output terminal supplying the clock and a first internal wiring connecting the first input terminal and the first output terminal, and a second flip-flop configured to be adjacent to the first flip-flop and be supplied with the clock from the first output terminal.

Abstract: A stacked inverter delay chain. The stacked inverter delay chain includes a plurality of stacked inverter delay elements. A switch circuit is included and is coupled to the stacked inverter delay elements and configured to select at least one of the plurality of stacked inverter delay elements to create a delay signal path. The delay signal path has an amount of delay in accordance with a number of stacked inverter delay elements comprising the delay signal path. An input is coupled to a first stacked inverter delay element of the delay signal path to receive an input signal and an output is coupled to the switch circuit and is coupled to the delay signal path to receive a delayed version of the input signal after propagating through the delay signal path.

Abstract: A phase locked loop (PLL) circuit having a deadlock protection circuit and a deadlock protection method of the PLL circuit are provided.

Abstract: A duty cycle corrector includes a first controllable delay, a second controllable delay, a phase detector, and a compensation circuit. The first controllable delay is configured to delay a first signal to provide a second signal. The second controllable delay is configured to delay the second signal to provide a third signal. The phase detector is configured to adjust the first controllable delay and the second controllable delay to phase lock the third signal to the first signal. The compensation circuit is configured to compensate for a mismatch between the first controllable delay and the second controllable delay to provide a fourth signal in response to the first signal and a fifth signal approximately 180 degrees out of phase with the fourth signal in response to the second signal.

Abstract: The present invention relates to a clock signal distribution circuit for distributing the clock signal to circuits such as LSI integrated circuits, and, more specifically, provides a clock adjuster circuit, which performs phase difference adjustment of clock signals automatically. It is a circuit, which on driving a circuit element implemented on an LSI chip, supplies the clock signal, which is a reference for driving, is distributed subsequently from first distribution to lower-level distributions of a hierarchical structure, or from a fifth level distribution circuit “5” to every area on the LSI chip, for example. At that time, delay of the clock signal is detected by a phase difference detector circuit, the delay data is automatically written to a delay adjuster circuit built into each of the fifth level distribution circuits “5”. Using the delay data, the phase difference of the clock signals, is adjusted when the LSI chip is manufactured.

Abstract: A voltage level shifter apparatus is provided. The voltage level shifter apparatus includes a first dynamic-bias generator, a second dynamic-bias generator, and a level supply circuit. The first dynamic-bias generator dynamically outputs a first bias signal, wherein the level of the first bias signal is determined in accordance with the received input data signal. The second dynamic-bias generator outputs a second bias signal, wherein the level of the second bias signal is determined in accordance with the received input data signal. Besides receiving the input data signal, the level supply circuit is further coupled to the first dynamic-bias generator and the second dynamic-bias generator for receiving the first bias signal and the second bias signal, and generating the output data signal in accordance with the input data signal, the first bias signal, and the second bias signal.

Abstract: A temperature sensor device and method of sensing temperature are disclosed. The device and method include generating a reference voltage inversely correlated to the temperature, generating a plurality of analysis voltages correlated to the temperature using a reference current, comparing the reference voltage to each of the plurality of analysis voltages, and generating a temperature estimate based on the comparison. The device and method may also include a method to selectively bypass various resistors in a resistor stack used to generate the various analysis voltages. Another embodiment of the present invention comprises a semiconductor device including at least one temperature sensor according to the invention described herein. The temperature sensor and method of sensing temperature may be incorporated into a semiconductor device, which may be fabricated on a semiconductor wafer and included in an electronic system.

Abstract: An internal voltage generator for stably generating an internal voltage includes a latch unit for outputting a first and a second driving signals based on a periodic signal; a first pump block for generating the internal voltage in response to the first driving signal; and a second pump block for generating the internal voltage in response to the second driving signal.

Abstract: Provided is a temperature-compensated circuit for a power amplifier through diode voltage control, in which a first resistor (Rref), a first diode (D1), and a second diode (D2) are connected to a reference voltage in series. The temperature-compensated circuit includes a second resistor (R1) connected to the reference voltage, a third resistor (R2) connected to the second resistor in series, a fourth resistor (Rc) having one terminal connected to the reference voltage, a fifth resistor (Re) having one terminal connected to ground, a bias transistor having a base terminal connected to a contact point (VS) between the second resistor and the third resistor, a collector terminal connected to the other terminal of the fourth resistor, and an emitter terminal connected to the other terminal of the fifth resistor, and a sixth resistor (Rf) connected between a series connection terminal between the first diode and the second diode, and the collector terminal of the bias transistor.

Abstract: An amplifier circuit includes an input chopping circuit for chopping first and second input signals, a transconductance stage for amplifying an output of the chopping circuit and applying it to the input of a folded cascode stage, to the input of an un-chopping circuit, and to the input of a chopper-stabilized gain boost amplifier. The output of the un-chopping circuit drives sources of cascode transistors of the folded cascode stage. The gain boost amplifier includes another transconductance stage having another un-chopping circuit coupled to the gate of one of the cascode transistors of the folded cascode stage. The drains of cascode transistors of the folded cascode stage drive a class AB output stage. The amplifier provides both highly linear operation and low 1/f noise.

Abstract: To provide a differential operational amplifier circuit that attains a wide-band and high-DC-gain characteristic and operates with a low power supply voltage. A signal path having three amplifier circuits passing an Nch transistor pair, cascode connected Nch transistor pairs, and a Pch transistor pair functions as a gain path having a high-gain and narrow-band characteristic. In addition, a signal path having two amplifier circuits passing an Nch transistor pair and another Nch transistor pair functions as a feedforward path having a low-gain and wide-band characteristic. Signals amplified through each path are synthesized at an output terminal, whereby a high-gain and wide-band operational amplifier is attained. Further, a constant current source transistor pair supplies a constant current to four drain load resistors of a first differential amplifying pair to drive a circuit with a constant current, thereby reducing a power supply voltage.

Abstract: An input buffer includes a first stage for receiving an input signal and having a first pair of complementary output signals, the first stage including an input circuit for receiving the input signal, an output circuit for generating the first pair of complementary output signals based on the input signal, a resistance feedback circuit connected to the first pair of complementary output signals and generating a feedback signal, and a common mode circuit for balancing the complementary outputs based on the feedback signal.

Abstract: A high frequency power amplifier includes: a multi-finger transistor including transistor cells electrically connected in parallel; an input side matching circuit connected to gate electrodes of the transistor cells; and resonant circuits, each resonant circuit being connected between a gate electrode of a respective one of the transistor cells and the input side matching circuit. The resonant circuits resonate at a second harmonic of the operational frequency of the transistor or at a frequency within a predetermined range centered at the second harmonic and act as a short circuit or exhibit low impedance as seen from the gate electrode.

Abstract: In general, in one aspect, the disclosure describes a phase-locked loop circuit. The circuit includes an oscillator having a first control input, a second control input, and a third control input, wherein the first control input, the second control input, and the third control input act to control output frequency of the oscillator. The circuit further includes a first charge pump and a second charge pump. A first bias generator is coupled to the first control input of the oscillator and can receive electrical input from the first charge pump. A second bias generator is coupled to the second control input of the oscillator and can receive electrical input from the first charge pump, the second charge pump, and the first bias generator. A third bias generator is coupled to the third control input of the oscillator and can receive electrical input from the second charge pump and the first bias generator.

Abstract: Embodiments of a phase-locked loop having a tunable-transfer function are presented herein. In implementations, a multipulse generator coupled between the chase frequency detector and charge pump tunes the bandwidth and peaking of the phase-locked loop based on an activity factor input are disclosed.

Abstract: An oscillation frequency control circuit comprises a frequency counter that counts to measure a frequency of an oscillating signal outputted from an oscillation circuit which produces the oscillating signal of the frequency corresponding to analog control voltages inputted, a plurality of D/A converters that produce the analog control voltages respectively corresponding to digital values inputted, a digital value generator that generates the digital values according to control signals inputted, and an operation circuit that compares the frequency measured by the frequency counter with a reference frequency and produces the control signals, which are inputted to the digital value generator, corresponding to the comparing result.

Abstract: A frequency synthesizer in an ultra wide band (UWB) wireless communication system which transmits and receives data through multiband includes a frequency generation means which generates a plurality of frequency signals; and a frequency adjustment means which receives the plurality of frequency signals from the frequency generation means and generates center frequencies of all or part of sub-bands within the UWB through the frequency adjustment. Since all of the center frequencies of the sub-bands are generated, the utilization of the sub-bands can be enhanced for the wideband wireless communication. Furthermore, it is possible to enable the stable UWB communications by flexibly utilizing all of fourteen sub-bands since the sub-bands suffer less from the frequency interference in a complicated and variable wireless frequency environment.

Abstract: A double oven crystal oscillator (DOCXO) is disclosed which is highly stable by incorporating means to reduce the effects of ambient pressure changes on the frequency of the oscillator. The oscillator crystal is mounted in a temperature controlled inner oven to reduce the effects on the frequency stability of the oscillator. The oscillator circuitry and all circuitry associated with the inner oven is mounted in good thermal contact with the inner oven. A Faraday shield at ground potential is placed over the oscillator circuitry to minimize the effects of stray capacitance between the oscillator components and the case wall of the inner oven. The effects of minor deformations in the case walls within the oscillator caused by ambient pressure changes and other factors causing pressure changes are thereby greatly minimized.

Abstract: The oscillator circuit comprises a capacitor and first to fourth constant current supplies and switches are connected to the capacitor. Both terminals of the capacitor are used for charges and discharges. One period comprises four steps; charging the first terminal of the capacitor, discharging the second terminal, charging the first terminal, and discharging the second terminal.

Abstract: A semiconductor integrated circuit includes a reference-voltage circuit configured to produce a predetermined reference voltage at an output node thereof, a comparator, coupled to a node to which an oscillating signal is supplied and to the output node of the reference-voltage circuit, to produce a result of comparison at an output node thereof, the result of comparison being made by comparing a voltage of the oscillating signal with the predetermined reference voltage, and a detection circuit coupled to the output node of the comparator to produce, in response to the result of comparison, a stable-state-detection signal indicating that the oscillating signal has an amplitude larger than the reference voltage.

Abstract: A boundary acoustic wave filter includes a first medium layer, a second medium layer laminated on the first medium layer, and IDT electrodes that are disposed at the boundary between the first and second medium layers and that define an electroacoustic transducer. In the boundary acoustic wave filter, the sound velocity of boundary acoustic waves, which is the product of the wavelength determined by the period of the electrodes and the frequency at least the lower end of the stopband disposed at the high-frequency side of the passband, is less than the sound velocity of slow transverse waves propagating through the first medium layer and the second medium layer.

Abstract: The resonator comprises a piezoelectric layer arranged between two electrodes. An electrical heating resistor is arranged in thermal contact with at least one of the electrodes. Temporary heating of the electrode enables the material constituting the electrode to be partially evaporated, so as to thin the electrode and thus adjust the resonance frequency. Measurement of the resonance frequency in the course of evaporation enables the heating to be interrupted when the required resonance frequency is obtained. One of the electrodes can be arranged on a substrate formed by an acoustic Bragg grating. The resonator can comprise a substrate comprising a cavity whereon one of the electrodes is at least partially arranged.

Abstract: A ring millimeter-wave filter is a three-dimensional dual-mode ring filter. The ring millimeter-wave filter makes use of a three-dimensional coupling architecture as the feed of a filter to conquer the limit of the smallest spacing of a planar circuit made by the low-temperature cofired ceramic (LTCC) process so as to achieve the required coupling. Moreover, through the design of an embedded microstrip line, more than 20% of the filter area can be saved to facilitate integration with other components.

Abstract: A dielectric resonator having variable cross-section, preferably varying monotonically, and, most preferably, the resonator being in the shape of a truncated cone. Such shapes displace the H11 mode from the TE mode in the longitudinal direction of the cone. Truncating the cone to eliminate the portion of the cone where the H11 mode exists, virtually eliminates the H11 mode. A circuit comprising a plurality of these resonators may be arranged in an enclosure with each resonator longitudinally inverted relative to adjacent resonator(s) to provide a compact design with enhanced coupling and adjustability. A spiral coupling loop provides high magnetic flux in a small physical volume for coupling energy into or out of the circuit. Alternately, the resonator can coupled to a microstrip by placing the resonator upside-down near the microstrip, whereby the TE mode is immediately above the microstrip, providing enhanced coupling there between.

Abstract: A remote controlled circuit breaker switch handle engagement apparatus is provided. The apparatus is adapted to be removably attached across a circuit breaker face-plate of a traditional residential and commercial circuit breaker in order to facilitate remote completion of a circuit between a source and load, thereby reestablishing electrical service having been previously interrupted. The apparatus utilizes a handle trip assembly which engages an operating switch handle of the circuit breaker.

Abstract: A microelectromechanical system (MEMS) switch is provided which includes a moveable electrode with an opening arranged over at least a portion of the signal trace. In some cases, the opening may include a notch arranged along a periphery of the moveable electrode. In particular, the opening may include a notch bound by two edges of the moveable electrode which are respectively arranged relative to opposing sides of the signal trace. In other embodiments, the opening may include a hole arranged interior to the peripheral edge of the moveable electrode. In some cases, the MEMS switch may include a plurality of contact structures coupled to signal traces. In such cases, the moveable electrode may include openings specifically arranged above a plurality of the signal traces.

Abstract: A superconducting magnet coil configuration has at least one section containing a superconducting strip conductor which is wound in several layers like a solenoid in a cylindrical winding chamber (1) between two end flanges (2, 3), characterized in that the radially innermost layers of the section consist of metallic low-temperature superconductors (LTS) (LTS layers (8)) and radially adjacent layers of the section are formed from high-temperature superconductor (HTS) material (HTS layers (9)). The invention proposes a magnet coil configuration using HTS material which has a notch structure for correcting inhomogeneities and homogenizing a compact high-field magnet, wherein the mechanical load on the HTS strip conductor is minimized.

Abstract: A magnetic apparatus, which can be engaged to various preselected objects, is used for holding various articles which are attracted to a magnet. The magnetic apparatus comprises a platform member having a predetermined shape and a predetermined size. At least one magnet is secured to the platform member for holding such articles.

Abstract: A resistor with heat sink is provided. The heat sink includes a conductive path having metal or other thermal conductor having a high thermal conductivity. To avoid shorting the electrical resistor to ground with the thermal conductor, a thin layer of high thermal conductivity electrical insulator is interposed between the thermal conductor and the body of the resistor. Accordingly, a resistor can carry large amounts of current because the high conductivity thermal conductor will conduct heat away from the resistor to a heat sink. Various configurations of thermal conductors and heat sinks are provided offering good thermal conductive properties in addition to reduced parasitic capacitances and other parasitic electrical effects, which would reduce the high frequency response of the electrical resistor.

Abstract: A twin spark ignition apparatus having two high-voltage (HV) outputs incorporates features for balancing load capacitance on each HV output. The ignition apparatus provides a first high-voltage (HV) connection configured for direct mounting on a first spark plug, and a second HV connection for coupling to a second spark plug by way of an HV cable. The HV cable would adds capacitance at the second HV output, as compared to a direct mount. Various structures are included to offset and balance the additional capacitance attributable to the HV cable so that the capacitance of the first HV connection and the second HV connection are balanced within a range. The voltage variation between the two HV outputs is reduced.

Abstract: A system for selecting coil voltage in an electrical device comprises a housing and a coil in the housing having a plurality of windings. Each winding has a pair of pins. A slider supports a plurality of moveable contacts and is moveably mounted in the housing proximate the coil so that the plurality of moveable contacts selectively make or break electrical contact between the winding pins to select coil voltage.

Abstract: It has been discovered that an inductor may be made to include a surface rotational portion instead of a coil to provide a low inductance inductor with sufficient quality factor. The surface rotational portion is a conducting structure which is substantially enclosed along the length of the structure and which has openings at each end of the structure and an opening along the length of the structure between the end openings. One example of such a structure is a cylinder having a lateral opening and openings at its ends or bases. Another example of such a structure is a duct-shape or rectangular structure. Any appropriately shaped surface may be used to rotate current, and varying thicknesses and lengths may be used as appropriate.

Abstract: The present invention provides an improved manufacturing stability of a semiconductor device provided with a spiral inductor. The semiconductor device 100 includes a silicon substrate 101, an element isolating oxide film embedded within the silicon substrate 101, a first insulating interlayer provided on the silicon substrate 101, a spiral inductor 120 provided on the first insulating interlayer, and a shielding layer, which is provided between the spiral inductor 120 and the silicon substrate 101, and elongates toward a direction along the surface of the substrate to provide a shield between the spiral inductor 120 and the silicon substrate 101. Then, a plurality of substrate remaining regions 131 formed by the silicon substrate 101 partially remaining in the element isolating oxide film in a form of islands from the upper viewpoint are selectively provided right under the polysilicon 105 in the region for forming the spiral inductor 120.

Abstract: The invention relates to a re-settable, single-phase, thermo/electric circuit breaker utilizing a U-shape bimetallic element of substantial resistance properties in the circuit, so that when a predetermined overload current occurs the bimetallic element self heats and moves to trip a mechanism that opens the breaker circuit. The invention replaces the double-contact break configuration normally associated with a breaker of this type, with a single contact break configuration designed to produce a sliding action between contacts during the normal reset operation, providing a more reliable continuity at the moveable and stationary contact interface that is also less expensive to produce.

Abstract: A biometric fingerprint device for preventing fraud based on the device having standalone, self-authentication of the identity of predetermined user(s) and its interactivity with a database that is initiated via a controlled singularity of registration, i.e. contemporaneous registration of a user's fingerprint(s) into a database and registration, initialization, and authentication of that same fingerprint(s) onto a standalone biometric fingerprint device.

Abstract: An operator system and related methods for automatically controlling access barriers including a controller associated with at least one access barrier and a transceiver associated with the controller for transmitting and receiving operational signals. The system also includes at least one proximity device capable of communicating operational signals with the transceiver based upon a position of the proximity device with respect to the barrier and/or the operational status of a vehicle carrying the proximity device, wherein the controller monitors the operational signals and controls the position of the access barrier based upon the operation signals. Such a system allows for hands-free operation of the access barrier.

Abstract: A tire condition monitoring system for a vehicle has a chassis-side transmitter/receiver and a tire-side transmitter/receiver. The tire-side transmitter/receiver measures an interval between two successive request signals of the chassis-side transmitter and controls a time point of transmission of a response signal of the tire-side transmitter/receiver based on the measured interval so that the response signal is transmitted when the tire-side transmitter/receiver is in the communication range of the chassis-side transmitter/receiver. A control unit determines a time interval of one rotation of a tire based on a vehicle speed, and drives the chassis-side transmitter/receiver to transmit the request signal at an interval set to be shorter than an interval in which the tire rotates the communication range of the chassis-side transmitter/receiver.

Abstract: According to the present invention, the attitude of the article with the RF tag can be automatically detected by detecting the attitude of the directional antenna of the RF tag relative to that of the directional antenna of the RF tag attitude detection apparatus based on the signal intensity of the radio signal received from the RF tag.

Abstract: Method for eliminating or reducing reading errors of a non-contact microwave solids flow meter measuring solid particulate flow. The method is particularly suitable for calibration procedures prior to installation into an operating system. The flow meter is very sensitive and may pick up backscatter from dust and/or particulate clouds of the particulate product that builds up in the space above the collected particulate of the delivered product in the collecting bin. Readings that include backscatter from the dust cloud are in excess of the actual flow rate. The invention reduces or eliminates backscatter readings that include the particulate dust cloud by attaching a sheath reflective to backscatter energy and made for example from wire mesh to the delivery end of the output duct. The sheath extends toward the build up of the particulate material. During the calibration procedure, the reflective sheath is continuously moved so that it does not contact the material as it builds up.

Abstract: A hazardous gases and wind direction sensor includes a housing having a hazardous gas sensor. The gas sensor sends an output signal to a transmitter at a predetermined frequency upon detecting a hazardous gas. Wind detection is provided by eight LEDs aligned with eight corresponding photocells disposed in the housing, where each photocell represents a topographical direction and is adapted to provide an output signal associated with a particular wind direction at a predetermined frequency. A disk is coupled to a rotatable shaft in the housing and positioned between the LEDs and photocells. The shaft is coupled to a wind direction indicator such as a windsock. The disk has a slot sized to allow light to pass from one of the LEDs to its corresponding photocell, which sends an output signal to enable a switching circuit in the transmitter. The switching circuit enables the output signal at a predetermined frequency to be transmitted to a receiver.

Abstract: Techniques are disclosed to sense a current in a circuit. For instance, current sense circuit according to the teachings of the present invention includes a current sense resistor coupled to an input of the current sense circuit. The current sense resistor is coupled to receive a current to be sensed from the input of the current sense circuit. The current to be sensed is converted to a current sense voltage. A first PN junction diode is coupled to the current sense resistor. A light emitting diode (LED) is coupled to the first PN junction diode to provide a current sense threshold substantially proportional to a difference between a forward voltage drop of the LED and a forward voltage drop of the first PN junction diode. The first PN junction diode is coupled to be biased from the forward voltage drop of the LED. The LED is coupled to the current sense resistor to generate an output when the current sense voltage from the current sense resistor reaches the current sense threshold.