Patents Issued in December 27, 2007
  • Publication number: 20070296398
    Abstract: The invention relates to a device for detecting the movement of a movable component, the device having an inner part 1 and the inner part 1 having a housing in which are mounted conductors 3 that carry electrical components 4 and a sensor element. One end of each conductor 3 protrudes from the inner part 1 forming plug contacts 6, and the inner part 1 is encapsulated by a plastic housing 2 in such a way that the plug contacts 6 project into a plug receiver 5 in the plastic housing. The electrical components 4 and the sensor element are covered by covers and encapsulated by the plastic housing 2. The covers protect the components from the plastic in the encapsulation process.
    Type: Application
    Filed: March 18, 2005
    Publication date: December 27, 2007
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Dirk Kaltenbach, Harry Skarpil
  • Publication number: 20070296399
    Abstract: A system for sensing current in one or more first electrical conductors includes a frame and a retainer configured to receive the one or more first electrical conductors and constrain relative movement between the one or more first electrical conductors and the frame. The system may also include a first magnetoresistive sensor configured to sense magnetic flux and generate an output signal relating to the sensed magnetic flux. Additionally, the system may include an adjustable positioning system configured to enable supporting the first magnetoresistive sensor from the frame in any of a plurality of possible positions with respect to the retainer.
    Type: Application
    Filed: May 31, 2006
    Publication date: December 27, 2007
    Inventor: David Gregory Marchand
  • Publication number: 20070296400
    Abstract: There is provided a voltage generating apparatus that outputs a power source voltage from a voltage outputting terminal.
    Type: Application
    Filed: June 27, 2006
    Publication date: December 27, 2007
    Applicant: Advantest Corporation
    Inventors: Hiroki Andoh, Hironori Tanaka
  • Publication number: 20070296401
    Abstract: An N-wire interleaved differential multiplexer. The N-wire interleaved differential multiplexer may be formed by interleaving the channels and corresponding switches of N one-wire multiplexers. Each of the switches of the interleaved differential multiplexer may be controlled independent from the other switches to provide a signal path between a DUT stack and a measurement device. To test a first DUT, two switches of the interleaved multiplexer are closed to connect the terminals of the first DUT to the measurement device. To switch from testing the first DUT to testing a subsequent DUT, one of the previously activated switches is opened, one is kept closed, and a different switch is closed. The testing process may “walk” up or down the switch channels of the interleaved multiplexer one switch at a time to test each of the DUTs of the DUT stack.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 27, 2007
    Inventors: James A. Reimund, Steven D. Geymer, Jason P. White
  • Publication number: 20070296402
    Abstract: An adapter for positioning of contact tips has a location surface for locating a contact tip and a base element with a base for setting the adapter on a mounting surface. A positioning element is in mechanical contact with and mobile relative to the base element. The location surface can be positioned relative to the base, in at least one positioning direction, by the positioning element which includes a gearing for converting rotary movement to translational movement in the positioning direction.
    Type: Application
    Filed: September 12, 2006
    Publication date: December 27, 2007
    Applicant: SUSS MICROTEC TEST SYSTEMS GMBH
    Inventors: Steffen Schott, Stefan Kreissig, Axel Becker, Dietmar Runge
  • Publication number: 20070296403
    Abstract: The present invention relates to a semiconductor device, a unique ID of the semiconductor device and a method for verifying the unique ID. Thus, original data (bit string) having 127-bit length [126:0] is inputted at step S1. Then, it is determined whether the number of bits of “1” in the bit string [126:0] inputted at the step S1 is more than the half of the bits of the bit string (that is, not less than 64) or not at step S2. When the number is not less than 64, the process proceeds to step S3. At the step S3, the bit string [126:0] is inverted and an invert bit [127] is set to “1”. Then, the process proceeds to step S5. At the step S5, the fuse corresponding to the bit string [126:0] and the bit [127] are cut by LT.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 27, 2007
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Yasufumi Mori, Katsuhiko Azuma, Manabu Miura
  • Publication number: 20070296404
    Abstract: A distance measuring device, in particular a magnetostrictive distance measuring device wherein a distance measuring element extends in longitudinal direction of the device along the measurable measuring distance, relative to which a signal generating signal generator can be moved in longitudinal direction, with a longitudinal housing shaped as a circumferentially enclosed profile (1) with constant cross section contour in longitudinal direction (10), a wave conductor unit in the interior of the profile (1), wherein the wave conductor of the wave conductor unit extends in longitudinal direction (10) of the profile (1), processing electronics in the interior of the profile (1), a traveler moveable in longitudinal direction (10) along the outside of the profile (1), in particular with a magnet as signal generator, wherein the profile (1) is shaped so that it can be positioned in lateral direction in a form fit manner, within a circular interior contour surrounding the outside contour of the profile (1) by more
    Type: Application
    Filed: April 19, 2005
    Publication date: December 27, 2007
    Applicant: ASM Automation Sensorik Messtechnick GmbH
    Inventor: Klaus Steinich
  • Publication number: 20070296405
    Abstract: System and corresponding method for plotting an image on a thin material having variations in thickness. System (40) includes: a plotter unit (46), for plotting the image on a surface (48) of thin material (42); a control unit (50), for controlling plotter unit (46), for effecting the plotting; and a thickness measuring device (52), for measuring thickness (44) of thin material (42). Control unit (50) receives measured thickness values from thickness measuring device (52), and uses measured thickness values for adjusting plotting of the image via plotter unit (46), to compensate for variations in thickness (44) of thin material (42).
    Type: Application
    Filed: June 25, 2007
    Publication date: December 27, 2007
    Applicant: ORBOTECH LTD.
    Inventors: Amnon GANOT, Golan HANINA
  • Publication number: 20070296406
    Abstract: The present invention provides for a current induced switching magnetoresistance device comprising a magnetic multilayer composed of a first ferromagnetic layer, a nonferromagnetic layer, and a second ferromagnetic layer, wherein the first ferromagnetic layer has an upper electrode, the second ferromagnetic layer pinned by an antiferromagnet, wherein the antiferromagnet contains a lower electrode at its lower part, and the second ferromagnetic layer is embedded with a nano oxide layer. It is preferable to have at least a part of the lower electrode in contact with the second ferromagnetic layer. The magnetoresistance device of the present invention provides a lower critical current (Ic) for the magnetization reversal and has an increased resistance.
    Type: Application
    Filed: October 28, 2005
    Publication date: December 27, 2007
    Applicant: Korea Institute of Science and Technology
    Inventors: Kyung-Ho Shin, Nguyen Hoany Yen, Hyun-Jung Yi
  • Publication number: 20070296407
    Abstract: The method of testing a magnetic head is capable of purely evaluating characteristics of the magnetic head without influences caused by external factors. The method of testing a magnetic head comprises the steps of: detecting amount of noises, which are included in output signals of a reading element of the magnetic head, a plurality of times in a state of reading no magnetic data; and comparing an amount of variation between the detected amounts of noises with a threshold value.
    Type: Application
    Filed: September 6, 2006
    Publication date: December 27, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Masatoshi Sudou
  • Publication number: 20070296408
    Abstract: A method and a system of temperature-control for an electronic component are provided, in which a plurality of temperature sensors is disposed in each area of the electronic component. The temperature-control method includes obtaining a plurality of sensed temperature values; looking up a temperature-control table recording the relationship between a temperature-control threshold and a temperature-control operation set for each area; selecting the temperature-control operation corresponding to sensed temperature values greater than the temperature-control thresholds depending on the temperature-control table; and starting the temperature-control operation to make the sensed temperature values being lower than or equal to the temperature-control thresholds.
    Type: Application
    Filed: December 11, 2006
    Publication date: December 27, 2007
    Applicant: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Tse-Hsine Liao, Ting-Kuo Kao
  • Publication number: 20070296409
    Abstract: The present invention relates to a reference-current optimizing apparatus of a double relaxation oscillation SQUID. According to the present invention, the optimizing apparatus is connected to a RJ-DROS in order to vary a reference current. Accordingly, the DROS can have a high response level and can operate stably, by controlling a magnetic flux-voltage conversion characteristic. Furthermore, when the RJ-DROS is fabricated, reference junctions having different critical currents are controlled to have the same reference current. Therefore, the reference junctions can have the same magnetic flux-voltage characteristic. In addition, a preamplifier having a plurality of junction bipolar transistors serves to prevent an input application current of the preamplifier from flowing into the optimizing apparatus when the output of a reference junction is detected. This enables the DROS to operate normally.
    Type: Application
    Filed: July 31, 2006
    Publication date: December 27, 2007
    Applicant: Korea Research Institute of Standards and Science
    Inventors: Jin-Mok Kim, Yong-Ho Lee, Hyukchan Kwon, Kiwoong Kim
  • Publication number: 20070296410
    Abstract: Apparatus comprises a tuning fork having first and second tines, a first magnet disposed on the first tine, and a second magnet disposed on the second tine. In one embodiment the magnets comprise permanent magnets; in another they comprise electromagnets. In a preferred embodiment the magnets have magnetic moments oriented essentially parallel to the axis of the tines and anti-parallel to one another. In operation, the apparatus is made to oscillate at or near its resonant frequency, and in the presence of a magnetic field a parameter of the oscillation (e.g., its frequency, phase or amplitude) is altered in a fashion that allows the magnitude or direction of the magnetic field to be determined. In a preferred embodiment, the tuning fork is disposed within a vacuum enclosure, which increases the Q of the apparatus.
    Type: Application
    Filed: June 26, 2006
    Publication date: December 27, 2007
    Inventors: Girsh Elias Blumberg, Brian Scott Dennis
  • Publication number: 20070296411
    Abstract: A sensor includes a signal generation module including a magnetic sensor to provide position information for generating first and second waveforms corresponding to the position information. An analog signal processing module provides an algebraic manipulation of a subset of the first waveform, the second waveform, a first inverted waveform, and a second inverted waveform, to generate a linear output signal.
    Type: Application
    Filed: June 21, 2006
    Publication date: December 27, 2007
    Inventors: Monica J. Thomas, Michael C. Doogue, Hooman Bustani
  • Publication number: 20070296412
    Abstract: The invention relates to a method and a device for examining molecules by means of NMR spectroscopy. It is the object of the invention to be able to characterize a sample with a high resolution and comprehensively. The object is solved by a method and an associated device for examining a sample by means of nuclear magnetic spectroscopy by measuring heteronuclear and homonuclear J-couplings in a small magnetic field and by using the measured heteronuclear and homonuclear J-couplings for characterizing the sample.
    Type: Application
    Filed: March 2, 2007
    Publication date: December 27, 2007
    Applicant: Forschungszentrum Julich GmbH
    Inventors: Stephan Appelt, Holger Kuhn, Ulrich Sieling, Friedrich-Wolfgang Hasing
  • Publication number: 20070296413
    Abstract: An embodiment of the invention relates to a portable or handheld device for performing NMR analysis. The device comprises a console and a strip which can be placed into the console through a slot or other means. The strip comprises a sample holding place and a microcoil for generating an excitation magnetic field across a sample in the sample holding space. A permanent magnet is provided either by the console or the strip and generates a static magnetic field which, together with the excitation magnetic field, creates NMR within the sample. Other embodiments of the invention also encompass method of performing NMR analysis using the portable device and method of making such devices.
    Type: Application
    Filed: September 6, 2007
    Publication date: December 27, 2007
    Applicant: INTEL CORPORATION
    Inventors: Chang-Min Park, Shriram Ramanathan, Patrick Morrow, Kenneth Cadien
  • Publication number: 20070296414
    Abstract: A method and apparatus for local grading shielding includes a gradient shield loop having a plurality of arcs positioned adjacent to a superconducting magnet coil. The plurality of arcs magnetically couple with a gradient magnetic field generated by a magnetic field gradient to locally shield the superconducting magnet coil.
    Type: Application
    Filed: June 22, 2006
    Publication date: December 27, 2007
    Inventor: Xianrui Huang
  • Publication number: 20070296415
    Abstract: This invention relates to a metal detector using multiple frequency signals generated and processed digitally. The detector transmits sinusoidal signals using a multiple frequency resonator or square waves, with optional modulation. The operation of the transmitter is continuously monitored to allow for tuning, detection of abnormal conditions and correction of phase shifts.
    Type: Application
    Filed: August 26, 2005
    Publication date: December 27, 2007
    Applicant: MINELAB ELECTRONICS PTY LIMITED
    Inventor: Laurentiu Stamatescu
  • Publication number: 20070296416
    Abstract: A circuit for detecting the end of life of a fluorescent lamp is provided. In this circuit, a rectifier rectifies a voltage signal detected from a ballast. A phase detector detects the phase of the voltage signal and outputs at least one phase detection signal. A signal separator separates the rectified voltage on a phase basis to generate first and second voltage signals in response to the phase detection signal. A first maximum level detector detects the maximum level of the first voltage signal. A second maximum level detector detects the maximum level of the second voltage signal. A first comparison unit compares the first and second maximum levels and detects whether or not the difference is higher than a predetermined allowable level. A controller determines whether or not the fluorescent lamp is at the end of life in response to the detection from the first comparison unit.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 27, 2007
    Inventors: Young-Sik Lee, Gye-Hyun Cho
  • Publication number: 20070296417
    Abstract: It is intended to realize measuring of trace organic components and to render qualitative procedure efficient through imparting of selectivity. Penning gas and dopant gas are ionized in a space isolated from discharge part with the use of metastable helium obtained by direct-current glow discharge, and with the use of thus obtained plasma, the efficiency of ionization of components to be measured is enhanced, so that intensified ion current can be obtained. Further, through selection of dopant gas and Penning gas, selectivity can be imparted. Thus, not only can measuring of trace organic components be performed but also selectivity can be imparted.
    Type: Application
    Filed: October 27, 2005
    Publication date: December 27, 2007
    Applicant: HITACHI HIGH-TECH SCIENCE SYSTEMS CORPORATION
    Inventors: Shinji Kurita, Norio Kawamura, Masahiro Takeuchi
  • Publication number: 20070296418
    Abstract: A flexible circuit and continuity testing device may include a flexible printed circuit substrate. A battery having a positive and negative terminal may be attached to the substrate. An illumination source, e.g., an LED, may be attached to the substrate. The testing device may include a flexible electrical contact array, a small bulb tester, a fuse tester and a system tester. Each of these may be incorporated into the substrate and coplanar with the substrate. The contact array may include a planar coil shape, a semicircular shape, a pair of parallel contacts, a set of converging contacts or other configurations. The device may be about the size and shape of a credit card. The substrate may include a magnet or a pocket clip.
    Type: Application
    Filed: June 14, 2007
    Publication date: December 27, 2007
    Inventor: James Jacques
  • Publication number: 20070296419
    Abstract: Two electronic device holding portions 19 are formed on an insert to be attached to a test tray TST of an electronic device handling apparatus 1, and the two electronic device holding portions 19 are arranged at positions sandwiching a standard hole 20a used as a positional standard when aligning. When using an insert having a plurality of electronic device holding portions 19, the number of IC devices 2 to be held per a unit area on the test tray TST increases and the throughput improves. Also, when arranging the two electronic device holding portions 19 at positions sandwiching the standard hole 20a, both of the electronic device holding portions 19 can be close to the standard hole 20a, so that positional deviation of the IC devices 2 caused by thermal expansion or thermal contraction of the insert 16 can be suppressed and arising of contact mistakes caused by positional deviation is suppressed.
    Type: Application
    Filed: November 22, 2005
    Publication date: December 27, 2007
    Applicant: ADVANTEST CORPORATION
    Inventors: Mitsunori Aizawa, Akihiko Ito
  • Publication number: 20070296420
    Abstract: A device for testing connectivity is provided. The device includes a first connector including a contact pin and a spacer for biasing the contact pin away from a spring contact pin of a second connector, when the first connector is inserted into the second connector. The device also includes an indicator, coupled to the contact pin of the first connector, for indicating whether the contact pin of the first connector is in contact with the spring contact pin of the second connector.
    Type: Application
    Filed: September 11, 2007
    Publication date: December 27, 2007
    Applicant: DELL PRODUCTS L.P.
    Inventors: Joseph King, Bernard Fet, Shawn Hammer, Aaron Vowell
  • Publication number: 20070296421
    Abstract: A voltage drop measurement circuit includes a voltage drop circuit to generate an output voltage and fluctuate the output voltage according to a fluctuation in a power supply voltage, where the output voltage being the power supply voltage dropped by a predetermined amount and a flip-flop to retain a flag indicating a drop in the power supply voltage according to the output voltage.
    Type: Application
    Filed: June 7, 2007
    Publication date: December 27, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Toshiyuki MATSUNAGA
  • Publication number: 20070296422
    Abstract: A probe card assembly can comprise an interface, which can be configured to receive from a tester test signals for testing an electronic device. The probe card assembly can further comprise probes for contacting the electronic device and electronic driver circuits for driving the test signals to ones of the probes.
    Type: Application
    Filed: June 6, 2006
    Publication date: December 27, 2007
    Inventor: Charles A. Miller
  • Publication number: 20070296423
    Abstract: A wafer support assembly has a first wafer support plate having a first grid pattern allowing first probe access through the first grid pattern to a first side of a wafer in the wafer support assembly and a second wafer support plate having a second grid pattern allowing second probe access through the second grid pattern to a second side of the wafer in the wafer support assembly.
    Type: Application
    Filed: May 25, 2006
    Publication date: December 27, 2007
    Inventors: Michael Whitener, Allen Anderson, John Larson, Matt Condron, Stephen Gilbert, Jose Marroquin, Matthew Richter, Ron Strehlow, Hassan Tanbakuchi, David Taylor
  • Publication number: 20070296424
    Abstract: A paddle board probe card for connecting a device under test with an ATE tester by means of ZIF connectors is presented. The paddle board probe card may include more than one printed circuit board mounted on a probe card in such a manner that the more than one printed circuit boards mate with ZIF connectors on an ATE testhead interface.
    Type: Application
    Filed: May 31, 2006
    Publication date: December 27, 2007
    Inventors: Romi Mayder, John W. Andberg
  • Publication number: 20070296425
    Abstract: In one embodiment, a probe for probing test points on a target board includes a printed circuit board, a frame, and a plurality of spring pins. The printed circuit board (PCB) has a first side with a plurality of solder pads thereon, and a plurality of signal routes that are electrically coupled to the solder pads for routing signals to a test instrument. The frame is mechanically coupled to the PCB and has a main body portion with a plurality of holes therein. The holes in the frame are aligned with the plurality of solder pads on the first side of the PCB. The plurality of spring pins are provided for probing the test points on the target board, with each spring pin being i) disposed in one of the holes in the frame, perpendicularly abutting the first side of the PCB, and ii) electrically coupled to one of the solder pads. Other embodiments, including a method of making a probe, are also disclosed.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 27, 2007
    Inventors: Brock J. LaMeres, Brent Holcombe
  • Publication number: 20070296426
    Abstract: An apparatus and method for testing large area substrates is described. The large area substrates include patterns of displays and contact points electrically coupled to the displays on the large area substrate. The apparatus includes a prober assembly that is movable relative to the large area substrate and/or the contact points, and may be configured to test various patterns of displays and contact points on various large area substrates. The prober assembly is also configured to test fractional sections of the large area substrate positioned on a testing table, and the prober assembly may be configured for different display and contact point patterns without removing the prober assembly from the testing table.
    Type: Application
    Filed: May 9, 2007
    Publication date: December 27, 2007
    Inventors: SRIRAM KRISHNASWAMI, Matthias Brunner, William Beaton, Yong Liu, Benjamin Johnston, Hung Nguyen, Ludwig Ledl, Ralf Schmid
  • Publication number: 20070296427
    Abstract: There is provided a method for detecting a height of a tip of a probe before detecting a horizontal position of the probe tips of the probe, by using an alignment device having a first imaging unit and a second imaging unit provided at the mounting table. In the method, at a first step, a height of a load sensor provided in the mounting table is detected by using the first imaging unit. Further, at a second step, the mounting table is moved to make the probe come in contact with the load sensor and a height of the probe tip is detected based on a moving amount of the mounting table. In addition, it is confirmed whether the load sensor operates normally by using a pin, between the first and the second step.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 27, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Yoshinao KONO
  • Publication number: 20070296428
    Abstract: A semiconductor device with the function of monitoring the rise time of the supply voltage at power on is provided. The semiconductor device includes an electrode pad, an internal circuit and a monitoring unit. An input power source supplies the internal supply voltage to the internal circuit via the electrode pad. The internal circuit normally operates when the internal supply voltage is within an operating voltage range. The monitoring unit monitors the interval between the time when the internal supply voltage is a set voltage and the time when the internal supply voltage is changed to the operating voltage range as the rise time.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 27, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Yuji KOBAYASHI, Kazunori OZAWA
  • Publication number: 20070296429
    Abstract: A probe contacting electrode that is formed on a surface of a package of an electronic device and to which a probe of a probe device is contacted, including a lower layer part and an upper layer part made of a softer conductive material than a conductive material that forms the lower layer part.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 27, 2007
    Applicant: EPSON TOYOCOM CORPORATION
    Inventor: Shoichi Nagamatsu
  • Publication number: 20070296430
    Abstract: To provide a control method and a control program of a prober that are capable of enhancing throughput. Chips are tested in step S2. In step S3, when the counted number Y of conforming chips has reached a predetermined number of conforming chips X which constitutes conditions for testing, the process advances to step S10. In step S10, testing of wafers taking place at that time is interrupted, and this wafer is stored in an output cassette OC1. In a subsequent step S11, the subsequent wafer is tested, and stored in the output cassette OC2 (step S12). When all wafers have been tested, the process advances to step S14, and testing of the lot is completed. As a result, wafers that remain untested and wafers that have been tested stored separately in the input cassette and the output cassettes.
    Type: Application
    Filed: June 20, 2007
    Publication date: December 27, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Yasukazu Ono
  • Publication number: 20070296431
    Abstract: A membrane probing assembly includes a support element having an incompressible forward support tiltably coupled to a rearward base and a membrane assembly, formed of polyimide layers, with its central region interconnected to the support by an elastomeric layer. Flexible traces form data/signal lines to contacts on the central region. Each contact comprises a rigid beam and a bump located in off-centered location on the beam, which bump includes a contacting portion. After initial touchdown of these contacting portions, further over-travel of the pads causes each beam to independently tilt locally so that different portions of each beam move different distances relative to the support thus driving each contact into lateral scrubbing movement across the pad thereby clearing away oxide buildup. The elastomeric member backed by the incompressible support ensures sufficient scrub pressure and reliable tilt recovery of each contact without mechanical straining of the beam.
    Type: Application
    Filed: August 29, 2007
    Publication date: December 27, 2007
    Inventors: K. Gleason, Kenneth Smith, Mike Bayne
  • Publication number: 20070296432
    Abstract: A performance board able to secure low loss, low reflection, stable transmission characteristics even when using a high frequency signal to test an electronic device and able to suppress signal leakage to the outside and entry of noise, provided with a base board having a signal pattern electrically connected with a socket formed on its front surface, a coaxial connector to which a coaxial cable electrically connecting the performance board and test apparatus is connected, passing through the base board from the back surface toward the front surface, and having a front exposed part of the center contact bent and electrically connected to the signal pattern, and a cover member covering the front exposed part of the center contact and correcting the impedance of the front exposed part.
    Type: Application
    Filed: June 1, 2006
    Publication date: December 27, 2007
    Applicant: Advantest Corporation
    Inventors: Hiroyuki Mineo, Atsunori Shibuya
  • Publication number: 20070296433
    Abstract: In some embodiments of the invention, a probing apparatus can comprise a substrate, a spring structure attached to the substrate, and a plurality of resilient probes attached to the spring structure. Each probe can comprise a contact portion disposed to contact a device. The spring structure can provide a first source of compliance for each of the probes in response to forces on the contact portions of the probes, and each of the probes can individually provide second sources of compliance in response to the forces on the contact portions of the probes.
    Type: Application
    Filed: June 13, 2006
    Publication date: December 27, 2007
    Inventor: John K. Gritters
  • Publication number: 20070296434
    Abstract: An electric power is supplied to a semiconductor device while thermally insulating the semiconductor device by bringing a thermal insulating material into contact with the semiconductor device. An internal temperature of the semiconductor device is raised by internal-heating of the semiconductor device. The thermal insulating material is separated from the semiconductor device when the internal temperature reaches a predetermined temperature.
    Type: Application
    Filed: October 24, 2006
    Publication date: December 27, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Yamada, Takashi Morimoto
  • Publication number: 20070296435
    Abstract: A probe for contacting and testing ICs on a semiconductor device includes a dielectric insulating material tip. The dielectric tip does not contaminate the surface being probed unlike metal probe tips. A contact scrub is further not required with signals being capacitively or inductively coupled from the probe tip to the IC. Testing can be performed during early fabrication steps of the wafer without the need for applying a metalization layer to the wafer to form bond pads. Testing can be performed by inductively coupling an AC signal to the probe tip, with coupling enhanced by including a magnetic material in the dielectric probe tip. Using an AC test signal enables testing of ICs without requiring separate power and ground connections.
    Type: Application
    Filed: June 6, 2006
    Publication date: December 27, 2007
    Applicant: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, A. Nicholas Sporck, Charles A. Miller
  • Publication number: 20070296436
    Abstract: Disclosed herein are electrical test probes and methods for making the same. In one embodiment, an electrical test probe comprises: a barrel, a plunger, a contact element, and a spring. The barrel comprises a contact area defined by a stop engagement and an opening at a first end of the barrel. The plunger is slidably disposed through the opening, the contact element, and the contact area. The plunger comprises a tip and a stop protrusion with a plunger extension extending therebetween. The contact element is disposed in the contact area, between the barrel and the plunger. The spring is in operational engagement with the plunger.
    Type: Application
    Filed: January 10, 2007
    Publication date: December 27, 2007
    Applicant: RIKA DENSHI AMERICA, INC.
    Inventor: John M. Winter
  • Publication number: 20070296437
    Abstract: An apparatus and method for testing large area substrates is described. The large area substrates include patterns of displays and contact points electrically coupled to the displays. The apparatus includes a prober assembly that is movable relative to the large area substrate and may be configured to test various patterns of displays and contact points. The prober assembly is also configured to test fractional sections of the large area substrate. The apparatus also includes a test chamber configured to store at least two prober assemblies within an interior volume.
    Type: Application
    Filed: May 9, 2007
    Publication date: December 27, 2007
    Inventors: Benjamin Johnston, Sriram Krishnaswami, Hung Nguyen, Matthias Brunner, Yong Liu
  • Publication number: 20070296438
    Abstract: A method is presented of designing semiconductor probe cards to have the optimum number and placement of die probe sites for function testing integrated circuit (IC) die at semiconductor wafer test, while minimizing the number of times the probe card must be moved (number of “touchdowns”) to test all the IC die on a semiconductor wafer, as well as minimizing the number of individual IC die on the wafer that are probed more than once during the wafer test. Each specific arrangement of probe sites is tested against other patterns for efficiency in testing in what is known as a genetic algorithm. The most efficient patterns are moved into the next generation with modified features obtained by crossovers between two efficient individuals, and with random mutations, until a selected efficiency is obtained, or until a maximum number of generations have occurred.
    Type: Application
    Filed: May 24, 2006
    Publication date: December 27, 2007
    Inventors: Brooklin J. Gore, Michael R. Allen
  • Publication number: 20070296439
    Abstract: By providing a plurality of resistors and a plurality of test patterns within a leakage current test structure, the number of probe pads required for estimating the plurality of test patterns may be significantly reduced, wherein, in some illustrative embodiments, several test patterns may be simultaneously assessed on the basis of two probe pads. Consequently, process parameters and/or design parameters for manufacturing metallization structures of semiconductor devices may be efficiently monitored and controlled.
    Type: Application
    Filed: January 16, 2007
    Publication date: December 27, 2007
    Inventors: Frank Feustel, Thomas Werner, Carsten Peters
  • Publication number: 20070296440
    Abstract: A semiconductor integrated circuit apparatus, and more particularly a technology for measuring and managing a physical amount of factors that exert an influence upon an operation of a semiconductor integrated circuit is provided; more particularly, a semiconductor integrated circuit that is an object of measurement, and a measurement circuit which measures a physical factor that exerts an influence upon the actual operation of the semiconductor integrated circuit, such as jitter or noise jitter, and noise of this semiconductor integrated circuit are provided on an identical chip; also, a measurement result of the measurement circuit of the present invention is analyzed, and is fed back to a circuit for adjusting the semiconductor integrated circuit that is the object of measurement.
    Type: Application
    Filed: August 30, 2007
    Publication date: December 27, 2007
    Applicant: NEC CORPORATION
    Inventors: Makoto TAKAMIYA, Masayuki Mizuno
  • Publication number: 20070296441
    Abstract: An integrated circuit includes switching means for selectively connecting the bond pads to functional core logic and isolating the bond pads from second conductors, and the switch means for selectively connecting the bond pads to the second conductors to provide bi-directional connections between the bond pads on opposite sides of the substrate and isolating the bond pads from the functional core logic.
    Type: Application
    Filed: September 5, 2007
    Publication date: December 27, 2007
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Lee Whetsel
  • Publication number: 20070296442
    Abstract: A test structure for statistical characterization of local device mismatches contains densely populated SRAM devices arranged in a row/column addressable array that enables resource sharing of many devices. The test structure includes a built-in sensing mechanism to calibrate or null out sources of error, and current steering to avoid negative effects of current leakage along spurious paths. The gate and drain lines of each column are driven from both the top and bottom to minimizes parasitic effects. The system can handle a large number of devices while still providing high spatial resolution of current measurements.
    Type: Application
    Filed: June 8, 2006
    Publication date: December 27, 2007
    Inventors: Kanak B. Agarwal, Ying Liu, Chandler T. McDowell, Sani R. Nassif, James F. Plusquellic, Jayakumaran Sivagnaname
  • Publication number: 20070296443
    Abstract: A method, system and computer program product for diagnosing a bridging defect in an integrated circuit including multiple nodes are disclosed. Quiescent power supply current (IDDQ) of the integrated circuit (IC) is measured under multiple test vectors. Logic states of the nodes on the IC are also obtained under the multiple test vectors. The nodes are partitioned into sets based on their logic states under low-current test vectors. Large sets are further divided into subsets (“state-count subsets”) based on the logic states of nodes under high-current test vectors. For large sets, explicit evaluation under the IDDQ bridge fault model is performed only on pairs of nodes belonging to subsets having complementary state counts, to save system resources in computation. Exhaustive diagnosis considering all pairs of nodes on the IC is thus feasibly achieved due to the saving of system resources.
    Type: Application
    Filed: June 13, 2006
    Publication date: December 27, 2007
    Inventor: Douglas C. Heaberlin
  • Publication number: 20070296444
    Abstract: A test structure includes first and second combs, at least a first pair of base nodes, and a second pair of finger nodes. The first comb includes a first base and a first plurality of fingers extending from the first base. The second comb includes a second base and a second plurality of fingers extending from the second base. At least a portion of the first and second pluralities of fingers are interleaved. The first pair of base nodes extend from the first base. The second pair of finger nodes extend from a first finger of the first plurality of fingers.
    Type: Application
    Filed: June 27, 2006
    Publication date: December 27, 2007
    Inventors: Jianhong Zhu, David D. Wu, Mark W. Michael
  • Publication number: 20070296445
    Abstract: A semiconductor chip flipping assembly and an apparatus for bonding a semiconductor chip using the same are disclosed. In accordance with the semiconductor chip flipping assembly and the apparatus for bonding a semiconductor chip using the same, a front surface of a wafer is mounted in a wafer holder to face downward. Each of dies of the wafer is then pushed downward to a tray disposed therebelow, thereby eliminating a need for a separate flipping process of the semiconductor chip and two or more robot arms.
    Type: Application
    Filed: June 19, 2007
    Publication date: December 27, 2007
    Applicant: SIGO Co., Ltd.
    Inventor: Sung Chul Kim
  • Publication number: 20070296446
    Abstract: An operation monitor system externally outputs a sufficient amount of condition information that indicates an internal operation condition, without using a dedicated terminal, that is to say, without a significant increase in cost. An output control unit of a semiconductor apparatus specifies an IF unit that is not currently performing input/output with respect to an IO unit, selects a selector connected to the specified IF unit, and outputs thereto a select signal indicating that the selected selector is to be used in the output of an internal operation output signal (internal monitoring data), which is the operation condition. The selector that has received the select signal selects the internal condition output signal, and outputs the selected internal condition output signal to an information collection apparatus via the IO unit.
    Type: Application
    Filed: May 8, 2007
    Publication date: December 27, 2007
    Inventor: Masahiro Ishii
  • Publication number: 20070296447
    Abstract: A monitoring pattern for detecting a defect in a semiconductor device allows a voltage contrast inspection which may be verified by an electrical test where no special test pattern is required for the electrical test. The monitoring pattern includes a test pattern with line shapes arranged in parallel and spaced apart at predetermined linewidths and intervals, and an interconnection layer connected to the test pattern, where the test pattern is adapted to be charged with a specific potential to be displayed as a voltage contrast image when scanned with an electron beam.
    Type: Application
    Filed: May 17, 2007
    Publication date: December 27, 2007
    Inventors: Choel-Hwyi Bae, Yong-Woon Han, Mi-Joung Lee, Sang-Deok Kwon