Abstract: Disclosed are a light emitting device and a display device using the same. The light emitting device includes a first electrode formed on a top surface of a substrate and a second electrode formed on a top surface of the light emitting layer. The light emitting layer auxiliary light emitting particles that convert the path of light, so that brightness of the light emitting device and the display device is improved.

Abstract: An optical includes an optical body including a plurality of side faces where one of the plurality of side faces defines a light entrance face onto which a blue light is incident. A light exit face is connected to at least one of the side faces, and a yellow fluorescent layer is disposed on the light entrance face and is configured to convert the blue light into a white light.

Abstract: A light-source fixing structure for the backlight module is disclosed. The light-source fixing structure includes: a light guide plate provided with a light-incident surface; a cover having a groove, wherein the groove has a surface facing toward to the light-incident surface of the light guide plate; a light bar arranged upon the surface of the groove. The light bar may be replaced easily by sliding out from the groove when the light bar is damaged. The cover not only may enhance the strength of the backlight module but also may prevent the backlight module over temperature.

Abstract: Various embodiments of corner-coupled backlights are described, where one or more LEDs are optically coupled to a truncated corner of a solid rectangular light guide backlight. In one embodiment, a high-power, white light LED is mounted in a small reflective cavity, which is then coupled to a flattened corner of the light guide. The reflective cavity provides a more uniform light distribution at a wide variety of angles to the face of the truncated corner to better distribute light throughout the entire light guide volume. This creates a more uniform light guide emission into the liquid crystal layers. In other embodiments, an LED is mounted in a small cavity near a corner of the light guide, and a reflector is mounted on the corner of the light guide. Various techniques for removing heat from the LED without adding additional area requirements are also disclosed.

Abstract: One or more LEDs are mounted within an LCD without the use of any printed circuit board (PCB), thus reducing the thickness of the LCD by about the thickness of the conventional PCB. In one embodiment, the LED and submount are mounted so that the submount is opposing the liquid crystal layer side of the LCD, so that the liquid crystal layers provide the mechanical support for the submount and LED die. The LED die (mounted on the submount) may be inserted into a cavity formed in the “top” surface of the light guide, and the top surface of the light guide is abutted against the liquid crystal layers. In such a configuration, the LED light source, including all supporting components, adds no thickness to the LCD. In another embodiment, on the “bottom” surface of the LCD opposing the LED die is an electrically switchable mirror that is either reflective or transparent. In its transparent state, the LED in the LCD may be used as a flash in a cell phone camera, while the LCD may be viewed to take the picture.

Abstract: The present invention relates to an edge lighted display system having multiple display faces. The edge lighted display system having multiple display faces includes a plurality of light guide plates respectively having both sides bent at a predetermined angle, a cylindrical or polyhedral pillar-shaped three-dimensional structure formed by bent distal ends of the light guide plates, LED light source assemblies linearly arranged at the ends of the junctions of the light guide plates, so that light energy from light sources can be incident on two sheets of the light guide plates simultaneously, covering plates securely mounted on top and bottom surfaces of a three-dimensional structure formed by interconnecting the plurality of light guide plates, a thin opaque or black board disposed on an inner wall surface of the light guide plate, and thin transparent graphic elements adhered on an outer wall surface of the light guide plate.

Abstract: A side light type backlight includes a light source including a plurality of LEDs, and a light guide plate. One of the end surfaces of the light guide plate is a light incidence surface at which a plurality of R-LEDs, a plurality of G-LEDs and a plurality of B-LEDs are arranged. LEDs satisfy the relationship of: a distribution range of light emitted from G-LEDs<a distribution range of light emitted from R-LEDs, or a distribution range of light emitted from G-LEDs<a distribution range of light emitted from B-LEDs. Also, LEDs are electrically connected to each other.

Abstract: A light guide device and a light guide plate using the same are provided. The light guide device has a first surface, a second surface, and a bottom surface. The first surface, the second surface, and the bottom surface define the internal part of the light guide device. The bottom surface has a cavity. When a light source in the cavity generates light, the light from the internal part of the light guide device is emitted via the first surface.

Abstract: Light guides of various shapes are configured to adjust the angle of the individual light rays in a bundle of light within the light guide so that the angle of the respective rays are adjusted towards an acceptance angle of a hologram embedded within the light guide. The hologram embedded in the light guide is configured to eject individual rays towards the display elements when the respective rays are within a range of acceptance angles.

Abstract: An optical substrate possesses a structured surface that enhances luminance or brightness and reduces chatter phenomenon. A structured surface is provided, in which some of the valleys (low valleys) are coplanar to the surface of the underlying support layer and other valleys (high valleys) are not coplanar on the support layer. The low valleys have bottom thickness that is substantially smaller than that of the high valleys. The distance from the valleys to the support layer remains substantially similar for a first number of adjacent valleys, but is substantially zero for a second number of adjacent valleys after every n-th adjacent valleys.

Abstract: A switched mode power supply is equipped with an auxiliary voltage supply (6; 60) supplying electrical energy to a controller (5; 50), which controls the switching of a switching transistor (4; 40). The auxiliary voltage supply (6; 60) receives a feedback signal from a feedback device (7; 70), which is coupled, to the output (2) of the power supply. In accordance with this feedback signal, the auxiliary voltage supply is arranged to reduce its supply of electrical energy to the controller in response to a decrease of the load at the output of the power supply, thereby reducing power dissipation in the power supply during low loading conditions.

Abstract: A resonant switching power source device is provided which comprises first and second MOS-FETs 1 and 2 connected in series to a DC power source 3, a first transformer 5 which has a first primary winding 6a connected in parallel to first or second MOS-FET 1 or 2 and in series to a first capacitor 4, a first rectifying smoother 10 connected between a secondary winding 5b of first transformer 5 and first output terminals 11, 12, a second transformer 6 which has a primary winding 6a connected in parallel to primary winding 6a of first transformer 5, and a second rectifying smoother 20 and an output-regulatory MOS-FET 41 connected between a secondary winding 6b in second transformer 6 and second DC output terminals 21 and 22 to control peak current flowing through primary windings of transformers 5 and 6 and rectifying smoothers 10 and 20 in secondary sides for improvement in power conversion efficiency and to produce stable DC outputs of desired level from a plurality of output terminals 11, 12, 21 and 22.

Abstract: A voltage stabilizer circuit of forward converter is disclosed to include a transformer, a first switch, a rectifier, an error amplifier, a control circuit, and a driving circuit. The control circuit outputs a regulation signal that controls turn-on time of the first switch, keeping the output of the load voltage at a stable level.

Abstract: A commutation switch turning-on control switching element is controlled with a voltage generated at a fourth coil (auxiliary coil) of a main transformer and controls application of a control voltage to a control terminal of a commutation switching element. A commutation switch turning-off control switching element is provided which is connected to the control terminal of the commutation switching element and, when the commutation switch turning-off control switching element is turned on, controls a voltage at the control terminal of the commutation switching element to turn off the commutation switching element. A control switching element drive circuit turns on the commutation switch turning-off control switching element at a time when a primary switching element is turned on.

Abstract: A first drive control signal regenerating circuit outputs an ON timing drive signal at turn-ON of a main switch element, and a second drive control signal regenerating circuit generates an OFF timing drive signal at turn-OFF of the main switch element. A rectifying switch controlling switch element connected between the gate and source of a rectifying switch element is driven by an output of the second drive control signal regenerating circuit. An output of the first drive control signal regenerating circuit connects to the gate of a commutating switch controlling switch element, which connects to one end of an auxiliary winding, the other end thereof being connected to the gate of a commutating switch element. Accordingly, the rectifying switch element is directly controlled from the primary side.

Abstract: In one embodiment, an SMPS includes a rectifier for generating an input DC voltage from an input AC voltage. A switching transistor is coupled to a primary coil of a transformer for generating power which is transferred to a second side of the transformer according to an operation of the switching transistor. A switching controller receives a feedback voltage corresponding to an output voltage, a sensing signal corresponding to a current flowing through the switching transistor, and a first signal corresponding to a voltage difference between a first electrode and a second electrode of the switching transistor. The switching controller controls an on/off operation of the switching transistor. The switching controller sets a threshold period whenever the first signal has a value greater than a reference value, thereby setting a plurality of threshold periods during operation of the switching mode power supply.

Abstract: A circuit for an Intelligent Electrical device (IED) is disclosed. Using this circuit, the IEDs can be used in harsh industrial environments, such as those present in power utility substations. The circuit may comprise a dual stage isolated power supply. The dual stage isolated power supply has a first DC to DC converter for converting received power from the received voltage to an intermediate voltage. The intermediate voltage is then further converted to a voltage which can be used by the Ethernet IED. Each of the DC to DC converters also provide galvanic isolation and also transient suppression and electromagnetic interference filtering to decrease adverse electrical effects which may be inherent in the power received from an external source. The first and second DC to DC converter provides a first level of galvanic isolation which is greater than the second level of galvanic isolation provided by the second DC to DC converter.

Abstract: Disclosed is a method and apparatus that includes a power supply having a primary coil and a secondary coil. The secondary coil generates an output voltage and a feedback voltage related to the output voltage. The feedback voltage is sampled at a time instant that is digitally controllable. The output voltage is determined from the feedback voltage.

Abstract: An AC machine control system for an AC machine (motor, generator, transformer, etc.) having open-ended windings, the control system comprising a drive circuit configured to transfer AC power between a first set of voltages and each end of the open-ended windings without the use of a substantial energy storage device, while eliminating common mode voltage and/or injecting zero sequence voltages.

Abstract: A power supply having multiple power output includes a power source to supply an AC signal to an EMI filter unit and a commutation unit that filter and commutate the AC signal and output a full wave/half wave pulse wave DC signal to an inverter which boosts voltage and outputs a high voltage electric signal to drive a first load. The invention further has a DC voltage transformation unit to receive the full wave/half wave pulse wave DC signal to lower the voltage and output a low voltage electric signal to a second load. Thus the power supply can supply multiple power and is more flexible and efficient. It can be adopted on display devices to provide low voltage DC power for other peripheral devices such as speakers, lamps, 3C products and the like.

Abstract: A method and a parallel connection arrangement for equalizing the output powers of power converter units (INU11, INU12), in which power converter units is a semiconductor switch bridge controlled with pulse width modulation, and in which is a control unit arrangement (CU1, CU2) for forming control pulses, with which the semiconductor switches are controlled. The control unit arrangement delays the falling edge of the control pulses of at least one semiconductor switch of at least one power converter unit.

Abstract: A stabilized power supply for X-ray tubes having a first rectifier circuit, an inverter circuit comprising main switches, a transformer, a second rectifier circuit an oscillation circuit and an inverter circuit. The power supply includes an auxiliary circuit that can be driven and is parallel-connected to the oscillation circuit. The auxiliary circuit duplicates changeover switching times of the switches of the inverter in order to limit an overlapping phenomenon that occurs for these switches during the changeover switching operations.

Abstract: An electronic apparatus, AC/DC conversion device and power factor correction circuit are provided. The power factor correction circuit includes an inductance, a switch, a power control chip, a first diode and a first capacitor. The inductance has a first end and a second end. The first end receives a first voltage. The switch has one end coupled to the second end of the inductance and has the other end coupled to a low voltage. The power control chip receives a spread spectrum synchronization signal, and controls turning on/off of the switch by a control signal according to the spread spectrum synchronization signal. The first diode has an anode coupled to the second end of the inductance. The first capacitor has one end coupled to a cathode of the first diode for generating a second voltage and has the other end coupled to the low voltage.

Abstract: A pre-bias protection circuit for a converter circuit including a switching stage having high-and low-side switches connected in series at a switching node and an output stage connected to the switching node having a capacitor having a pre-existing pre-bias voltage at startup of the converter circuit, the pre-bias protection circuit controlling discharge of the pre-bias voltage when the low-side switch is turned ON during a start up of the converter circuit. The pre-bias protection circuit includes a first circuit for providing a first output; a second circuit providing a second output; and a comparator circuit for comparing the first output and the second output and producing a third output comprising a pulse width modulated signal for driving the low side switch such that the pulse width modulated signal starts with a small duty cycle and thereafter increases to a larger duty cycle, thereby to prevent the pre-bias voltage from discharging during startup.

Abstract: A method of controlling low voltage using a waveform of Alternating Current (AC) power, including; a full wave rectification step of fill-wave-rectifying input AC power; a switching step of performing a switching operation to generate four power outputs, whose voltage level is lower than that of set control voltage, in one cycle of the full-wave rectified AC power in such a way as to switch on low voltage portions of a waveform of the full-wave-rectified AC power whose voltage levels are lower than that of the set control power and switch off high voltage portions whose voltage levels are higher than that of the set control power; and an AC power output step of converting the low voltage portions, which are output at the switching step, into Direct Current (DC) voltage and outputting the DC voltage.

Abstract: The present invention provides an inverter with a simple configuration capable of preventing occurrence of excessive rush current. A current detection circuit detects an AC output current flowing out from an output filter circuit. When the absolute value of the AC output current becomes equal to or larger than a threshold, a reset control unit and a drive pulse generation circuit control a DC/AC inverter so as to re-start operation after the AC output voltage becomes 0V. For example, even in the case where a capacitive load is connected during operation of the inverter or in the case where the load includes a standby circuit, excessive rush current is prevented.

Abstract: A method and apparatus for converting X phase intermediate voltages on X intermediate lines to output voltage for driving a single three phase load, the apparatus comprising a positive DC bus, a negative DC bus and first and second three phase drives that each include a rectifier section and an inverter section, the rectifier sections each linked to a separate three of the X intermediate lines and to the positive and negative DC buses and the inverter linked to each of the positive and negative DC buses and to the single phase load such that each of the drives has a common positive DC bus and a common negative DC bus.

Abstract: A power converter directly converting an AC voltage into an AC voltage of any desired magnitude and frequency by turning bidirectional switches ON and OFF without employing any energy buffer, where the peak values of output phase voltage command values are limited, to bring the amplitude of an output line voltage to, at most, 0.866 times the amplitude of the supply line voltages. By way of example, the peak-value limit of the output phase voltage command values is set so that the maximum value of the output phase voltage command values becomes, at most, 0.75 times the maximum value of supply phase voltages, while the minimum value thereof becomes, at least, 0.75 times the minimum value of the supply phase voltages. This control method for the direct power converter dispenses with an expensive dedicated motor, and permits a reduction in cost of the control apparatus as a whole.

Abstract: The present invention provides an induction heating apparatus that can detect that a power factor correction circuit is in operation or in non-operation. The induction heating apparatus includes a power factor correction circuit that corrects a power factor of an inputted direct-current power supply by turning on and off a switching element connected to a choke coil, a booster circuit that boosts an output voltage of the power factor correction circuit by turning on and off a switching element connected to a choke coil, an inverter circuit that inputs the output voltage of the booster circuit to generate a high-frequency current in a heating coil by turning on and off a switching element, and an inverter circuit drive control unit that, in driving the power factor correction circuit, controls output of the inverter circuit such that an input current reaches a target value and detects the voltage in the booster circuit.

Abstract: A level-shift circuit for use with a half bridge in accordance with an embodiment of the present application includes an oscillator operable to provide a timing signal, a level-shift switch controlled by the timing signal of the oscillator, a high side control circuit operable to provide a high side control signal to a high side switch of the half bridge to control the high side switch and a low side control circuit operable to provide a low side control signal to a low side switch of the half bridge to control the low side switch. The level-shift switch is turned ON when the timing signal is high such that the level-shift switch connects the high side control circuit to ground and the high side control signal stays low to keep the high side switch OFF when the timing signal is high. The low side control circuit provides the low side control signal to turn the low side switch ON a predetermined period of time after the timing signal goes high.

Abstract: A switching power supply device includes a primary winding of a transformer that is connected in series to a first switching element, and a secondary winding is provided with a rectifier circuit and an output voltage control circuit arranged to detect an output voltage and feed it back to a control circuit. The control circuit is provided with an on-period control circuit arranged to turn off the first switching element in an on-state based on a feedback signal from the output voltage control circuit and an off-period control circuit arranged to control an off-period thereof by delaying turn-on of the first switching element based on the feedback signal.

Abstract: A DC-DC converter of a synchronous rectifier type, a control circuit thereof and control method thereof, facilitates detecting and interrupting negative inductor current IL with low power consumption, high accuracy and a simple configuration and facilitates improving the efficiency under a light load. An ON-period decision circuit determines whether an ON-period of the synchronous rectifier switch is too long or too short. An ON-period adjustment circuit generates a signal for adjusting the ON-period, during which the synchronous rectifier switch is ON, based on the decision of the ON-period decision part. A delay circuit adjusts the length of the delay, from the time when a signal changing the ON and OFF states of the synchronous rectifier switch changes to ON, to the time when the synchronous rectifier switch is forcibly turned off based on the adjusting signal.

Abstract: A power converter and a power converting method are provided. The power converter for converting an ac input voltage at an input terminal thereof into an ac output voltage at an output terminal thereof includes an energy-storing inductor, a first switching circuit coupled to the energy-storing inductor to selectively switch so that the input terminal of the power converter is coupled to the energy-storing inductor, a second switching circuit coupled to the energy-storing inductor and the first switching circuit to selectively switch so that a common terminal of the power converter is coupled to the energy-storing inductor; and a third switching circuit coupled to the energy-storing inductor, the first switching circuit and the second switching circuit to selectively switch so that the output terminal of the power converter is coupled to the energy-storing inductor.

Abstract: A boost DC/DC includes an inductor connected at one end to the positive-pole terminal of a low-voltage-side port, a transformer of a magnetic-field cancellation type including a primary winding and a secondary winding interconnected in an oppositely-wound configuration, a common terminal of the primary winding and the secondary winding being connected to another end of the inductor. A switching element controls an energizing current of the primary winding flowing to a common reference terminal, and another switching element controls an energizing current of the secondary winding flowing to the common reference terminal. A diode allows current to flow in only one direction from the primary winding to the positive-pole terminal of a high-voltage-side port, and another diode allows current to flow in only one direction from the secondary winding to the positive-pole terminal of the high-voltage-side port.

Abstract: The present invention provides a highly reliable electric power converter reduced in parasitic inductance.

Abstract: The present invention provides a power converter having a structure capable of reducing switching noise and insusceptible to switching noise. The power converter comprises a semiconductor device, a driver device, a current sensor, a control device, and a capacitor. The semiconductor device has a plurality of switching elements for converting a direct current to an alternating current, the direct current being supplied from a direct current terminal. The driver device controls an operation of the plurality of switching elements provided in the semiconductor device. The current sensor detects the alternating current. The control device controls an operation of the driver device in accordance with the alternating current that has been detected by the current sensor. The capacitor is connected with the direct current terminal. The driver device and the control device are mounted on the same printed board. The driver device is arranged above the semiconductor device.

Abstract: A DC-to-DC converter with improved transient response, accuracy and stability is disclosed. The DC-to-DC converter includes a comparator, a driver, at least one switch and a stability circuit. The stability circuit receives a voltage signal based upon sensing one of the at least one switch. The configuration with elimination a current sensing resistor can create a simpler solution for the DC-to-DC converter.

Abstract: A combined modulator and inverter for use in transmitting audio files to a receiver. The combined modulator and inverter enables the usage of various devices in a vehicle that utilize different types of power sources. Audio devices may be used with the modulator and inverter to play the devices over a radio. The device may also have the ability to play audio files received from devices enabled to store digital flies.

Abstract: There is to be provided a liquid crystal drive controller with a built-in power supply circuit wherein latch-up is made difficult to arise even if one amplitude level of the segment line drive voltage is set to the ground potential and the levels of other liquid crystal drive voltages are determined accordingly. A semiconductor integrated circuit with a built-in power supply circuit, wherein a negative voltage generated in a power supply circuit is applied to a substrate or a well region as a bias voltage, is provided with a switch for temporarily applying the ground potential to the substrate or well region to be biased with the negative voltage at the time of starting up the power supply circuit.

Abstract: The range-specified IP addresses are effectively stored to reduce the number of necessary entries thereby the memory capacity of TCAM is improved. The representative means of the present invention is that: the storage information (entry) and the input information (comparison information or search key) are the common block code such that any bit must be the logical value ‘1’; Match-lines are hierarchically structured and memory cells are arranged at the intersecting points of a plurality of sub-match lines and a plurality of search lines; Further the sub-match lines are connected to main-match lines through the sub-match detectors, respectively and main-match detectors are arranged on the main-match lines.

Abstract: A ternary content addressable memory (CAM) cell is disclosed for providing reduced or minimized matchline (ML) capacitance and for increasing current between matchline and tail-line in the case of a mismatch. The speed of a CAM cell is generally inversely proportional to its ML capacitance, and proportional to the current. Conventional ternary CAM cells have many matchline transistors, each contributing to the matchline capacitance. Embodiments of the present invention have a single matchline transistor between a matchline and a ground line, or tail-line, of the CAM cell. The single matchline transistor couples the matchline to the tail-line in response to a discharge signal from a compare circuit. The compare circuit can be divided into a pull-up section for driving a gate voltage level control node and a discharge section for discharging the gate voltage level control node, the discharge signal being provided at the gate voltage level control node.

Abstract: In a semiconductor integrated circuit device including a nonvolatile memory device and a semiconductor integrated circuit board which are mounted on a wiring board where the nonvolatile memory is enable to electrically program data therein at a first voltage and the semiconductor integrated circuit board is operable at a second voltage lower than the first voltage, the nonvolatile memory device has a first terminal supplied with the first voltage and a second terminal for outputting the second voltage, the semiconductor integrated circuit board has a third terminal which is electrically connected to the second terminal. The nonvolatile memory device includes a voltage converting circuit, disposed between the first terminal and the second terminal, for converting the first voltage into the second voltage. The nonvolatile memory device is stacked on the semiconductor integrated circuit board.

Abstract: A data write transfer gate and a write driver transistor are connected to a data latch circuit for storing data, thereby producing a write data path. The data path is controlled by a word line and a data write bit line. In addition, a read drive transistor and a read transfer gate are connected to the latch circuit, thereby producing a read data path. The data path is controlled by a word line, a read bit line, and the data in the data latch circuit.

Abstract: A write voltage source is capable of applying a write voltage, which is a high voltage. An antifuse is connected at one end to the write voltage source and has a resistance irreversibly variable based on the write voltage. A sense node is connectable to the other end of the antifuse. A sense amp compares the potential on the sense node with a reference potential. The sense node is used to accumulate charge thereon. To control the potential difference placed between both ends of the antifuse, a third transistor is provided having one end connected to the sense node. The third transistor is provided with a precharge voltage source on the other end, and a precharge controller operative to on/off control the gate.

Abstract: A substrate forming an array of vertical transistor cells for selecting one of a plurality of memory cells and wherein each memory cell couples a transistor to a bit line via a memory element and is addressable by selecting two word lines and a bit line is disclosed. For minimizing the area of a cell and reducing complexity in production, one word line trench takes one word line, wherein in a first embodiment a first word line in a first word line trench forms a plurality of gate electrodes on one sidewall of active areas of a first and a second, adjacent row of transistor cells in word line direction, and wherein a second word line in an adjacent word line trench forms a plurality of gate electrodes on the opposite sidewall of active areas of the second and of a third row of transistor cells in wordline direction.

Abstract: A semiconductor memory device comprises an array of memory cells each comprising a variable resistance element and a cell access transistor, and a voltage supplying means for applying the first voltage between the bit and source lines connected to the selected memory cell, the third voltage to the word line to apply the first write voltage between the two ports of the variable resistance element for shifting the resistance from the first state to the second state, and the second voltage opposite in polarity to the first voltage between the bit and source lines, the third voltage to the word line to apply the second write voltage opposite in polarity to and different in the absolute value from the first write voltage between the two ports for shifting the resistance from the second state to the first state, the voltage supplying means comprising an n-channel MOSFET and a p-channel MOSFET.

Abstract: A magnetic random access memory device comprises a spin torque MRAM cell (100) having a reduced switching current (Ic) wherein standard materials may be used for a free layer (108). A fixed magnetic element (112) polarizes electrons passing therethrough, and the free magnetic element (108) having a first plane anisotropy comprises a first magnetization (130) whose direction is varied by the spin torque of the polarized electrons. An insulator (110) is positioned between the fixed magnetic element (112) and the free magnetic element (108), and a keeper layer (104) positioned contiguous to the free magnetic element (108) and having a second plane anisotropy orthogonal to the first plane anisotropy, reduces the first plane anisotropy and hence reduces the spin torque switching current (Ic). The keeper layer (104) may comprise alternating synthetic antiferromagnetic layers (132, 134) of magnetization approximately equal in magnitude and opposite in direction.

Abstract: A multi-state spin based memory cell uses a pair of ferromagnetic layers. A first ferromagnetic layer can be set to any known state k from a set of n different states by adjusting a magnetic orientation of such layer. The relationship of the first ferromagnetic layer and a second magnetic layer can thus correspond to a value of a data item in a non-volatile multi-bit memory cell.

Abstract: To reduce the voltage required to cause a phase transition from an amorphous phase to a crystalline phase, a phase-change memory device (1) comprises: a first electrode (6); a second electrode (8); and a memory layer (14) provided between the first (6) and second (8) electrodes, wherein the memory layer (14) includes at least a first layer (10) formed from a phase-change material which is stable in either the amorphous phase or the crystalline phase at room temperature, and a second layer (12) formed from a resistive material, and wherein the resistance value of the second layer (12) is smaller than the resistance value of the first layer (10) in the amorphous phase, but is larger than the resistance value of the first layer (10) in the crystalline phase.

Abstract: In a memory device and a method of manufacturing the memory device, the memory device includes first and second electrode patterns formed on a substrate. An insulating layer pattern and a third electrode pattern are successively formed on the substrate. The third electrode pattern extends to be apart from upper faces of the first and second electrode patterns by a first distance. A fourth electrode pattern extending from a lower portion of the third electrode to inside an opening defined between the first and second electrode patterns is formed to be apart from the first and second electrode patterns, the insulating layer pattern and the substrate. The fourth electrode pattern is formed toward the substrate and includes a rounded end portion.